1 /* 2 * Config file for Compulab CM-FX6 board 3 * 4 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ 5 * 6 * Author: Nikita Kiryanov <nikita@compulab.co.il> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_CM_FX6_H 12 #define __CONFIG_CM_FX6_H 13 14 #include "mx6_common.h" 15 16 /* Machine config */ 17 #define CONFIG_SYS_LITTLE_ENDIAN 18 #define CONFIG_MACH_TYPE 4273 19 20 /* MMC */ 21 #define CONFIG_SYS_FSL_USDHC_NUM 3 22 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 23 24 /* RAM */ 25 #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR 26 #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR 27 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 28 #define CONFIG_NR_DRAM_BANKS 2 29 #define CONFIG_SYS_MEMTEST_START 0x10000000 30 #define CONFIG_SYS_MEMTEST_END 0x10010000 31 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 32 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 33 #define CONFIG_SYS_INIT_SP_OFFSET \ 34 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 35 #define CONFIG_SYS_INIT_SP_ADDR \ 36 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 37 38 /* Serial console */ 39 #define CONFIG_MXC_UART 40 #define CONFIG_MXC_UART_BASE UART4_BASE 41 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 42 43 /* SPI flash */ 44 #define CONFIG_SF_DEFAULT_BUS 0 45 #define CONFIG_SF_DEFAULT_CS 0 46 #define CONFIG_SF_DEFAULT_SPEED 25000000 47 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 48 49 /* MTD support */ 50 #ifndef CONFIG_SPL_BUILD 51 #define CONFIG_SPI_FLASH_MTD 52 #endif 53 54 #define MTDIDS_DEFAULT "nor0=spi0.0" 55 #define MTDPARTS_DEFAULT "mtdparts=spi0.0:" \ 56 "768k(uboot)," \ 57 "256k(uboot-environment)," \ 58 "-(reserved)" 59 60 /* Environment */ 61 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 62 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 63 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 64 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 65 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 66 #define CONFIG_ENV_SIZE (8 * 1024) 67 #define CONFIG_ENV_OFFSET (768 * 1024) 68 69 #define CONFIG_EXTRA_ENV_SETTINGS \ 70 "stdin=serial,usbkbd\0" \ 71 "stdout=serial,vga\0" \ 72 "stderr=serial,vga\0" \ 73 "panel=HDMI\0" \ 74 "autoload=no\0" \ 75 "uImage=uImage-cm-fx6\0" \ 76 "zImage=zImage-cm-fx6\0" \ 77 "kernel=uImage-cm-fx6\0" \ 78 "script=boot.scr\0" \ 79 "dtb=cm-fx6.dtb\0" \ 80 "bootm_low=18000000\0" \ 81 "loadaddr=0x10800000\0" \ 82 "fdtaddr=0x11000000\0" \ 83 "console=ttymxc3,115200\0" \ 84 "ethprime=FEC0\0" \ 85 "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \ 86 "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ 87 "doboot=bootm ${loadaddr}\0" \ 88 "doloadfdt=false\0" \ 89 "mtdids=" MTDIDS_DEFAULT "\0" \ 90 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 91 "setboottypez=setenv kernel ${zImage};" \ 92 "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \ 93 "setenv doloadfdt true;\0" \ 94 "setboottypem=setenv kernel ${uImage};" \ 95 "setenv doboot bootm ${loadaddr};" \ 96 "setenv doloadfdt false;\0"\ 97 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 98 "sataroot=/dev/sda2 rw rootwait\0" \ 99 "nandroot=/dev/mtdblock4 rw\0" \ 100 "nandrootfstype=ubifs\0" \ 101 "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \ 102 "${video} ${extrabootargs}\0" \ 103 "sataargs=setenv bootargs console=${console} root=${sataroot} " \ 104 "${video} ${extrabootargs}\0" \ 105 "nandargs=setenv bootargs console=${console} " \ 106 "root=${nandroot} " \ 107 "rootfstype=${nandrootfstype} " \ 108 "${video} ${extrabootargs}\0" \ 109 "nandboot=if run nandloadkernel; then " \ 110 "run nandloadfdt;" \ 111 "run setboottypem;" \ 112 "run storagebootcmd;" \ 113 "run setboottypez;" \ 114 "run storagebootcmd;" \ 115 "fi;\0" \ 116 "run_eboot=echo Starting EBOOT ...; "\ 117 "mmc dev 2 && " \ 118 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \ 119 "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\ 120 "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\ 121 "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \ 122 "bootscript=echo Running bootscript from ${storagetype} ...;" \ 123 "source ${loadaddr};\0" \ 124 "nandloadkernel=nand read ${loadaddr} 0 780000;\0" \ 125 "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \ 126 "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \ 127 "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \ 128 "setupnandboot=setenv storagetype nand;\0" \ 129 "setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \ 130 "storagebootcmd=echo Booting from ${storagetype} ...;" \ 131 "run ${storagetype}args; run doboot;\0" \ 132 "trybootk=if run loadkernel; then " \ 133 "if ${doloadfdt}; then " \ 134 "run loadfdt;" \ 135 "fi;" \ 136 "run storagebootcmd;" \ 137 "fi;\0" \ 138 "trybootsmz=if run loadscript; then " \ 139 "run bootscript;" \ 140 "fi;" \ 141 "run setboottypem;" \ 142 "run trybootk;" \ 143 "run setboottypez;" \ 144 "run trybootk;\0" 145 146 #define CONFIG_BOOTCOMMAND \ 147 "run setupmmcboot;" \ 148 "mmc dev ${storagedev};" \ 149 "if mmc rescan; then " \ 150 "run trybootsmz;" \ 151 "fi;" \ 152 "run setupusbboot;" \ 153 "if usb start; then "\ 154 "if run loadscript; then " \ 155 "run bootscript;" \ 156 "fi;" \ 157 "fi;" \ 158 "run setupsataboot;" \ 159 "if sata init; then " \ 160 "run trybootsmz;" \ 161 "fi;" \ 162 "run setupnandboot;" \ 163 "run nandboot;" 164 165 #define CONFIG_PREBOOT "usb start;sf probe" 166 167 /* SPI */ 168 #define CONFIG_SPI 169 #define CONFIG_MXC_SPI 170 171 /* NAND */ 172 #ifndef CONFIG_SPL_BUILD 173 #define CONFIG_SYS_NAND_BASE 0x40000000 174 #define CONFIG_SYS_NAND_MAX_CHIPS 1 175 #define CONFIG_SYS_MAX_NAND_DEVICE 1 176 #define CONFIG_SYS_NAND_ONFI_DETECTION 177 /* APBH DMA is required for NAND support */ 178 #endif 179 180 /* Ethernet */ 181 #define CONFIG_FEC_MXC 182 #define CONFIG_FEC_MXC_PHYADDR 0 183 #define CONFIG_FEC_XCV_TYPE RGMII 184 #define IMX_FEC_BASE ENET_BASE_ADDR 185 #define CONFIG_PHY_ATHEROS 186 #define CONFIG_MII 187 #define CONFIG_ETHPRIME "FEC0" 188 #define CONFIG_ARP_TIMEOUT 200UL 189 #define CONFIG_NET_RETRY_COUNT 5 190 191 /* USB */ 192 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 193 #define CONFIG_MXC_USB_FLAGS 0 194 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 195 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 196 197 /* I2C */ 198 #define CONFIG_SYS_I2C 199 #define CONFIG_SYS_I2C_MXC 200 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 201 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 202 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 203 #define CONFIG_SYS_I2C_SPEED 100000 204 #define CONFIG_SYS_MXC_I2C3_SPEED 400000 205 206 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 207 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 208 #define CONFIG_SYS_I2C_EEPROM_BUS 2 209 210 /* SATA */ 211 #define CONFIG_SYS_SATA_MAX_DEVICE 1 212 #define CONFIG_LIBATA 213 #define CONFIG_LBA48 214 #define CONFIG_DWC_AHSATA 215 #define CONFIG_DWC_AHSATA_PORT_ID 0 216 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 217 218 /* Boot */ 219 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) 220 #define CONFIG_SERIAL_TAG 221 222 /* misc */ 223 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 224 #define CONFIG_MISC_INIT_R 225 226 /* SPL */ 227 #include "imx6_spl.h" 228 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 229 #define CONFIG_SPL_SPI_LOAD 230 231 /* Display */ 232 #define CONFIG_VIDEO_IPUV3 233 #define CONFIG_IPUV3_CLK 260000000 234 #define CONFIG_IMX_HDMI 235 236 #define CONFIG_SPLASH_SCREEN 237 #define CONFIG_SPLASH_SOURCE 238 #define CONFIG_VIDEO_BMP_RLE8 239 240 #define CONFIG_VIDEO_LOGO 241 #define CONFIG_VIDEO_BMP_LOGO 242 243 /* EEPROM */ 244 #define CONFIG_ENV_EEPROM_IS_ON_I2C 245 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 246 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 247 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 248 #define CONFIG_SYS_EEPROM_SIZE 256 249 250 #endif /* __CONFIG_CM_FX6_H */ 251