1 /* SPDX-License-Identifier: Apache-2.0 OR MIT */ 2 /* 3 * Copyright (c) 2024 Rockchip Electronics Co., Ltd. 4 */ 5 6 #ifndef __HAL_AVS2D_GLOBAL_H__ 7 #define __HAL_AVS2D_GLOBAL_H__ 8 9 #include "mpp_device.h" 10 #include "hal_bufs.h" 11 12 #include "parser_api.h" 13 #include "hal_avs2d_api.h" 14 #include "avs2d_syntax.h" 15 16 #define AVS2D_HAL_DBG_ERROR (0x00000001) 17 #define AVS2D_HAL_DBG_ASSERT (0x00000002) 18 #define AVS2D_HAL_DBG_WARNNING (0x00000004) 19 #define AVS2D_HAL_DBG_TRACE (0x00000100) 20 #define AVS2D_HAL_DBG_REG (0x00000200) 21 #define AVS2D_HAL_DBG_IN (0x00000400) 22 #define AVS2D_HAL_DBG_OUT (0x00000800) 23 24 #define AVS2D_HAL_DBG_OFFSET (0x00010000) 25 26 extern RK_U32 avs2d_hal_debug; 27 28 #define AVS2D_HAL_DBG(level, fmt, ...)\ 29 do {\ 30 if (level & avs2d_hal_debug)\ 31 { mpp_log(fmt, ## __VA_ARGS__); }\ 32 } while (0) 33 34 #define AVS2D_HAL_TRACE(fmt, ...)\ 35 do {\ 36 if (AVS2D_HAL_DBG_TRACE & avs2d_hal_debug)\ 37 { mpp_log_f(fmt, ## __VA_ARGS__); }\ 38 } while (0) 39 40 41 #define INP_CHECK(ret, val, ...)\ 42 do{\ 43 if ((val)) { \ 44 ret = MPP_ERR_INIT; \ 45 AVS2D_HAL_DBG(AVS2D_HAL_DBG_WARNNING, "input empty(%d).\n", __LINE__); \ 46 goto __RETURN; \ 47 }\ 48 } while (0) 49 50 51 #define FUN_CHECK(val)\ 52 do{\ 53 if ((val) < 0) {\ 54 AVS2D_HAL_DBG(AVS2D_HAL_DBG_WARNNING, "Function error(%d).\n", __LINE__); \ 55 goto __FAILED; \ 56 }\ 57 } while (0) 58 59 60 //!< memory malloc check 61 #define MEM_CHECK(ret, val, ...)\ 62 do{\ 63 if (!(val)) {\ 64 ret = MPP_ERR_MALLOC; \ 65 mpp_err_f("malloc buffer error(%d).\n", __LINE__); \ 66 goto __FAILED; \ 67 }\ 68 } while (0) 69 70 71 #define FIELDPICTURE 0 72 #define FRAMEPICTURE 1 73 74 enum { 75 IFRAME = 0, 76 PFRAME = 1, 77 BFRAME = 2 78 }; 79 80 typedef struct avs2d_hal_ctx_t { 81 const MppHalApi *hal_api; 82 MppDecCfgSet *cfg; 83 MppBufSlots frame_slots; 84 MppBufSlots packet_slots; 85 MppBufferGroup buf_group; 86 HalBufs cmv_bufs; 87 RK_U32 mv_size; 88 RK_U32 mv_count; 89 MppCbCtx *dec_cb; 90 MppDev dev; 91 Avs2dSyntax_t syntax; 92 RK_U32 fast_mode; 93 94 void *reg_ctx; 95 MppBuffer shph_buf; 96 MppBuffer scalist_buf; 97 98 RK_U32 frame_no; 99 const MppDecHwCap *hw_info; 100 } Avs2dHalCtx_t; 101 102 #endif /*__HAL_AVS2D_GLOBAL_H__*/ 103