1 /* 2 * Copyright 2015 Rockchip Electronics Co. LTD 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef __H265E_SYNTAX_NEW_H__ 18 #define __H265E_SYNTAX_NEW_H__ 19 #include "mpp_rc.h" 20 #include "h265_syntax.h" 21 #include "rc.h" 22 23 typedef struct H265PicEntry_t { 24 RK_U8 slot_idx; 25 } H265ePicEntry; 26 27 typedef struct H265ePicParams_t { 28 RK_U16 pic_width; 29 RK_U16 pic_height; 30 RK_U16 hor_stride; 31 RK_U16 ver_stride; 32 RK_U16 pic_ofsty; 33 RK_U16 pic_oftx; 34 RK_U32 mpp_format; 35 union { 36 struct { 37 RK_U16 chroma_format_idc : 2; 38 RK_U16 separate_colour_plane_flag : 1; 39 RK_U16 bit_depth_luma_minus8 : 3; 40 RK_U16 bit_depth_chroma_minus8 : 3; 41 RK_U16 log2_max_pic_order_cnt_lsb_minus4 : 4; 42 RK_U16 NoPicReorderingFlag : 1; 43 RK_U16 NoBiPredFlag : 1; 44 RK_U16 ReservedBits1 : 1; 45 }; 46 RK_U16 wFormatAndSequenceInfoFlags; 47 }; 48 RK_U8 sps_max_dec_pic_buffering_minus1; 49 RK_U8 log2_min_luma_coding_block_size_minus3; 50 RK_U8 log2_diff_max_min_luma_coding_block_size; 51 RK_U8 log2_min_transform_block_size_minus2; 52 RK_U8 log2_diff_max_min_transform_block_size; 53 RK_U8 max_transform_hierarchy_depth_inter; 54 RK_U8 max_transform_hierarchy_depth_intra; 55 RK_U8 num_short_term_ref_pic_sets; 56 RK_U8 num_long_term_ref_pics_sps; 57 RK_U8 num_ref_idx_l0_default_active_minus1; 58 RK_U8 num_ref_idx_l1_default_active_minus1; 59 RK_S8 init_qp_minus26; 60 RK_U16 ReservedBits2; 61 62 union { 63 struct { 64 RK_U32 scaling_list_enabled_flag : 1; 65 RK_U32 amp_enabled_flag : 1; 66 RK_U32 sample_adaptive_offset_enabled_flag : 1; 67 RK_U32 pcm_enabled_flag : 1; 68 RK_U32 pcm_sample_bit_depth_luma_minus1 : 4; 69 RK_U32 pcm_sample_bit_depth_chroma_minus1 : 4; 70 RK_U32 log2_min_pcm_luma_coding_block_size_minus3 : 2; 71 RK_U32 log2_diff_max_min_pcm_luma_coding_block_size : 2; 72 RK_U32 pcm_loop_filter_disabled_flag : 1; 73 RK_U32 long_term_ref_pics_present_flag : 1; 74 RK_U32 sps_temporal_mvp_enabled_flag : 1; 75 RK_U32 strong_intra_smoothing_enabled_flag : 1; 76 RK_U32 dependent_slice_segments_enabled_flag : 1; 77 RK_U32 output_flag_present_flag : 1; 78 RK_U32 num_extra_slice_header_bits : 3; 79 RK_U32 sign_data_hiding_enabled_flag : 1; 80 RK_U32 cabac_init_present_flag : 1; 81 RK_U32 ReservedBits3 : 5; 82 }; 83 RK_U32 CodingParamToolFlags; 84 }; 85 86 union { 87 struct { 88 RK_U32 constrained_intra_pred_flag : 1; 89 RK_U32 transform_skip_enabled_flag : 1; 90 RK_U32 cu_qp_delta_enabled_flag : 1; 91 RK_U32 pps_slice_chroma_qp_offsets_present_flag : 1; 92 RK_U32 weighted_pred_flag : 1; 93 RK_U32 weighted_bipred_flag : 1; 94 RK_U32 transquant_bypass_enabled_flag : 1; 95 RK_U32 tiles_enabled_flag : 1; 96 RK_U32 entropy_coding_sync_enabled_flag : 1; 97 RK_U32 uniform_spacing_flag : 1; 98 RK_U32 loop_filter_across_tiles_enabled_flag : 1; 99 RK_U32 pps_loop_filter_across_slices_enabled_flag : 1; 100 RK_U32 deblocking_filter_override_enabled_flag : 1; 101 RK_U32 pps_deblocking_filter_disabled_flag : 1; 102 RK_U32 lists_modification_present_flag : 1; 103 RK_U32 slice_segment_header_extension_present_flag : 1; 104 RK_U32 ReservedBits4 : 16; 105 }; 106 RK_U32 CodingSettingPicturePropertyFlags; 107 }; 108 RK_S8 pps_cb_qp_offset; 109 RK_S8 pps_cr_qp_offset; 110 RK_U8 num_tile_columns_minus1; 111 RK_U8 num_tile_rows_minus1; 112 RK_S32 column_width_minus1[19]; 113 RK_S32 row_height_minus1[21]; 114 RK_U8 diff_cu_qp_delta_depth; 115 RK_S8 pps_beta_offset_div2; 116 RK_S8 pps_tc_offset_div2; 117 RK_U8 log2_parallel_merge_level_minus2; 118 RK_U32 vps_id; 119 RK_U32 pps_id; 120 RK_U32 sps_id; 121 RK_U8 scaling_list_data_present_flag; 122 } H265ePicParams; 123 124 typedef struct H265eSlicParams_t { 125 union { 126 struct { 127 RK_U32 sli_splt : 1; 128 RK_U32 sli_splt_mode : 1; 129 RK_U32 sli_splt_cpst : 1; 130 RK_U32 sli_flsh : 1; 131 RK_U32 cbc_init_flg : 1; 132 RK_U32 mvd_l1_zero_flg : 1; 133 RK_U32 merge_up_flag : 1; 134 RK_U32 merge_left_flag : 1; 135 RK_U32 ref_pic_lst_mdf_l0 : 1; 136 RK_U32 num_refidx_act_ovrd : 1; 137 RK_U32 sli_sao_chrm_flg : 1; 138 RK_U32 sli_sao_luma_flg : 1; 139 RK_U32 sli_tmprl_mvp_en : 1; 140 RK_U32 pic_out_flg : 1; 141 RK_U32 dpdnt_sli_seg_flg : 1; 142 RK_U32 no_out_pri_pic : 1; 143 RK_U32 sli_lp_fltr_acrs_sli : 1; 144 RK_U32 sli_dblk_fltr_dis : 1; 145 RK_U32 dblk_fltr_ovrd_flg : 1; 146 RK_U32 col_ref_idx : 1; 147 RK_U32 col_frm_l0_flg : 1; 148 RK_U32 st_ref_pic_flg : 1; 149 RK_U32 num_pos_pic : 1; 150 RK_U32 dlt_poc_msb_prsnt0 : 1; 151 RK_U32 dlt_poc_msb_prsnt1 : 1; 152 RK_U32 dlt_poc_msb_prsnt2 : 1; 153 RK_U32 used_by_lt_flg0 : 1; 154 RK_U32 used_by_lt_flg1 : 1; 155 RK_U32 used_by_lt_flg2 : 1; 156 RK_U32 ReservedBits : 3; 157 }; 158 RK_U32 CodingSliceFlags; 159 }; 160 161 H265ePicEntry recon_pic; 162 H265ePicEntry ref_pic; 163 RK_S8 sli_tc_ofst_div2; 164 RK_S8 sli_beta_ofst_div2; 165 RK_S8 sli_cb_qp_ofst; 166 RK_U8 sli_qp; 167 RK_U8 max_mrg_cnd; 168 RK_U8 lst_entry_l0; 169 RK_U8 num_refidx_l1_act; 170 RK_U8 num_refidx_l0_act; 171 RK_U8 slice_type; 172 RK_U8 slice_rsrv_flg; 173 RK_U8 sli_pps_id; 174 RK_U8 lt_idx_sps; 175 RK_U8 num_lt_pic; 176 RK_U8 st_ref_pic_idx; 177 RK_U8 num_lt_sps; 178 RK_U8 used_by_s0_flg; 179 RK_U8 num_neg_pic; 180 RK_U16 sli_poc_lsb; 181 RK_U16 sli_hdr_ext_len; 182 RK_U16 poc_lsb_lt0; 183 RK_U16 sli_max_num_m1; 184 RK_U16 sli_splt_cnum_m1; 185 RK_U16 dlt_poc_msb_cycl0; 186 RK_U16 dlt_poc_s0_m10; 187 RK_U16 dlt_poc_s0_m11; 188 RK_U16 dlt_poc_s0_m12; 189 RK_U16 dlt_poc_s0_m13; 190 RK_U16 poc_lsb_lt1; 191 RK_U16 poc_lsb_lt2; 192 RK_U16 dlt_poc_msb_cycl1; 193 RK_U16 dlt_poc_msb_cycl2; 194 RK_U32 sli_splt_byte; 195 RK_U32 tot_poc_num; 196 RK_U32 non_reference_flag; 197 } H265eSlicParams; 198 /* 199 * Split reference frame configure to two parts 200 * The first part is slice depended info like poc / frame_num, and frame 201 * type and flags. 202 * The other part is gop structure depended info like gop index, ref_status 203 * and ref_frm_index. This part is inited from dpb gop hierarchy info. 204 */ 205 206 typedef struct UserDatas_t { 207 void *plt_data; 208 } UserDatas; 209 210 typedef struct H265eSyntax_new_t { 211 RK_S32 idr_request; 212 H265ePicParams pp; 213 H265eSlicParams sp; 214 } H265eSyntax_new; 215 216 #ifdef __cplusplus 217 extern "C" { 218 #endif 219 220 RK_S32 h265e_syntax_fill(void *ctx); 221 222 #ifdef __cplusplus 223 } 224 #endif 225 226 #endif 227