1 /* 2 * Copyright 2015 Rockchip Electronics Co. LTD 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef __H265E_SLICE_H__ 18 #define __H265E_SLICE_H__ 19 20 #include "rk_type.h" 21 #include "mpp_err.h" 22 #include "mpp_list.h" 23 #include "h265e_dpb.h" 24 #include "h265_syntax.h" 25 #include "h265e_enctropy.h" 26 #include "h265e_context_table.h" 27 28 #define MIN_PU_SIZE 4 29 #define MIN_TU_SIZE 4 30 #define MAX_NUM_SPU_W (64 / MIN_PU_SIZE) // maximum number of SPU in horizontal line 31 32 /* 33 * For H.265 encoder slice header process. 34 * Remove some syntax that encoder not supported. 35 * Field, mbaff, B slice are not supported yet. 36 */ 37 typedef struct H265eDpbFrm_t H265eDpbFrm; 38 39 typedef struct DataCu_t { 40 RK_U8 m_cuSize[256]; 41 RK_U8 m_cuDepth[256]; 42 RK_U32 pixelX; 43 RK_U32 pixelY; 44 RK_U32 mb_w; 45 RK_U32 mb_h; 46 RK_U32 cur_addr; 47 } DataCu; 48 49 typedef struct H265eReferencePictureSet_e { 50 RK_S32 m_deltaRIdxMinus1; 51 RK_S32 m_deltaRPS; 52 RK_S32 m_numRefIdc; 53 RK_S32 m_refIdc[MAX_REFS + 1]; 54 55 // Parameters for long term references 56 RK_U32 check_lt_msb[MAX_REFS]; 57 RK_S32 m_pocLSBLT[MAX_REFS]; 58 RK_S32 m_deltaPOCMSBCycleLT[MAX_REFS]; 59 RK_U32 m_deltaPocMSBPresentFlag[MAX_REFS]; 60 61 RK_S32 m_numberOfPictures; 62 RK_S32 num_negative_pic; 63 RK_S32 num_positive_pic; 64 RK_S32 delta_poc[MAX_REFS]; 65 RK_U32 m_used[MAX_REFS]; 66 RK_U32 m_ref[MAX_REFS]; 67 RK_S32 poc[MAX_REFS]; 68 RK_S32 m_RealPoc[MAX_REFS]; 69 70 RK_U32 m_interRPSPrediction; 71 RK_S32 num_long_term_pic; // Zero when disabled 72 } H265eReferencePictureSet; 73 74 typedef struct H265eRPSList_e { 75 RK_S32 m_numberOfReferencePictureSets; 76 H265eReferencePictureSet *m_referencePictureSets; 77 } H265eRPSList; 78 79 typedef struct H265eRefPicListModification_e { 80 RK_U32 m_refPicListModificationFlagL0; 81 RK_U32 m_refPicListModificationFlagL1; 82 RK_U32 m_RefPicSetIdxL0[REF_PIC_LIST_NUM_IDX]; 83 RK_U32 m_RefPicSetIdxL1[REF_PIC_LIST_NUM_IDX]; 84 } H265eRefPicListModification; 85 86 typedef struct ProfileTierLevel_e { 87 RK_S32 m_profileSpace; 88 RK_S32 m_tierFlag; 89 RK_S32 m_profileIdc; 90 RK_S32 m_profileCompatibilityFlag[32]; 91 RK_S32 m_levelIdc; 92 RK_S32 m_progressiveSourceFlag; 93 RK_S32 m_interlacedSourceFlag; 94 RK_S32 m_nonPackedConstraintFlag; 95 RK_S32 m_frameOnlyConstraintFlag; 96 } ProfileTierLevel; 97 98 typedef struct H265ePTL_e { 99 ProfileTierLevel m_generalPTL; 100 ProfileTierLevel m_subLayerPTL[6]; // max. value of max_sub_layers_minus1 is 6 101 RK_S32 m_subLayerProfilePresentFlag[6]; 102 RK_S32 m_subLayerLevelPresentFlag[6]; 103 } H265ePTL; 104 105 typedef struct TimeingInfo_e { 106 RK_U32 m_timingInfoPresentFlag; 107 RK_U32 m_numUnitsInTick; 108 RK_U32 m_timeScale; 109 RK_U32 m_pocProportionalToTimingFlag; 110 RK_U32 m_numTicksPocDiffOneMinus1; 111 } TimingInfo; 112 113 typedef struct H265HrdSubLayerInfo_e { 114 RK_U32 fixedPicRateFlag; 115 RK_U32 fixedPicRateWithinCvsFlag; 116 RK_U32 picDurationInTcMinus1; 117 RK_U32 lowDelayHrdFlag; 118 RK_U32 cpbCntMinus1; 119 RK_U32 bitRateValueMinus1[MAX_CPB_CNT][2]; 120 RK_U32 cpbSizeValue[MAX_CPB_CNT][2]; 121 RK_U32 ducpbSizeValue[MAX_CPB_CNT][2]; 122 RK_U32 cbrFlag[MAX_CPB_CNT][2]; 123 RK_U32 duBitRateValue[MAX_CPB_CNT][2]; 124 } H265eHrdSubLayerInfo; 125 126 typedef struct H265eHrdParameters_e { 127 RK_U32 m_nalHrdParametersPresentFlag; 128 RK_U32 m_vclHrdParametersPresentFlag; 129 RK_U32 m_subPicHrdParamsPresentFlag; 130 RK_U32 m_tickDivisorMinus2; 131 RK_U32 m_duCpbRemovalDelayLengthMinus1; 132 RK_U32 m_subPicCpbParamsInPicTimingSEIFlag; 133 RK_U32 m_dpbOutputDelayDuLengthMinus1; 134 RK_U32 m_bitRateScale; 135 RK_U32 m_cpbSizeScale; 136 RK_U32 m_ducpbSizeScale; 137 RK_U32 m_initialCpbRemovalDelayLengthMinus1; 138 RK_U32 m_cpbRemovalDelayLengthMinus1; 139 RK_U32 m_dpbOutputDelayLengthMinus1; 140 H265eHrdSubLayerInfo m_HRD[MAX_SUB_LAYERS]; 141 } H265eHrdParameters; 142 143 typedef struct H265eVps_e { 144 RK_S32 m_VPSId; 145 RK_U32 m_maxTLayers; 146 RK_U32 m_maxLayers; 147 RK_U32 m_bTemporalIdNestingFlag; 148 149 RK_U32 m_numReorderPics[MAX_SUB_LAYERS]; 150 RK_U32 m_maxDecPicBuffering[MAX_SUB_LAYERS]; 151 RK_U32 m_maxLatencyIncrease[MAX_SUB_LAYERS]; // Really max latency increase plus 1 (value 0 expresses no limit) 152 153 RK_U32 m_numHrdParameters; 154 RK_U32 m_maxNuhReservedZeroLayerId; 155 H265eHrdParameters *m_hrdParameters; 156 RK_U32 *m_hrdOpSetIdx; 157 RK_U32 *m_cprmsPresentFlag; 158 RK_U32 m_numOpSets; 159 RK_U32 m_layerIdIncludedFlag[MAX_VPS_OP_SETS_PLUS1][MAX_VPS_NUH_RESERVED_ZERO_LAYER_ID_PLUS1]; 160 161 H265ePTL m_ptl; 162 TimingInfo m_timingInfo; 163 } H265eVps; 164 165 typedef struct H265eCropInfo_e { 166 RK_U32 m_enabledFlag; 167 RK_S32 m_winLeftOffset; 168 RK_S32 m_winRightOffset; 169 RK_S32 m_winTopOffset; 170 RK_S32 m_winBottomOffset; 171 } H265eCropInfo; 172 173 typedef struct H265eVuiInfo_e { 174 RK_U32 m_aspectRatioInfoPresentFlag; 175 RK_S32 m_aspectRatioIdc; 176 RK_S32 m_sarWidth; 177 RK_S32 m_sarHeight; 178 RK_U32 m_overscanInfoPresentFlag; 179 RK_U32 m_overscanAppropriateFlag; 180 RK_U32 m_videoSignalTypePresentFlag; 181 RK_S32 m_videoFormat; 182 RK_U32 m_videoFullRangeFlag; 183 RK_U32 m_colourDescriptionPresentFlag; 184 RK_S32 m_colourPrimaries; 185 RK_S32 m_transferCharacteristics; 186 RK_S32 m_matrixCoefficients; 187 RK_U32 m_chromaLocInfoPresentFlag; 188 RK_S32 m_chromaSampleLocTypeTopField; 189 RK_S32 m_chromaSampleLocTypeBottomField; 190 RK_U32 m_neutralChromaIndicationFlag; 191 RK_U32 m_fieldSeqFlag; 192 193 H265eCropInfo m_defaultDisplayWindow; 194 RK_U32 m_frameFieldInfoPresentFlag; 195 RK_U32 m_hrdParametersPresentFlag; 196 RK_U32 m_bitstreamRestrictionFlag; 197 RK_U32 m_tilesFixedStructureFlag; 198 RK_U32 m_motionVectorsOverPicBoundariesFlag; 199 RK_U32 m_restrictedRefPicListsFlag; 200 RK_S32 m_minSpatialSegmentationIdc; 201 RK_S32 m_maxBytesPerPicDenom; 202 RK_S32 m_maxBitsPerMinCuDenom; 203 RK_S32 m_log2MaxMvLengthHorizontal; 204 RK_S32 m_log2MaxMvLengthVertical; 205 H265eHrdParameters m_hrdParameters; 206 TimingInfo m_timingInfo; 207 } H265eVuiInfo; 208 209 typedef struct H265eSps_e { 210 211 RK_S32 m_SPSId; 212 RK_S32 m_VPSId; 213 RK_S32 m_chromaFormatIdc; 214 RK_U32 m_colorPlaneFlag; 215 RK_U32 m_maxTLayers; // maximum number of temporal layers 216 217 // Structure 218 RK_U32 m_picWidthInLumaSamples; 219 RK_U32 m_picHeightInLumaSamples; 220 221 RK_S32 m_log2MinCodingBlockSize; 222 RK_S32 m_log2DiffMaxMinCodingBlockSize; 223 RK_U32 m_maxCUSize; 224 RK_U32 m_maxCUDepth; 225 RK_U32 m_addCUDepth; 226 227 H265eCropInfo m_conformanceWindow; 228 229 H265eRPSList m_RPSList; 230 RK_U32 m_bLongTermRefsPresent; 231 RK_U32 m_TMVPFlagsPresent; 232 RK_S32 m_numReorderPics[MAX_SUB_LAYERS]; 233 234 // Tool list 235 RK_U32 m_quadtreeTULog2MaxSize; 236 RK_U32 m_quadtreeTULog2MinSize; 237 RK_U32 m_quadtreeTUMaxDepthInter; 238 RK_U32 m_quadtreeTUMaxDepthIntra; 239 RK_U32 m_usePCM; 240 RK_U32 m_pcmLog2MaxSize; 241 RK_U32 m_pcmLog2MinSize; 242 RK_U32 m_useAMP; 243 244 // Parameter 245 RK_S32 m_bitDepthY; 246 RK_S32 m_bitDepthC; 247 RK_S32 m_qpBDOffsetY; 248 RK_S32 m_qpBDOffsetC; 249 250 RK_U32 m_useLossless; 251 252 RK_U32 m_pcmBitDepthLuma; 253 RK_U32 m_pcmBitDepthChroma; 254 RK_U32 m_bPCMFilterDisableFlag; 255 256 RK_U32 m_bitsForPOC; 257 RK_U32 m_numLongTermRefPicSPS; 258 RK_U32 m_ltRefPicPocLsbSps[33]; 259 RK_U32 m_usedByCurrPicLtSPSFlag[33]; 260 261 // Max physical transform size 262 RK_U32 m_maxTrSize; 263 264 RK_S32 m_iAMPAcc[MAX_CU_DEPTH]; 265 RK_U32 m_bUseSAO; 266 267 RK_U32 m_bTemporalIdNestingFlag; // temporal_id_nesting_flag 268 269 RK_U32 m_scalingListEnabledFlag; 270 RK_U32 m_scalingListPresentFlag; 271 RK_U32 m_maxDecPicBuffering[MAX_SUB_LAYERS]; 272 273 RK_U32 m_maxLatencyIncrease[MAX_SUB_LAYERS]; // Really max latency increase plus 1 (value 0 expresses no limit) 274 275 RK_U32 m_useDF; 276 RK_U32 m_useStrongIntraSmoothing; 277 278 RK_S32 m_vuiParametersPresentFlag; 279 H265eVuiInfo vui; 280 H265ePTL *m_ptl; 281 RK_U32 zscan2raster[MAX_NUM_SPU_W * MAX_NUM_SPU_W]; 282 RK_U32 raster2zscan[MAX_NUM_SPU_W * MAX_NUM_SPU_W]; 283 RK_U32 raster2pelx[MAX_NUM_SPU_W * MAX_NUM_SPU_W]; 284 RK_U32 raster2pely[MAX_NUM_SPU_W * MAX_NUM_SPU_W]; 285 } H265eSps; 286 287 typedef struct H265ePps_e { 288 RK_U32 m_PPSId; // pic_parameter_set_id 289 RK_U32 m_SPSId; // seq_parameter_set_id 290 RK_S32 m_picInitQPMinus26; 291 RK_U32 m_useDQP; 292 RK_U32 m_bConstrainedIntraPred; // constrained_intra_pred_flag 293 RK_U32 m_bSliceChromaQpFlag; // slicelevel_chroma_qp_flag 294 295 // access channel 296 H265eSps *m_sps; 297 RK_U32 m_maxCuDQPDepth; 298 RK_U32 m_minCuDQPSize; 299 300 RK_S32 m_chromaCbQpOffset; 301 RK_S32 m_chromaCrQpOffset; 302 303 RK_U32 m_numRefIdxL0DefaultActive; 304 RK_U32 m_numRefIdxL1DefaultActive; 305 306 RK_U32 m_bUseWeightPred; // Use of Weighting Prediction (P_SLICE) 307 RK_U32 m_useWeightedBiPred; // Use of Weighting Bi-Prediction (B_SLICE) 308 RK_U32 m_outputFlagPresentFlag; // Indicates the presence of output_flag in slice header 309 310 RK_U32 m_transquantBypassEnableFlag; // Indicates presence of cu_transquant_bypass_flag in CUs. 311 RK_U32 m_useTransformSkip; 312 RK_U32 m_entropyCodingSyncEnabledFlag; //!< Indicates the presence of wavefronts 313 314 315 RK_S32 m_signHideFlag; 316 RK_S32 m_tiles_enabled_flag; 317 RK_U32 m_bTileUniformSpacing; 318 RK_S32 m_nNumTileColumnsMinus1; 319 RK_S32 m_nTileColumnWidthArray[33]; 320 RK_S32 m_nNumTileRowsMinus1; 321 RK_S32 m_nTileRowHeightArray[128]; 322 RK_U32 m_loopFilterAcrossTilesEnabledFlag; 323 324 RK_U32 m_cabacInitPresentFlag; 325 RK_U32 m_encCABACTableIdx; // Used to transmit table selection across slices 326 327 RK_U32 m_sliceHeaderExtensionPresentFlag; 328 RK_U32 m_deblockingFilterControlPresentFlag; 329 RK_U32 m_LFCrossSliceBoundaryFlag; 330 RK_U32 m_deblockingFilterOverrideEnabledFlag; 331 RK_U32 m_picDisableDeblockingFilterFlag; 332 RK_S32 m_deblockingFilterBetaOffsetDiv2; //< beta offset for deblocking filter 333 RK_S32 m_deblockingFilterTcOffsetDiv2; //< tc offset for deblocking filter 334 RK_U32 m_scalingListPresentFlag; 335 336 // TComScalingList* m_scalingList; //!< ScalingList class pointer 337 RK_U32 m_listsModificationPresentFlag; 338 RK_U32 m_log2ParallelMergeLevelMinus2; 339 RK_S32 m_numExtraSliceHeaderBits; 340 } H265ePps; 341 342 typedef struct H265eSlice_e { 343 344 RK_U32 m_saoEnabledFlag; 345 RK_U32 m_saoEnabledFlagChroma; ///< SAO Cb&Cr enabled flag 346 RK_S32 m_ppsId; ///< picture parameter set ID 347 RK_U32 m_picOutputFlag; ///< pic_output_flag 348 RK_S32 poc; 349 RK_S32 gop_idx; 350 RK_S32 last_idr; 351 352 H265eReferencePictureSet *m_rps; 353 H265eReferencePictureSet m_localRPS; 354 RK_S32 m_bdIdx; 355 H265eRefPicListModification m_RefPicListModification; 356 H265eContextModel_t m_contextModels[MAX_OFF_CTX_MOD]; 357 H265eCabacCtx m_cabac; 358 359 enum NALUnitType m_nalUnitType; ///< Nal unit type for the slice 360 SliceType m_sliceType; 361 RK_U32 m_IsGenB; 362 RK_S32 m_sliceQp; 363 RK_U32 m_dependentSliceSegmentFlag; 364 RK_U32 m_deblockingFilterDisable; 365 RK_U32 m_deblockingFilterOverrideFlag; //< offsets for deblocking filter inherit from PPS 366 RK_S32 m_deblockingFilterBetaOffsetDiv2; //< beta offset for deblocking filter 367 RK_S32 m_deblockingFilterTcOffsetDiv2; //< tc offset for deblocking filter 368 RK_S32 m_numRefIdx[2]; // for multiple reference of current slice 369 370 RK_U32 m_bCheckLDC; 371 372 // Data 373 RK_S32 m_sliceQpDelta; 374 RK_S32 m_sliceQpDeltaCb; 375 RK_S32 m_sliceQpDeltaCr; 376 H265eDpbFrm *m_refPicList[2][MAX_REFS + 1]; 377 RK_S32 m_refPOCList[2][MAX_REFS + 1]; 378 RK_U32 m_bIsUsedAsLongTerm[2][MAX_REFS + 1]; 379 380 // referenced slice? 381 RK_U32 is_referenced; 382 383 // access channel 384 H265eSps* m_sps; 385 H265ePps* m_pps; 386 H265eVps* m_vps; 387 RK_U32 m_colFromL0Flag; // collocated picture from List0 flag 388 389 RK_U32 m_colRefIdx; 390 RK_U32 m_maxNumMergeCand; 391 392 RK_U32 m_sliceCurEndCUAddr; 393 RK_U32 m_nextSlice; 394 RK_U32 m_sliceBits; 395 RK_U32 m_sliceSegmentBits; 396 RK_U32 m_bFinalized; 397 398 RK_U32 m_tileOffstForMultES; 399 400 RK_U32* m_substreamSizes; 401 402 // TComScalingList* m_scalingList; //!< pointer of quantization matrix 403 RK_U32 m_cabacInitFlag; 404 405 RK_U32 m_bLMvdL1Zero; 406 RK_S32 m_numEntryPointOffsets; 407 RK_U32 m_temporalLayerNonReferenceFlag; 408 RK_U32 m_LFCrossSliceBoundaryFlag; 409 RK_U32 m_enableTMVPFlag; 410 411 RK_U32 slice_reserved_flag; 412 RK_U32 no_output_of_prior_pics_flag; 413 RK_U32 slice_header_extension_length; 414 RK_U32 ref_pic_list_modification_flag_l0; 415 RK_U32 lst_entry_l0; 416 RK_U32 tot_poc_num; 417 RK_U32 num_long_term_sps; 418 RK_U32 num_long_term_pics; 419 } H265eSlice; 420 421 #ifdef __cplusplus 422 extern "C" { 423 #endif 424 425 void h265e_slice_set_ref_list(H265eDpbFrm *frame_list, H265eSlice *slice); 426 void h265e_slice_set_ref_poc_list(H265eSlice *slice); 427 void h265e_slice_init(void *ctx, EncFrmStatus curr); 428 RK_S32 h265e_code_slice_skip_frame(void *ctx, H265eSlice *slice, RK_U8 *buf, RK_S32 len); 429 430 #ifdef __cplusplus 431 } 432 #endif 433 434 #endif /* __H265E_SLICE_H__ */ 435