1 /* drivers/input/touchscreen/gt1x_update.c
2 *
3 * 2010 - 2014 Goodix Technology.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be a reference
11 * to you, when you are integrating the GOODiX's CTP IC into your system,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * Version: 1.4
17 * Release Date: 2015/07/10
18 */
19 #include <linux/interrupt.h>
20 #include <linux/i2c.h>
21 #include <linux/sched.h>
22 #include <linux/kthread.h>
23 #include <linux/wait.h>
24 #include <linux/time.h>
25 #include <linux/delay.h>
26 #include <linux/namei.h>
27 #include <linux/mount.h>
28 #include <linux/uaccess.h>
29
30 #include "gt1x_generic.h"
31 #if (GTP_HOTKNOT || GTP_HEADER_FW_UPDATE)
32 #include "gt1x_firmware.h"
33 #endif
34
35 #define UPDATE_FILE_PATH_1 "/data/_goodix_update_.bin"
36 #define UPDATE_FILE_PATH_2 "/sdcard/_goodix_update_.bin"
37
38 #define CONFIG_FILE_PATH_1 "/data/_gt1x_config_.cfg"
39 #define CONFIG_FILE_PATH_2 "/sdcard/_gt1x_config_.cfg"
40
41 #define FOUND_FW_PATH_1 0x01
42 #define FOUND_FW_PATH_2 0x02
43 #define FOUND_CFG_PATH_1 0x04
44 #define FOUND_CFG_PATH_2 0x08
45
46 #define PACK_SIZE 256
47
48 /*hardware register define*/
49 #define _bRW_MISCTL__SRAM_BANK 0x4048
50 #define _bRW_MISCTL__MEM_CD_EN 0x4049
51 #define _bRW_MISCTL__CACHE_EN 0x404B
52 #define _bRW_MISCTL__TMR0_EN 0x40B0
53 #define _rRW_MISCTL__SWRST_B0_ 0x4180
54 #define _bWO_MISCTL__CPU_SWRST_PULSE 0x4184
55 #define _rRW_MISCTL__BOOTCTL_B0_ 0x4190
56 #define _rRW_MISCTL__BOOT_OPT_B0_ 0x4218
57 #define _rRW_MISCTL__BOOT_CTL_ 0x5094
58 #define _bRW_MISCTL__DSP_MCU_PWR_ 0x4010
59 #define _bRW_MISCTL__PATCH_AREA_EN_ 0x404D
60
61 /*
62 1. firmware structure
63 header: 128b
64 offset size content
65 0 4 firmware length
66 4 2 checksum
67 6 6 target MASK name
68 12 3 target MASK version
69 15 6 TP subsystem PID
70 21 3 TP subsystem version
71 24 1 subsystem count
72 25 1 chip type 0x91: GT1X, 0x92: GT2X
73 26 6 reserved
74 32 8 subsystem info[0]
75 32 8 subsystem info[1]
76 .....
77 120 8 subsystem info[11]
78 body: followed header
79 128 N0 subsystem[0]
80 128+N0 N1 subsystem[1]
81 ....
82 2. subsystem info structure
83 offset size content
84 0 1 subsystem type
85 1 2 subsystem length
86 3 2 stored address in flash addr = value * 256
87 5 3 reserved
88
89 */
90
91 #define FW_HEAD_SIZE 128
92 #define FW_HEAD_SUBSYSTEM_INFO_SIZE 8
93 #define FW_HEAD_OFFSET_SUBSYSTEM_INFO_BASE 32
94
95 #define FW_SECTION_TYPE_SS51_ISP 0x01
96 #define FW_SECTION_TYPE_SS51_PATCH 0x02
97 #define FW_SECTION_TYPE_SS51_PATCH_OVERLAY 0x03
98 #define FW_SECTION_TYPE_DSP 0x04
99 #define FW_SECTION_TYPE_HOTKNOT 0x05
100 #define FW_SECTION_TYPE_GESTURE 0x06
101 #define FW_SECTION_TYPE_GESTURE_OVERLAY 0x07
102 #define FW_SECTION_TYPE_FLASHLESS_FAST_POWER 0x08
103
104 #define UPDATE_TYPE_HEADER 0
105 #define UPDATE_TYPE_FILE 1
106
107 #define UPDATE_STATUS_IDLE 0
108 #define UPDATE_STATUS_RUNNING 1
109 #define UPDATE_STATUS_ABORT 2
110
111 struct fw_subsystem_info {
112 int type;
113 int length;
114 u32 address;
115 int offset;
116 };
117
118 #pragma pack(1)
119 struct fw_info {
120 u32 length;
121 u16 checksum;
122 u8 target_mask[6];
123 u8 target_mask_version[3];
124 u8 pid[6];
125 u8 version[3];
126 u8 subsystem_count;
127 u8 chip_type;
128 u8 reserved[6];
129 struct fw_subsystem_info subsystem[12];
130 };
131 #pragma pack()
132
133 struct fw_update_info update_info = {
134 .status = UPDATE_STATUS_IDLE,
135 .progress = 0,
136 .max_progress = 9,
137 .force_update = 0
138 };
139
140 // int gt1x_update_prepare(char *filename);
141 int gt1x_check_firmware(void);
142 u8 *gt1x_get_fw_data(u32 offset, int length);
143 int gt1x_update_judge(void);
144 int gt1x_run_ss51_isp(u8 *ss51_isp, int length);
145 int gt1x_burn_subsystem(struct fw_subsystem_info *subsystem);
146 u16 gt1x_calc_checksum(u8 *fw, u32 length);
147 int gt1x_recall_check(u8 *chk_src, u16 start_rd_addr, u16 chk_length);
148 void gt1x_update_cleanup(void);
149 int gt1x_check_subsystem_in_flash(struct fw_subsystem_info *subsystem);
150 int gt1x_read_flash(u32 addr, int length);
151 int gt1x_error_erase(void);
152 // void dump_to_file(u16 addr, int length, char *filepath);
153
154 int gt1x_update_firmware(void *filename);
155 int gt1x_auto_update_proc(void *data);
156
157 #if !GTP_HEADER_FW_UPDATE
158 // static int gt1x_search_update_files(void);
159 #endif
160
161 int gt1x_hold_ss51_dsp(void);
162 void gt1x_leave_update_mode(void);
163
164 /**
165 * @return: return 0 if success, otherwise return a negative number
166 * which contains the error code.
167 */
168 #if 0 //close for GKI
169 s32 gt1x_check_fs_mounted(char *path_name)
170 {
171 struct path root_path;
172 struct path path;
173 s32 err;
174
175 err = kern_path("/", LOOKUP_FOLLOW, &root_path);
176 if (err)
177 return ERROR_PATH;
178
179 err = kern_path(path_name, LOOKUP_FOLLOW, &path);
180 if (err) {
181 err = ERROR_PATH;
182 goto check_fs_fail;
183 }
184
185 if (path.mnt->mnt_sb == root_path.mnt->mnt_sb) {
186 /*not mounted*/
187 err = ERROR_PATH;
188 } else {
189 err = 0;
190 }
191
192 path_put(&path);
193 check_fs_fail:
194 path_put(&root_path);
195 return err;
196 }
197 #endif
198
gt1x_i2c_write_with_readback(u16 addr,u8 * buffer,int length)199 int gt1x_i2c_write_with_readback(u16 addr, u8 *buffer, int length)
200 {
201 u8 buf[100];
202 int ret = gt1x_i2c_write(addr, buffer, length);
203 if (ret) {
204 return ret;
205 }
206 ret = gt1x_i2c_read(addr, buf, length);
207 if (ret) {
208 return ret;
209 }
210 if (memcmp(buf, buffer, length)) {
211 return ERROR_CHECK;
212 }
213 return 0;
214 }
215
216 #define getU32(a) ((u32)getUint((u8 *)(a), 4))
217 #define getU16(a) ((u16)getUint((u8 *)(a), 2))
getUint(u8 * buffer,int len)218 u32 getUint(u8 *buffer, int len)
219 {
220 u32 num = 0;
221 int i;
222 for (i = 0; i < len; i++) {
223 num <<= 8;
224 num += buffer[i];
225 }
226 return num;
227 }
228
gt1x_auto_update_proc(void * data)229 int gt1x_auto_update_proc(void *data)
230 {
231 /* auto update from /data/_goodix_update_.bin
232 * Does not meet the gki standard.
233 * close auto update function.
234 */
235 GTP_ERROR("auto update failed! return\n");
236 return 0;
237 #if 0
238 #if GTP_HEADER_FW_UPDATE
239 GTP_INFO("Start auto update thread...");
240 gt1x_update_firmware(NULL);
241 #else
242 int ret;
243 char *filename;
244 u8 config[GTP_CONFIG_MAX_LENGTH] = { 0 };
245
246 GTP_INFO("Start auto update thread...");
247 ret = gt1x_search_update_files();
248 if (ret & (FOUND_FW_PATH_1 | FOUND_FW_PATH_2)) {
249 if (ret & FOUND_FW_PATH_1) {
250 filename = UPDATE_FILE_PATH_1;
251 } else {
252 filename = UPDATE_FILE_PATH_2;
253 }
254 gt1x_update_firmware(filename);
255 }
256
257 if (ret & (FOUND_CFG_PATH_1 | FOUND_CFG_PATH_2)) {
258 if (ret & FOUND_CFG_PATH_1) {
259 filename = CONFIG_FILE_PATH_1;
260 } else {
261 filename = CONFIG_FILE_PATH_2;
262 }
263
264 if (gt1x_parse_config(filename, config) > 0) {
265 if (gt1x_i2c_write(GTP_REG_CONFIG_DATA, config, GTP_CONFIG_MAX_LENGTH)) {
266 GTP_ERROR("Update config failed!");
267 } else {
268 GTP_INFO("Update config successfully!");
269 }
270 }
271 }
272 #endif
273 return 0;
274 #endif
275 }
276 #if 0 //!GTP_HEADER_FW_UPDATE
277 static int gt1x_search_update_files(void)
278 {
279 /*wait 10s(max) if fs is not ready*/
280 int retry = 20 * 2;
281 struct file *pfile = NULL;
282 mm_segment_t old_fs;
283 int found = 0;
284
285 old_fs = get_fs();
286 set_fs(KERNEL_DS);
287
288 GTP_INFO("Search firmware file...");
289 while (retry-- > 0) {
290 msleep(500);
291 /*check if rootfs is ready*/
292 if (gt1x_check_fs_mounted("/data")) {
293 GTP_DEBUG("filesystem is not ready");
294 continue;
295 }
296 /*search firmware*/
297 pfile = filp_open(UPDATE_FILE_PATH_1, O_RDONLY, 0);
298 if (IS_ERR(pfile)) {
299 pfile = filp_open(UPDATE_FILE_PATH_2, O_RDONLY, 0);
300 if (!IS_ERR(pfile)) {
301 found |= FOUND_FW_PATH_2;
302 }
303 } else {
304 found |= FOUND_FW_PATH_1;
305 }
306
307 if (!IS_ERR(pfile)) {
308 filp_close(pfile, NULL);
309 }
310 /*search config file*/
311 pfile = filp_open(CONFIG_FILE_PATH_1, O_RDONLY, 0);
312 if (IS_ERR(pfile)) {
313 pfile = filp_open(CONFIG_FILE_PATH_2, O_RDONLY, 0);
314 if (!IS_ERR(pfile)) {
315 found |= FOUND_CFG_PATH_2;
316 }
317 } else {
318 found |= FOUND_CFG_PATH_1;
319 }
320 if (!IS_ERR(pfile)) {
321 filp_close(pfile, NULL);
322 }
323
324 if (found) {
325 break;
326 }
327
328 GTP_INFO("Not found firmware or config file, retry.");
329 }
330 set_fs(old_fs);
331
332 return found;
333 }
334 #endif
335
gt1x_enter_update_mode(void)336 void gt1x_enter_update_mode(void)
337 {
338 GTP_DEBUG("Enter FW update mode.");
339 #if GTP_ESD_PROTECT
340 gt1x_esd_switch(SWITCH_OFF);
341 #endif
342 #if GTP_CHARGER_SWITCH
343 gt1x_charger_switch(SWITCH_OFF);
344 #endif
345 gt1x_irq_disable();
346 }
347
gt1x_update_firmware(void * filename)348 int gt1x_update_firmware(void *filename)
349 {
350 /*
351 * gt1x update firmware doesn't meet gki
352 */
353 GTP_ERROR("gt1x update firmware failed\n");
354 return 0;
355 #if 0
356 int i = 0;
357 int ret = 0;
358 u8 *p;
359
360 if (update_info.status != UPDATE_STATUS_IDLE) {
361 GTP_ERROR("Update process is running!");
362 return ERROR;
363 }
364 update_info.status = UPDATE_STATUS_RUNNING;
365 update_info.progress = 0;
366
367 gt1x_enter_update_mode();
368
369 ret = gt1x_update_prepare(filename);
370 if (ret) {
371 update_info.status = UPDATE_STATUS_IDLE;
372 return ret;
373 }
374
375 ret = gt1x_check_firmware();
376 if (ret) {
377 update_info.status = UPDATE_STATUS_ABORT;
378 goto gt1x_update_exit;
379 }
380 #if GTP_FW_UPDATE_VERIFY
381 update_info.max_progress =
382 6 + update_info.firmware->subsystem_count;
383 #else
384 update_info.max_progress =
385 3 + update_info.firmware->subsystem_count;
386 #endif
387 update_info.progress++;
388
389 ret = gt1x_update_judge();
390 if (ret) {
391 update_info.status = UPDATE_STATUS_ABORT;
392 goto gt1x_update_exit;
393 }
394 update_info.progress++;
395
396 p = gt1x_get_fw_data(update_info.firmware->subsystem[0].offset, update_info.firmware->subsystem[0].length);
397 if (p == NULL) {
398 GTP_ERROR("get isp fail");
399 ret = ERROR_FW;
400 update_info.status = UPDATE_STATUS_ABORT;
401 goto gt1x_update_exit;
402 }
403 update_info.progress++;
404
405 ret = gt1x_run_ss51_isp(p, update_info.firmware->subsystem[0].length);
406 if (ret) {
407 GTP_ERROR("run isp fail");
408 goto gt1x_update_exit;
409 }
410 update_info.progress++;
411 msleep(800);
412
413 for (i = 1; i < update_info.firmware->subsystem_count; i++) {
414 GTP_INFO("subsystem: %d", update_info.firmware->subsystem[i].type);
415 GTP_INFO("Length: %d", update_info.firmware->subsystem[i].length);
416 GTP_INFO("Address: %d", update_info.firmware->subsystem[i].address);
417
418 ret = gt1x_burn_subsystem(&(update_info.firmware->subsystem[i]));
419 if (ret) {
420 GTP_ERROR("burn subsystem fail!");
421 goto gt1x_update_exit;
422 }
423 update_info.progress++;
424 }
425
426 #if GTP_FW_UPDATE_VERIFY
427 gt1x_reset_guitar();
428
429 p = gt1x_get_fw_data(update_info.firmware->subsystem[0].offset, update_info.firmware->subsystem[0].length);
430 if (p == NULL) {
431 GTP_ERROR("get isp fail");
432 ret = ERROR_FW;
433 goto gt1x_update_exit;
434 }
435 update_info.progress++;
436
437 ret = gt1x_run_ss51_isp(p, update_info.firmware->subsystem[0].length);
438 if (ret) {
439 GTP_ERROR("run isp fail");
440 goto gt1x_update_exit;
441 }
442 update_info.progress++;
443
444 GTP_INFO("Reset guitar & check firmware in flash.");
445 for (i = 1; i < update_info.firmware->subsystem_count; i++) {
446 GTP_INFO("subsystem: %d", update_info.firmware->subsystem[i].type);
447 GTP_INFO("Length: %d", update_info.firmware->subsystem[i].length);
448 GTP_INFO("Address: %d", update_info.firmware->subsystem[i].address);
449
450 ret = gt1x_check_subsystem_in_flash(&(update_info.firmware->subsystem[i]));
451 if (ret) {
452 gt1x_error_erase();
453 break;
454 }
455 }
456 update_info.progress++;
457 #endif
458
459 gt1x_update_exit:
460 gt1x_update_cleanup();
461 gt1x_leave_update_mode();
462 gt1x_read_version(NULL);
463 if (ret) {
464 update_info.progress = 2 * update_info.max_progress;
465 GTP_ERROR("Update firmware failed!");
466 return ret;
467 } else if (gt1x_init_failed) {
468 gt1x_read_version(>1x_version);
469 gt1x_init_panel();
470 #if GTP_CHARGER_SWITCH
471 gt1x_parse_chr_cfg(gt1x_version.sensor_id);
472 #endif
473 #if GTP_SMART_COVER
474 gt1x_parse_sc_cfg(gt1x_version.sensor_id);
475 #endif
476 }
477 GTP_INFO("Update firmware succeefully!");
478 return ret;
479 #endif
480 }
481
482 #if 0 //close for GKI
483 int gt1x_update_prepare(char *filename)
484 {
485 int ret = 0;
486 int retry = 5;
487 if (filename == NULL) {
488 #if GTP_HEADER_FW_UPDATE
489 update_info.fw_name = NULL;
490 update_info.update_type = UPDATE_TYPE_HEADER;
491 update_info.fw_data = gt1x_default_FW;
492 update_info.fw_length = sizeof(gt1x_default_FW);
493 #else
494 GTP_ERROR("No Fw in .h file!");
495 return ERROR_FW;
496 #endif
497 } else {
498 GTP_INFO("Firmware: %s", filename);
499 update_info.old_fs = get_fs();
500 set_fs(KERNEL_DS);
501 update_info.fw_name = filename;
502 update_info.update_type = UPDATE_TYPE_FILE;
503 update_info.fw_file = filp_open(update_info.fw_name, O_RDONLY, 0);
504 if (IS_ERR(update_info.fw_file)) {
505 GTP_ERROR("Open update file(%s) error!", update_info.fw_name);
506 set_fs(update_info.old_fs);
507 return ERROR_FILE;
508 }
509 update_info.fw_file->f_op->llseek(update_info.fw_file, 0, SEEK_SET);
510 update_info.fw_length = update_info.fw_file->f_op->llseek(update_info.fw_file, 0, SEEK_END);
511 }
512
513 while (retry > 0) {
514 retry--;
515 update_info.firmware = kzalloc(sizeof(struct fw_info), GFP_KERNEL);
516 if (update_info.firmware == NULL) {
517 GTP_INFO("Alloc %zu bytes memory fail.", sizeof(struct fw_info));
518 continue;
519 } else {
520 GTP_INFO("Alloc %zu bytes memory success.", sizeof(struct fw_info));
521 break;
522 }
523 }
524 if (retry <= 0) {
525 ret = ERROR_RETRY;
526 goto gt1x_update_pre_fail1;
527 }
528
529 retry = 5;
530 while (retry > 0) {
531 update_info.buffer = kzalloc(1024 * 4, GFP_KERNEL);
532 if (update_info.buffer == NULL) {
533 GTP_ERROR("Alloc %d bytes memory fail.", 1024 * 4);
534 continue;
535 } else {
536 GTP_INFO("Alloc %d bytes memory success.", 1024 * 4);
537 break;
538 }
539 }
540 if (retry <= 0) {
541 ret = ERROR_RETRY;
542 goto gt1x_update_pre_fail0;
543 }
544
545 return 0;
546
547 gt1x_update_pre_fail0:
548 kfree(update_info.firmware);
549 gt1x_update_pre_fail1:
550 filp_close(update_info.fw_file, NULL);
551 return ret;
552 }
553
554 void gt1x_update_cleanup(void)
555 {
556 if (update_info.update_type == UPDATE_TYPE_FILE) {
557 if (update_info.fw_file != NULL) {
558 filp_close(update_info.fw_file, NULL);
559 update_info.fw_file = NULL;
560 }
561 set_fs(update_info.old_fs);
562 }
563
564 if (update_info.buffer != NULL) {
565 kfree(update_info.buffer);
566 update_info.buffer = NULL;
567 }
568 if (update_info.firmware != NULL) {
569 kfree(update_info.firmware);
570 update_info.firmware = NULL;
571 }
572 }
573
574 int gt1x_check_firmware(void)
575 {
576 u16 checksum;
577 u16 checksum_in_header;
578 u8 *p;
579 struct fw_info *firmware;
580 int i;
581 int offset;
582
583 /*compare file length with the length field in the firmware header*/
584 if (update_info.fw_length < FW_HEAD_SIZE) {
585 GTP_ERROR("Bad firmware!(file length: %d)", update_info.fw_length);
586 return ERROR_CHECK;
587 }
588 p = gt1x_get_fw_data(0, 6);
589 if (p == NULL) {
590 return ERROR_FW;
591 }
592
593 if (getU32(p) + 6 != update_info.fw_length) {
594 GTP_ERROR("Bad firmware!(file length: %d, header define: %d)", update_info.fw_length, getU32(p));
595 return ERROR_CHECK;
596 }
597 /*check firmware's checksum*/
598 checksum_in_header = getU16(&p[4]);
599 checksum = 0;
600 for (i = 6; i < update_info.fw_length; i++) {
601 p = gt1x_get_fw_data(i, 1);
602 if (p == NULL) {
603 return ERROR_FW;
604 }
605 checksum += p[0];
606 }
607
608 if (checksum != checksum_in_header) {
609 GTP_ERROR("Bad firmware!(checksum: 0x%04X, header define: 0x%04X)", checksum, checksum_in_header);
610 return ERROR_CHECK;
611 }
612 /*parse firmware*/
613 p = gt1x_get_fw_data(0, FW_HEAD_SIZE);
614 if (p == NULL) {
615 return ERROR_FW;
616 }
617 memcpy((u8 *) update_info.firmware, p, FW_HEAD_SIZE - 8 * 12);
618 update_info.firmware->pid[5] = 0;
619
620 p = &p[FW_HEAD_OFFSET_SUBSYSTEM_INFO_BASE];
621 firmware = update_info.firmware;
622 offset = FW_HEAD_SIZE;
623 for (i = 0; i < firmware->subsystem_count; i++) {
624 firmware->subsystem[i].type = p[i * FW_HEAD_SUBSYSTEM_INFO_SIZE];
625 firmware->subsystem[i].length = getU16(&p[i * FW_HEAD_SUBSYSTEM_INFO_SIZE + 1]);
626 firmware->subsystem[i].address = getU16(&p[i * FW_HEAD_SUBSYSTEM_INFO_SIZE + 3]) * 256;
627 firmware->subsystem[i].offset = offset;
628 offset += firmware->subsystem[i].length;
629 }
630
631 /*print update information*/
632 GTP_INFO("Update type: %s", update_info.update_type == UPDATE_TYPE_HEADER ? "Header" : "File");
633 GTP_INFO("Firmware length: %d", update_info.fw_length);
634 GTP_INFO("Firmware product: GT%s", update_info.firmware->pid);
635 GTP_INFO("Firmware patch: %02X%02X%02X", update_info.firmware->version[0], update_info.firmware->version[1], update_info.firmware->version[2]);
636 GTP_INFO("Firmware chip: 0x%02X", update_info.firmware->chip_type);
637 GTP_INFO("Subsystem count: %d", update_info.firmware->subsystem_count);
638 for (i = 0; i < update_info.firmware->subsystem_count; i++) {
639 GTP_DEBUG("------------------------------------------");
640 GTP_DEBUG("Subsystem: %d", i);
641 GTP_DEBUG("Type: %d", update_info.firmware->subsystem[i].type);
642 GTP_DEBUG("Length: %d", update_info.firmware->subsystem[i].length);
643 GTP_DEBUG("Address: 0x%08X", update_info.firmware->subsystem[i].address);
644 GTP_DEBUG("Offset: %d", update_info.firmware->subsystem[i].offset);
645 }
646
647 return 0;
648 }
649 #endif
650
651 /**
652 * @return: return a pointer pointed at the content of firmware
653 * if success, otherwise return NULL.
654 */
gt1x_get_fw_data(u32 offset,int length)655 u8 *gt1x_get_fw_data(u32 offset, int length)
656 {
657 int ret;
658 if (update_info.update_type == UPDATE_TYPE_FILE) {
659 update_info.fw_file->f_op->llseek(update_info.fw_file, offset, SEEK_SET);
660 ret = update_info.fw_file->f_op->read(update_info.fw_file, (char *)update_info.buffer, length, &update_info.fw_file->f_pos);
661 if (ret < 0) {
662 GTP_ERROR("Read data error!");
663 return NULL;
664 }
665 return update_info.buffer;
666 } else {
667 return &update_info.fw_data[offset];
668 }
669 }
670
gt1x_update_judge(void)671 int gt1x_update_judge(void)
672 {
673 int ret;
674 u8 reg_val[2] = {0};
675 u8 retry = 2;
676 struct gt1x_version_info ver_info;
677 struct gt1x_version_info fw_ver_info;
678
679 fw_ver_info.mask_id = (update_info.firmware->target_mask_version[0] << 16)
680 | (update_info.firmware->target_mask_version[1] << 8)
681 | (update_info.firmware->target_mask_version[2]);
682 fw_ver_info.patch_id = (update_info.firmware->version[0] << 16)
683 | (update_info.firmware->version[1] << 8)
684 | (update_info.firmware->version[2]);
685 memcpy(fw_ver_info.product_id, update_info.firmware->pid, 4);
686 fw_ver_info.product_id[4] = 0;
687
688 /* check fw status reg */
689 do {
690 ret = gt1x_i2c_read_dbl_check(GTP_REG_FW_CHK_MAINSYS, reg_val, 1);
691 if (ret < 0) { /* read reg failed */
692 goto _reset;
693 } else if (ret > 0) {
694 continue;
695 }
696
697 ret = gt1x_i2c_read_dbl_check(GTP_REG_FW_CHK_SUBSYS, ®_val[1], 1);
698 if (ret < 0) {
699 goto _reset;
700 } else if (ret > 0) {
701 continue;
702 }
703
704 break;
705 _reset:
706 gt1x_reset_guitar();
707 } while (--retry);
708
709 if (!retry) {
710 GTP_INFO("Update abort because of i2c error.");
711 return ERROR_CHECK;
712 }
713 if (reg_val[0] != 0xBE || reg_val[1] == 0xAA) {
714 GTP_INFO("Check fw status reg not pass,reg[0x814E]=0x%2X,reg[0x5095]=0x%2X!",
715 reg_val[0], reg_val[1]);
716 return 0;
717 }
718
719 ret = gt1x_read_version(&ver_info);
720 if (ret < 0) {
721 GTP_INFO("Get IC's version info failed, force update!");
722 return 0;
723 }
724
725 if (memcmp(fw_ver_info.product_id, ver_info.product_id, 4)) {
726 GTP_INFO("Product id is not match!");
727 return ERROR_CHECK;
728 }
729 if ((fw_ver_info.mask_id & 0xFFFFFF00) != (ver_info.mask_id & 0xFFFFFF00)) {
730 GTP_INFO("Mask id is not match!");
731 return ERROR_CHECK;
732 }
733 if ((fw_ver_info.patch_id & 0xFF0000) != (ver_info.patch_id & 0xFF0000)) {
734 GTP_INFO("CID is not equal, need update!");
735 return 0;
736 }
737 #if GTP_DEBUG_ON
738 if (update_info.force_update) {
739 GTP_DEBUG("Debug mode, force update fw.");
740 return 0;
741 }
742 #endif
743 if ((fw_ver_info.patch_id & 0xFFFF) <= (ver_info.patch_id & 0xFFFF)) {
744 GTP_INFO("The version of the fw is not high than the IC's!");
745 return ERROR_CHECK;
746 }
747 return 0;
748 }
749
__gt1x_hold_ss51_dsp_20(void)750 int __gt1x_hold_ss51_dsp_20(void)
751 {
752 int ret = -1;
753 int retry = 0;
754 u8 buf[1];
755 int hold_times = 0;
756
757 while (retry++ < 30) {
758 /*Hold ss51 & dsp*/
759 buf[0] = 0x0C;
760 ret = gt1x_i2c_write(_rRW_MISCTL__SWRST_B0_, buf, 1);
761 if (ret) {
762 GTP_ERROR("Hold ss51 & dsp I2C error,retry:%d", retry);
763 continue;
764 }
765 /*Confirm hold*/
766 buf[0] = 0x00;
767 ret = gt1x_i2c_read(_rRW_MISCTL__SWRST_B0_, buf, 1);
768 if (ret) {
769 GTP_ERROR("Hold ss51 & dsp I2C error,retry:%d", retry);
770 continue;
771 }
772 if (0x0C == buf[0]) {
773 if (hold_times++ < 20) {
774 continue;
775 } else {
776 break;
777 }
778 }
779 GTP_ERROR("Hold ss51 & dsp confirm 0x4180 failed,value:%d", buf[0]);
780 }
781 if (retry >= 30) {
782 GTP_ERROR("Hold ss51&dsp failed!");
783 return ERROR_RETRY;
784 }
785
786 GTP_INFO("Hold ss51&dsp successfully.");
787 return 0;
788 }
789
gt1x_hold_ss51_dsp(void)790 int gt1x_hold_ss51_dsp(void)
791 {
792 int ret = ERROR, retry = 5;
793 u8 buffer[2];
794
795 do {
796 gt1x_select_addr();
797 ret = gt1x_i2c_read(0x4220, buffer, 1);
798
799 } while (retry-- && ret < 0);
800
801 if (ret < 0)
802 return ERROR;
803
804 /*hold ss51_dsp*/
805 ret = __gt1x_hold_ss51_dsp_20();
806 if (ret) {
807 return ret;
808 }
809 /*enable dsp & mcu power*/
810 buffer[0] = 0x00;
811 ret = gt1x_i2c_write_with_readback(_bRW_MISCTL__DSP_MCU_PWR_, buffer, 1);
812 if (ret) {
813 GTP_ERROR("enabel dsp & mcu power fail!");
814 return ret;
815 }
816 /*disable watchdog*/
817 buffer[0] = 0x00;
818 ret = gt1x_i2c_write_with_readback(_bRW_MISCTL__TMR0_EN, buffer, 1);
819 if (ret) {
820 GTP_ERROR("disable wdt fail!");
821 return ret;
822 }
823 /*clear cache*/
824 buffer[0] = 0x00;
825 ret = gt1x_i2c_write_with_readback(_bRW_MISCTL__CACHE_EN, buffer, 1);
826 if (ret) {
827 GTP_ERROR("clear cache fail!");
828 return ret;
829 }
830 /*soft reset*/
831 buffer[0] = 0x01;
832 ret = gt1x_i2c_write(_bWO_MISCTL__CPU_SWRST_PULSE, buffer, 1);
833 if (ret) {
834 GTP_ERROR("software reset fail!");
835 return ret;
836 }
837 /*set scramble*/
838 buffer[0] = 0x00;
839 ret = gt1x_i2c_write_with_readback(_rRW_MISCTL__BOOT_OPT_B0_, buffer, 1);
840 if (ret) {
841 GTP_ERROR("set scramble fail!");
842 return ret;
843 }
844
845 return 0;
846 }
847
gt1x_run_ss51_isp(u8 * ss51_isp,int length)848 int gt1x_run_ss51_isp(u8 *ss51_isp, int length)
849 {
850 int ret;
851 u8 buffer[10];
852
853 ret = gt1x_hold_ss51_dsp();
854 if (ret) {
855 return ret;
856 }
857 /*select bank4*/
858 buffer[0] = 0x04;
859 ret = gt1x_i2c_write_with_readback(_bRW_MISCTL__SRAM_BANK, buffer, 1);
860 if (ret) {
861 GTP_ERROR("select bank4 fail.");
862 return ret;
863 }
864 /*enable patch area access*/
865 buffer[0] = 0x01;
866 ret = gt1x_i2c_write_with_readback(_bRW_MISCTL__PATCH_AREA_EN_, buffer, 1);
867 if (ret) {
868 GTP_ERROR("enable patch area access fail!");
869 return ret;
870 }
871
872 GTP_INFO("ss51_isp length: %d, checksum: 0x%04X", length, gt1x_calc_checksum(ss51_isp, length));
873 /*load ss51 isp*/
874 ret = gt1x_i2c_write(0xC000, ss51_isp, length);
875 if (ret) {
876 GTP_ERROR("load ss51 isp fail!");
877 return ret;
878 }
879 /*recall compare*/
880 ret = gt1x_recall_check(ss51_isp, 0xC000, length);
881 if (ret) {
882 GTP_ERROR("recall check ss51 isp fail!");
883 return ret;
884 }
885
886 memset(buffer, 0xAA, 10);
887 ret = gt1x_i2c_write_with_readback(0x8140, buffer, 10);
888
889 /*disable patch area access*/
890 buffer[0] = 0x00;
891 ret = gt1x_i2c_write_with_readback(_bRW_MISCTL__PATCH_AREA_EN_, buffer, 1);
892 if (ret) {
893 GTP_ERROR("disable patch area access fail!");
894 return ret;
895 }
896 /*set 0x8006*/
897 memset(buffer, 0x55, 8);
898 ret = gt1x_i2c_write_with_readback(0x8006, buffer, 8);
899 if (ret) {
900 GTP_ERROR("set 0x8006[0~7] 0x55 fail!");
901 return ret;
902 }
903 /*release ss51*/
904 buffer[0] = 0x08;
905 ret = gt1x_i2c_write_with_readback(_rRW_MISCTL__SWRST_B0_, buffer, 1);
906 if (ret) {
907 GTP_ERROR("release ss51 fail!");
908 return ret;
909 }
910
911 msleep(100);
912 /*check run state*/
913 ret = gt1x_i2c_read(0x8006, buffer, 2);
914 if (ret) {
915 GTP_ERROR("read 0x8006 fail!");
916 return ret;
917 }
918 if (!(buffer[0] == 0xAA && buffer[1] == 0xBB)) {
919 GTP_ERROR("ERROR: isp is not running! 0x8006: %02X %02X", buffer[0], buffer[1]);
920 return ERROR_CHECK;
921 }
922
923 return 0;
924 }
925
gt1x_calc_checksum(u8 * fw,u32 length)926 u16 gt1x_calc_checksum(u8 *fw, u32 length)
927 {
928 u32 i = 0;
929 u32 checksum = 0;
930
931 for (i = 0; i < length; i += 2) {
932 checksum += (((int)fw[i]) << 8);
933 checksum += fw[i + 1];
934 }
935 return (checksum & 0xFFFF);
936 }
937
gt1x_recall_check(u8 * chk_src,u16 start_addr,u16 chk_length)938 int gt1x_recall_check(u8 *chk_src, u16 start_addr, u16 chk_length)
939 {
940 u8 rd_buf[PACK_SIZE];
941 s32 ret = 0;
942 u16 len = 0;
943 u32 compared_length = 0;
944
945 while (chk_length > 0) {
946 len = (chk_length > PACK_SIZE ? PACK_SIZE : chk_length);
947
948 ret = gt1x_i2c_read(start_addr + compared_length, rd_buf, len);
949 if (ret) {
950 GTP_ERROR("recall i2c error,exit!");
951 return ret;
952 }
953
954 if (memcmp(rd_buf, &chk_src[compared_length], len)) {
955 GTP_ERROR("Recall frame not equal(addr: 0x%04X)", start_addr + compared_length);
956 GTP_DEBUG("chk_src array:");
957 GTP_DEBUG_ARRAY(&chk_src[compared_length], len);
958 GTP_DEBUG("recall array:");
959 GTP_DEBUG_ARRAY(rd_buf, len);
960 return ERROR_CHECK;
961 }
962
963 chk_length -= len;
964 compared_length += len;
965 }
966
967 GTP_DEBUG("Recall check %d bytes(address: 0x%04X) success.", compared_length, start_addr);
968 return 0;
969 }
970
gt1x_burn_subsystem(struct fw_subsystem_info * subsystem)971 int gt1x_burn_subsystem(struct fw_subsystem_info *subsystem)
972 {
973 int block_len;
974 u16 checksum;
975 int burn_len = 0;
976 u16 cur_addr;
977 u32 length = subsystem->length;
978 u8 buffer[10];
979 int ret;
980 int wait_time;
981 int burn_state;
982 int retry = 5;
983 u8 *fw;
984
985 GTP_INFO("Subsystem: %d", subsystem->type);
986 GTP_INFO("Length: %d", subsystem->length);
987 GTP_INFO("Address: 0x%08X", subsystem->address);
988
989 while (length > 0 && retry > 0) {
990 retry--;
991
992 block_len = length > 1024 * 4 ? 1024 * 4 : length;
993
994 GTP_INFO("Burn block ==> length: %d, address: 0x%08X", block_len, subsystem->address + burn_len);
995 fw = gt1x_get_fw_data(subsystem->offset + burn_len, block_len);
996 if (!fw)
997 return ERROR_FW;
998 cur_addr = ((subsystem->address + burn_len) >> 8);
999
1000 checksum = 0;
1001 checksum += block_len;
1002 checksum += cur_addr;
1003 checksum += gt1x_calc_checksum(fw, block_len);
1004 checksum = (0 - checksum);
1005
1006 buffer[0] = ((block_len >> 8) & 0xFF);
1007 buffer[1] = (block_len & 0xFF);
1008 buffer[2] = ((cur_addr >> 8) & 0xFF);
1009 buffer[3] = (cur_addr & 0xFF);
1010
1011 ret = gt1x_i2c_write_with_readback(0x8100, buffer, 4);
1012 if (ret) {
1013 GTP_ERROR("write length & address fail!");
1014 continue;
1015 }
1016
1017 ret = gt1x_i2c_write(0x8100 + 4, fw, block_len);
1018 if (ret) {
1019 GTP_ERROR("write fw data fail!");
1020 continue;
1021 }
1022
1023 buffer[0] = ((checksum >> 8) & 0xFF);
1024 buffer[1] = (checksum & 0xFF);
1025 ret = gt1x_i2c_write_with_readback(0x8100 + 4 + block_len, buffer, 2);
1026 if (ret) {
1027 GTP_ERROR("write checksum fail!");
1028 continue;
1029 }
1030
1031 buffer[0] = 0;
1032 ret = gt1x_i2c_write_with_readback(0x8022, buffer, 1);
1033 if (ret) {
1034 GTP_ERROR("clear control flag fail!");
1035 continue;
1036 }
1037
1038 buffer[0] = subsystem->type;
1039 buffer[1] = subsystem->type;
1040 ret = gt1x_i2c_write_with_readback(0x8020, buffer, 2);
1041 if (ret) {
1042 GTP_ERROR("write subsystem type fail!");
1043 continue;
1044 }
1045 burn_state = ERROR;
1046 wait_time = 200;
1047 usleep_range(5000, 6000);
1048
1049 while (wait_time-- > 0) {
1050 u8 confirm = 0x55;
1051
1052 ret = gt1x_i2c_read(0x8022, buffer, 1);
1053 if (ret < 0) {
1054 continue;
1055 }
1056 usleep_range(5000, 6000);
1057 ret = gt1x_i2c_read(0x8022, &confirm, 1);
1058 if (ret < 0) {
1059 continue;
1060 }
1061 if (buffer[0] != confirm)
1062 continue;
1063
1064 if (buffer[0] == 0xAA) {
1065 GTP_DEBUG("burning.....");
1066 continue;
1067 } else if (buffer[0] == 0xDD) {
1068 GTP_ERROR("checksum error!");
1069 break;
1070 } else if (buffer[0] == 0xBB) {
1071 GTP_INFO("burning success.");
1072 burn_state = 0;
1073 break;
1074 } else if (buffer[0] == 0xCC) {
1075 GTP_ERROR("burning failed!");
1076 break;
1077 } else {
1078 GTP_DEBUG("unknown state!(0x8022: 0x%02X)", buffer[0]);
1079 }
1080 }
1081
1082 if (!burn_state) {
1083 length -= block_len;
1084 burn_len += block_len;
1085 retry = 5;
1086 }
1087 }
1088 if (length == 0) {
1089 return 0;
1090 } else {
1091 return ERROR_RETRY;
1092 }
1093 }
1094
gt1x_check_subsystem_in_flash(struct fw_subsystem_info * subsystem)1095 int gt1x_check_subsystem_in_flash(struct fw_subsystem_info *subsystem)
1096 {
1097 int block_len;
1098 int checked_len = 0;
1099 u32 length = subsystem->length;
1100 int ret;
1101 int check_state = 0;
1102 int retry = 5;
1103 u8 *fw;
1104
1105 GTP_INFO("Subsystem: %d", subsystem->type);
1106 GTP_INFO("Length: %d", subsystem->length);
1107 GTP_INFO("Address: 0x%08X", subsystem->address);
1108
1109 while (length > 0) {
1110 block_len = length > 1024 * 4 ? 1024 * 4 : length;
1111
1112 GTP_INFO("Check block ==> length: %d, address: 0x%08X", block_len, subsystem->address + checked_len);
1113 fw = gt1x_get_fw_data(subsystem->offset + checked_len, block_len);
1114 if (fw == NULL) {
1115 return ERROR_FW;
1116 }
1117 ret = gt1x_read_flash(subsystem->address + checked_len, block_len);
1118 if (ret) {
1119 check_state |= ret;
1120 }
1121
1122 ret = gt1x_recall_check(fw, 0x8100, block_len);
1123 if (ret) {
1124 GTP_ERROR("Block in flash is broken!");
1125 check_state |= ret;
1126 }
1127
1128 length -= block_len;
1129 checked_len += block_len;
1130 retry = 5;
1131 }
1132 if (check_state) {
1133 GTP_ERROR("Subsystem in flash is broken!");
1134 } else {
1135 GTP_INFO("Subsystem in flash is correct!");
1136 }
1137 return check_state;
1138 }
1139
gt1x_read_flash(u32 addr,int length)1140 int gt1x_read_flash(u32 addr, int length)
1141 {
1142 int wait_time;
1143 int ret = 0;
1144 u8 buffer[4];
1145 u16 read_addr = (addr >> 8);
1146
1147 GTP_INFO("Read flash: 0x%04X, length: %d", addr, length);
1148
1149 buffer[0] = 0;
1150 ret = gt1x_i2c_write_with_readback(0x8022, buffer, 1);
1151
1152 buffer[0] = ((length >> 8) & 0xFF);
1153 buffer[1] = (length & 0xFF);
1154 buffer[2] = ((read_addr >> 8) & 0xFF);
1155 buffer[3] = (read_addr & 0xFF);
1156 ret |= gt1x_i2c_write_with_readback(0x8100, buffer, 4);
1157
1158 buffer[0] = 0xAA;
1159 buffer[1] = 0xAA;
1160 ret |= gt1x_i2c_write(0x8020, buffer, 2);
1161 if (ret) {
1162 GTP_ERROR("Error occured.");
1163 return ret;
1164 }
1165
1166 wait_time = 200;
1167 while (wait_time > 0) {
1168 wait_time--;
1169 usleep_range(5000, 6000);
1170 ret = gt1x_i2c_read_dbl_check(0x8022, buffer, 1);
1171 if (ret) {
1172 continue;
1173 }
1174 if (buffer[0] == 0xBB) {
1175 GTP_INFO("Read success(addr: 0x%04X, length: %d)", addr, length);
1176 break;
1177 }
1178 }
1179 if (wait_time == 0) {
1180 GTP_ERROR("Read Flash FAIL!");
1181 return ERROR_RETRY;
1182 }
1183 return 0;
1184 }
1185
gt1x_error_erase(void)1186 int gt1x_error_erase(void)
1187 {
1188 int block_len;
1189 u16 checksum;
1190 u16 erase_addr;
1191 u8 buffer[10];
1192 int ret;
1193 int wait_time;
1194 int burn_state = ERROR;
1195 int retry = 5;
1196 u8 *fw = NULL;
1197
1198 GTP_INFO("Erase flash area of ss51.");
1199
1200 gt1x_reset_guitar();
1201
1202 fw = gt1x_get_fw_data(update_info.firmware->subsystem[0].offset,
1203 update_info.firmware->subsystem[0].length);
1204 if (!fw) {
1205 GTP_ERROR("get isp fail");
1206 return ERROR_FW;
1207 }
1208 ret = gt1x_run_ss51_isp(fw, update_info.firmware->subsystem[0].length);
1209 if (ret) {
1210 GTP_ERROR("run isp fail");
1211 return ERROR_PATH;
1212 }
1213
1214 fw = kmalloc(1024 * 4, GFP_KERNEL);
1215 if (!fw) {
1216 GTP_ERROR("error when alloc mem.");
1217 return ERROR_MEM;
1218 }
1219
1220 memset(fw, 0xFF, 1024 * 4);
1221 erase_addr = 0x00;
1222 block_len = 1024 * 4;
1223
1224 while (retry-- > 0) {
1225 checksum = 0;
1226 checksum += block_len;
1227 checksum += erase_addr;
1228 checksum += gt1x_calc_checksum(fw, block_len);
1229 checksum = (0 - checksum);
1230
1231 buffer[0] = ((block_len >> 8) & 0xFF);
1232 buffer[1] = (block_len & 0xFF);
1233 buffer[2] = ((erase_addr >> 8) & 0xFF);
1234 buffer[3] = (erase_addr & 0xFF);
1235
1236 ret = gt1x_i2c_write_with_readback(0x8100, buffer, 4);
1237 if (ret) {
1238 GTP_ERROR("write length & address fail!");
1239 continue;
1240 }
1241
1242 ret = gt1x_i2c_write(0x8100 + 4, fw, block_len);
1243 if (ret) {
1244 GTP_ERROR("write fw data fail!");
1245 continue;
1246 }
1247
1248 ret = gt1x_recall_check(fw, 0x8100 + 4, block_len);
1249 if (ret)
1250 continue;
1251
1252 buffer[0] = ((checksum >> 8) & 0xFF);
1253 buffer[1] = (checksum & 0xFF);
1254 ret = gt1x_i2c_write_with_readback(0x8100 + 4 + block_len, buffer, 2);
1255 if (ret) {
1256 GTP_ERROR("write checksum fail!");
1257 continue;
1258 }
1259
1260 buffer[0] = 0;
1261 ret = gt1x_i2c_write_with_readback(0x8022, buffer, 1);
1262 if (ret) {
1263 GTP_ERROR("clear control flag fail!");
1264 continue;
1265 }
1266
1267 buffer[0] = FW_SECTION_TYPE_SS51_PATCH;
1268 buffer[1] = FW_SECTION_TYPE_SS51_PATCH;
1269 ret = gt1x_i2c_write_with_readback(0x8020, buffer, 2);
1270 if (ret) {
1271 GTP_ERROR("write subsystem type fail!");
1272 continue;
1273 }
1274 burn_state = ERROR;
1275 wait_time = 200;
1276 while (wait_time > 0) {
1277 wait_time--;
1278 usleep_range(5000, 6000);
1279 ret = gt1x_i2c_read_dbl_check(0x8022, buffer, 1);
1280 if (ret)
1281 continue;
1282
1283 if (buffer[0] == 0xAA) {
1284 GTP_DEBUG("burning.....");
1285 continue;
1286 } else if (buffer[0] == 0xDD) {
1287 GTP_ERROR("checksum error!");
1288 break;
1289 } else if (buffer[0] == 0xBB) {
1290 GTP_INFO("burning success.");
1291 burn_state = 0;
1292 break;
1293 } else if (buffer[0] == 0xCC) {
1294 GTP_ERROR("burning failed!");
1295 break;
1296 } else {
1297 GTP_DEBUG("unknown state!(0x8022: 0x%02X)", buffer[0]);
1298 }
1299 }
1300 }
1301
1302 kfree(fw);
1303 if (burn_state == 0)
1304 return 0;
1305 else
1306 return ERROR_RETRY;
1307 }
1308
gt1x_leave_update_mode(void)1309 void gt1x_leave_update_mode(void)
1310 {
1311 GTP_DEBUG("Leave FW update mode.");
1312 if (update_info.status != UPDATE_STATUS_ABORT)
1313 gt1x_reset_guitar();
1314 #if GTP_CHARGER_SWITCH
1315 gt1x_charger_switch(SWITCH_ON);
1316 #endif
1317 #if GTP_ESD_PROTECT
1318 gt1x_esd_switch(SWITCH_ON);
1319 #endif
1320 update_info.status = UPDATE_STATUS_IDLE;
1321 gt1x_irq_enable();
1322 }
1323
1324 #if 0 //close for GKI
1325 void dump_to_file(u16 addr, int length, char *filepath)
1326 {
1327 struct file *flp = NULL;
1328 u8 buf[128];
1329 const int READ_BLOCK_SIZE = 128;
1330 int read_length = 0;
1331 int len = 0;
1332
1333 GTP_INFO("Dump(0x%04X, %d bytes) to file: %s\n", addr, length, filepath);
1334 flp = filp_open(filepath, O_RDWR | O_CREAT, 0666);
1335 if (IS_ERR(flp)) {
1336 GTP_ERROR("can not open file: %s\n", filepath);
1337 return;
1338 }
1339 flp->f_op->llseek(flp, 0, SEEK_SET);
1340
1341 while (length > 0) {
1342 len = (length > READ_BLOCK_SIZE ? READ_BLOCK_SIZE : length);
1343 memset(buf, 0x33, len);
1344 if (gt1x_i2c_read(addr + read_length, buf, len))
1345 memset(buf, 0x33, len);
1346 flp->f_op->write(flp, (char *)buf, len, &flp->f_pos);
1347 read_length += len;
1348 length -= len;
1349 }
1350 filp_close(flp, NULL);
1351 }
1352 #endif
1353
gt1x_hold_ss51_dsp_no_reset(void)1354 int gt1x_hold_ss51_dsp_no_reset(void)
1355 {
1356 int ret = ERROR;
1357 u8 buffer[2];
1358
1359 /*hold ss51_dsp*/
1360 ret = __gt1x_hold_ss51_dsp_20();
1361 if (ret)
1362 return ret;
1363 /*enable dsp & mcu power*/
1364 buffer[0] = 0x00;
1365 ret = gt1x_i2c_write_with_readback(_bRW_MISCTL__DSP_MCU_PWR_, buffer, 1);
1366 if (ret) {
1367 GTP_ERROR("enabel dsp & mcu power fail!");
1368 return ret;
1369 }
1370 /*disable watchdog*/
1371 buffer[0] = 0x00;
1372 ret = gt1x_i2c_write_with_readback(_bRW_MISCTL__TMR0_EN, buffer, 1);
1373 if (ret) {
1374 GTP_ERROR("disable wdt fail!");
1375 return ret;
1376 }
1377 /*clear cache*/
1378 buffer[0] = 0x00;
1379 ret = gt1x_i2c_write_with_readback(_bRW_MISCTL__CACHE_EN, buffer, 1);
1380 if (ret) {
1381 GTP_ERROR("clear cache fail!");
1382 return ret;
1383 }
1384 /*soft reset*/
1385 buffer[0] = 0x01;
1386 ret = gt1x_i2c_write(_bWO_MISCTL__CPU_SWRST_PULSE, buffer, 1);
1387 if (ret) {
1388 GTP_ERROR("software reset fail!");
1389 return ret;
1390 }
1391 /*set scramble*/
1392 buffer[0] = 0x00;
1393 ret = gt1x_i2c_write_with_readback(_rRW_MISCTL__BOOT_OPT_B0_, buffer, 1);
1394 if (ret) {
1395 GTP_ERROR("set scramble fail!");
1396 return ret;
1397 }
1398
1399 return 0;
1400 }
1401
1402 #define GT1X_LOAD_PACKET_SIZE (1024 * 2)
1403
gt1x_load_patch(u8 * patch,u32 patch_size,int offset,int bank_size)1404 int gt1x_load_patch(u8 *patch, u32 patch_size, int offset, int bank_size)
1405 {
1406 s32 loaded_length = 0;
1407 s32 len = 0;
1408 s32 ret = 0;
1409 u8 bank = 0, tmp;
1410 u16 address;
1411
1412 GTP_INFO("Load patch code(size: %d, checksum: 0x%04X, position: 0x%04X, bank-size: %d", patch_size, gt1x_calc_checksum(patch, patch_size), 0xC000 + offset, bank_size);
1413 while (loaded_length != patch_size) {
1414 if (loaded_length == 0 || (loaded_length + offset) % bank_size == 0) {
1415 /*select bank*/
1416 bank = 0x04 + (loaded_length + offset) / bank_size;
1417 ret = gt1x_i2c_write(_bRW_MISCTL__SRAM_BANK, &bank, 1);
1418 if (ret) {
1419 GTP_ERROR("select bank%d fail!", bank);
1420 return ret;
1421 }
1422 GTP_INFO("Select bank%d success.", bank);
1423 /*enable patch area access*/
1424 tmp = 0x01;
1425 ret = gt1x_i2c_write_with_readback(_bRW_MISCTL__PATCH_AREA_EN_ + bank - 4, &tmp, 1);
1426 if (ret) {
1427 GTP_ERROR("enable patch area access fail!");
1428 return ret;
1429 }
1430 }
1431
1432 len = patch_size - loaded_length > GT1X_LOAD_PACKET_SIZE ? GT1X_LOAD_PACKET_SIZE : patch_size - loaded_length;
1433 address = 0xC000 + (loaded_length + offset) % bank_size;
1434
1435 ret = gt1x_i2c_write(address, &patch[loaded_length], len);
1436 if (ret) {
1437 GTP_ERROR("load 0x%04X, %dbytes fail!", address, len);
1438 return ret;
1439 }
1440 ret = gt1x_recall_check(&patch[loaded_length], address, len);
1441 if (ret) {
1442 GTP_ERROR("Recall check 0x%04X, %dbytes fail!", address, len);
1443 return ret;
1444 }
1445 GTP_INFO("load code 0x%04X, %dbytes success.", address, len);
1446
1447 loaded_length += len;
1448 }
1449
1450 return 0;
1451 }
1452
gt1x_startup_patch(void)1453 int gt1x_startup_patch(void)
1454 {
1455 s32 ret = 0;
1456 u8 buffer[8] = { 0x55 };
1457
1458 buffer[0] = 0x00;
1459 buffer[1] = 0x00;
1460 ret |= gt1x_i2c_write(_bRW_MISCTL__PATCH_AREA_EN_, buffer, 2);
1461
1462 memset(buffer, 0x55, 8);
1463 ret |= gt1x_i2c_write(GTP_REG_FLASH_PASSBY, buffer, 8);
1464 ret |= gt1x_i2c_write(GTP_REG_VERSION, buffer, 5);
1465
1466 buffer[0] = 0xAA;
1467 ret |= gt1x_i2c_write(GTP_REG_CMD, buffer, 1);
1468 ret |= gt1x_i2c_write(GTP_REG_ESD_CHECK, buffer, 1);
1469
1470 buffer[0] = 0x00;
1471 ret |= gt1x_i2c_write(_rRW_MISCTL__SWRST_B0_, buffer, 1);
1472
1473 msleep(200);
1474
1475 return ret;
1476 }
1477