xref: /OK3568_Linux_fs/external/camera_engine_rkaiq/rkaiq/include/iq_parser_v2/gain_uapi_head_v2.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /*
2  * Copyright (c) 2019-2022 Rockchip Eletronics Co., Ltd.
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #ifndef __CALIBDBV2_GAIN_UAPI_HEADER_V2_H__
18 #define __CALIBDBV2_GAIN_UAPI_HEADER_V2_H__
19 
20 #include "rk_aiq_comm.h"
21 
22 RKAIQ_BEGIN_DECLARE
23 
24 ///////////////////////////gain v2//////////////////////////////////////
25 
26 typedef struct RK_GAIN_Select_V2_s {
27     // M4_BOOL_DESC("hdrgain_ctrl_enable", "1")
28     bool hdrgain_ctrl_enable;
29 
30     // M4_NUMBER_DESC("hdr_gain_scale_s", "f32", M4_RANGE(0, 128.0), "1.0", M4_DIGIT(2))
31     float hdr_gain_scale_s;
32 
33     // M4_NUMBER_DESC("hdr_gain_scale_m", "f32", M4_RANGE(0, 128.0), "1.0", M4_DIGIT(2))
34     float hdr_gain_scale_m;
35 
36 } RK_GAIN_Select_V2_t;
37 
38 typedef struct Again_ExpInfo_V2_s {
39     // M4_NUMBER_DESC("hdr_mode", "u8", M4_RANGE(0, 2), "0", M4_DIGIT(0))
40     int hdr_mode;
41     // M4_NUMBER_DESC("snr_mode", "s8", M4_RANGE(0, 2), "0", M4_DIGIT(0))
42     int   snr_mode;
43 
44     // M4_ARRAY_DESC("time", "f32", M4_SIZE(1,3), M4_RANGE(0, 1024), "0.01", M4_DIGIT(6))
45     float arTime[3];
46     // M4_ARRAY_DESC("again", "f32", M4_SIZE(1,3), M4_RANGE(0, 204800), "1", M4_DIGIT(3))
47     float arAGain[3];
48     // M4_ARRAY_DESC("dgain", "f32", M4_SIZE(1,3), M4_RANGE(0, 204800), "1", M4_DIGIT(3))
49     float arDGain[3];
50     // M4_ARRAY_DESC("isp_dgain", "f32", M4_SIZE(1,3), M4_RANGE(0, 204800), "1", M4_DIGIT(3))
51     float isp_dgain[3];
52     // M4_ARRAY_DESC("iso", "u32", M4_SIZE(1,3), M4_RANGE(0, 204800), "1", M4_DIGIT(0))
53     int   arIso[3];
54 
55     // M4_NUMBER_DESC("isoLevelLow", "u8", M4_RANGE(0, 12), "0", M4_DIGIT(0))
56     int isoLevelLow;
57     // M4_NUMBER_DESC("isoLevelHig", "u8", M4_RANGE(0, 12), "0", M4_DIGIT(0))
58     int isoLevelHig;
59 
60 } Again_ExpInfo_V2_t;
61 
62 typedef struct rk_aiq_gain_info_v2_s {
63     // M4_ARRAY_TABLE_DESC("sync", "array_table_ui", "none", "1")
64     rk_aiq_uapi_sync_t sync;
65     // M4_NUMBER_DESC("iso", "u32", M4_RANGE(0, 204800), "50", M4_DIGIT(0), "0", "0")
66     int iso;
67     // M4_ARRAY_TABLE_DESC("expo_info", "normal_ui_style", "none", "0", "0")
68     Again_ExpInfo_V2_t expo_info;
69 } rk_aiq_gain_info_v2_t;
70 
71 
72 
73 RKAIQ_END_DECLARE
74 
75 #endif
76