1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* 3 * Copyright (c) 2025, Rockchip Electronics Co., Ltd. 4 */ 5 6 #ifndef __FIREWALL_H__ 7 #define __FIREWALL_H__ 8 9 #include <plat_private.h> 10 11 /* FW SGRF */ 12 #define FW_SGRF_MST_DOMAIN_CON(i) ((i) * 4) 13 #define FW_SGRF_MST_DOMAIN_CON_CNT 8 14 #define FW_SGRF_DDR_RGN(i) (0x0100 + (i) * 4) 15 #define FW_SGRF_DDR_RGN_CNT 16 16 #define FW_SGRF_DDR_LOOKUP(i) (0x0140 + (i) * 0x4) 17 #define FW_SGRF_DDR_LOOKUP_CNT 8 18 #define FW_SGRF_DDR_SIZE 0x0160 19 #define FW_SGRF_DDR_CON 0x0168 20 #define FW_SGRF_SYSMEM_RGN(i) (0x0200 + (i) * 4) 21 #define FW_SGRF_SYSMEM_RGN_CNT 4 22 #define FW_SGRF_SYSMEM_LOOKUP(i) (0x0210 + (i) * 4) 23 #define FW_SGRF_SYSMEM_LOOKUP_CNT 2 24 #define FW_SGRF_SYSMEM_CON 0x0218 25 #define FW_SGRF_CBUF_RGN(i) (0x0300 + (i) * 4) 26 #define FW_SGRF_CBUF_RGN_CNT 8 27 #define FW_SGRF_CBUF_LOOKUP(i) (0x0320 + (i) * 4) 28 #define FW_SGRF_CBUF_LOOKUP_CNT 4 29 #define FW_SGRF_CBUF_CON 0x0330 30 #define FW_SGRF_SLV_LOOKUP(i) (0x0400 + (i) * 4) 31 #define FW_SGRF_SLV_LOOKUP_CNT 4 32 #define FW_SGRF_BUS_SLV_CON(i) (0x0500 + (i) * 4) 33 #define FW_SGRF_BUS_SLV_CON_CNT 25 34 #define FW_SGRF_BUS_SLV_STAT 0x0580 35 #define FW_SGRF_TOP_SLV_CON(i) (0x0600 + (i) * 4) 36 #define FW_SGRF_TOP_SLV_CON_CNT 16 37 #define FW_SGRF_TOP_SLV_STAT 0x0680 38 #define FW_SGRF_CENTER_SLV_CON(i) (0x0700 + (i) * 4) 39 #define FW_SGRF_CENTER_SLV_CON_CNT 13 40 #define FW_SGRF_CCI_SLV_CON(i) (0x0800 + (i) * 4) 41 #define FW_SGRF_CCI_SLV_CON_CNT 3 42 #define FW_SGRF_PHP_SLV_CON(i) (0x0900 + (i) * 4) 43 #define FW_SGRF_PHP_SLV_CON_CNT 4 44 #define FW_SGRF_PHP_SLV_STAT 0x0940 45 #define FW_SGRF_GPU_SLV_CON 0x0980 46 #define FW_SGRF_NPU_SLV_CON(i) (0x09a0 + (i) * 4) 47 #define FW_SGRF_NPU_SLV_CON_CNT 2 48 #define FW_SGRF_STATCLR_CON0 0x0a00 49 #define FW_SGRF_KEYUPD_CON0 0x0a80 50 #define FW_SGRF_KEYUPD_CON1 0x0a84 51 #define FW_SGRF_KEYUPD_STAT 0x0ab0 52 53 /* FW PMUSGRF */ 54 #define FW_PMU_SGRF_SLV_CON(i) ((i) * 4) 55 #define FW_PMU_SGRF_SLV_CON_CNT 9 56 #define FW_PMU_SGRF_SLV_LOOKUP(i) (0x0080 + (i) * 0x4) 57 #define FW_PMU_SGRF_SLV_LOOKUP_CNT 4 58 #define FW_PMU_SGRF_DOMAIN_CON 0x00a0 59 #define FW_PMU_SGRF_SLV_STAT 0x00c0 60 61 /* master id */ 62 #define FW_MST_ID_USB0 FW_MST_ID(FW_MST_TYPE_SYS, 0) 63 #define FW_MST_ID_KEYLAD_APB FW_MST_ID(FW_MST_TYPE_SYS, 1) 64 #define FW_MST_ID_DFT2APB FW_MST_ID(FW_MST_TYPE_SYS, 2) 65 #define FW_MST_ID_PCIE0 FW_MST_ID(FW_MST_TYPE_SYS, 3) 66 #define FW_MST_ID_PCIE1 FW_MST_ID(FW_MST_TYPE_SYS, 4) 67 #define FW_MST_ID_SATA0 FW_MST_ID(FW_MST_TYPE_SYS, 6) 68 #define FW_MST_ID_SATA1 FW_MST_ID(FW_MST_TYPE_SYS, 7) 69 #define FW_MST_ID_CRYPTO FW_MST_ID(FW_MST_TYPE_SYS, 8) 70 #define FW_MST_ID_FLEXBUS FW_MST_ID(FW_MST_TYPE_SYS, 9) 71 #define FW_MST_ID_DECOM FW_MST_ID(FW_MST_TYPE_SYS, 10) 72 #define FW_MST_ID_DMA2DDR FW_MST_ID(FW_MST_TYPE_SYS, 11) 73 #define FW_MST_ID_DMAC0 FW_MST_ID(FW_MST_TYPE_SYS, 12) 74 #define FW_MST_ID_DMAC1 FW_MST_ID(FW_MST_TYPE_SYS, 13) 75 #define FW_MST_ID_DMAC2 FW_MST_ID(FW_MST_TYPE_SYS, 14) 76 #define FW_MST_ID_EBC FW_MST_ID(FW_MST_TYPE_SYS, 15) 77 #define FW_MST_ID_EMMC FW_MST_ID(FW_MST_TYPE_SYS, 16) 78 #define FW_MST_ID_GMAC0 FW_MST_ID(FW_MST_TYPE_SYS, 17) 79 #define FW_MST_ID_GMAC1 FW_MST_ID(FW_MST_TYPE_SYS, 18) 80 #define FW_MST_ID_GPU FW_MST_ID(FW_MST_TYPE_SYS, 19) 81 #define FW_MST_ID_HDCP0 FW_MST_ID(FW_MST_TYPE_SYS, 20) 82 #define FW_MST_ID_HDCP1 FW_MST_ID(FW_MST_TYPE_SYS, 21) 83 #define FW_MST_ID_ISP FW_MST_ID(FW_MST_TYPE_SYS, 22) 84 #define FW_MST_ID_RGA0 FW_MST_ID(FW_MST_TYPE_SYS, 23) 85 #define FW_MST_ID_RGA1 FW_MST_ID(FW_MST_TYPE_SYS, 24) 86 #define FW_MST_ID_JPEG FW_MST_ID(FW_MST_TYPE_SYS, 25) 87 #define FW_MST_ID_RKVDEC FW_MST_ID(FW_MST_TYPE_SYS, 26) 88 #define FW_MST_ID_VEPU0 FW_MST_ID(FW_MST_TYPE_SYS, 27) 89 #define FW_MST_ID_UFSHC FW_MST_ID(FW_MST_TYPE_SYS, 28) 90 #define FW_MST_ID_VDPP FW_MST_ID(FW_MST_TYPE_SYS, 29) 91 #define FW_MST_ID_VICAP FW_MST_ID(FW_MST_TYPE_SYS, 30) 92 #define FW_MST_ID_VOP_M0 FW_MST_ID(FW_MST_TYPE_SYS, 31) 93 #define FW_MST_ID_VOP_M1 FW_MST_ID(FW_MST_TYPE_SYS, 32) 94 #define FW_MST_ID_VPSS FW_MST_ID(FW_MST_TYPE_SYS, 33) 95 #define FW_MST_ID_FSPI0 FW_MST_ID(FW_MST_TYPE_SYS, 34) 96 #define FW_MST_ID_FSPI1 FW_MST_ID(FW_MST_TYPE_SYS, 35) 97 #define FW_MST_ID_BUS_MCU FW_MST_ID(FW_MST_TYPE_SYS, 36) 98 #define FW_MST_ID_DDR_MCU FW_MST_ID(FW_MST_TYPE_SYS, 37) 99 #define FW_MST_ID_NPU_MCU FW_MST_ID(FW_MST_TYPE_SYS, 38) 100 #define FW_MST_ID_CAN0 FW_MST_ID(FW_MST_TYPE_SYS, 39) 101 #define FW_MST_ID_CAN1 FW_MST_ID(FW_MST_TYPE_SYS, 40) 102 #define FW_MST_ID_SDIO FW_MST_ID(FW_MST_TYPE_SYS, 41) 103 #define FW_MST_ID_SDMMC0 FW_MST_ID(FW_MST_TYPE_SYS, 42) 104 #define FW_MST_ID_USB1 FW_MST_ID(FW_MST_TYPE_SYS, 43) 105 #define FW_MST_ID_NPU_M0 FW_MST_ID(FW_MST_TYPE_SYS, 44) 106 #define FW_MST_ID_NPU_M0RO FW_MST_ID(FW_MST_TYPE_SYS, 45) 107 #define FW_MST_ID_NPU_M1 FW_MST_ID(FW_MST_TYPE_SYS, 46) 108 #define FW_MST_ID_NPU_M1RO FW_MST_ID(FW_MST_TYPE_SYS, 47) 109 #define FW_MST_ID_A53_0 FW_MST_ID(FW_MST_TYPE_SYS, 48) 110 #define FW_MST_ID_A53_1 FW_MST_ID(FW_MST_TYPE_SYS, 49) 111 #define FW_MST_ID_A53_2 FW_MST_ID(FW_MST_TYPE_SYS, 50) 112 #define FW_MST_ID_A53_3 FW_MST_ID(FW_MST_TYPE_SYS, 51) 113 #define FW_MST_ID_A72_0 FW_MST_ID(FW_MST_TYPE_SYS, 52) 114 #define FW_MST_ID_A72_1 FW_MST_ID(FW_MST_TYPE_SYS, 53) 115 #define FW_MST_ID_A72_2 FW_MST_ID(FW_MST_TYPE_SYS, 54) 116 #define FW_MST_ID_A72_3 FW_MST_ID(FW_MST_TYPE_SYS, 55) 117 #define FW_MST_ID_DAP_LITE FW_MST_ID(FW_MST_TYPE_SYS, 56) 118 #define FW_MST_ID_VEPU1 FW_MST_ID(FW_MST_TYPE_SYS, 57) 119 #define FW_MST_ID_SYS_CNT 64 120 121 #define FW_MST_ID_PMU_MCU FW_MST_ID(FW_MST_TYPE_PMU, 0) 122 #define FW_MST_ID_VDMA FW_MST_ID(FW_MST_TYPE_PMU, 1) 123 #define FW_MST_ID_PMU_CNT 8 124 125 /* slave id */ 126 #define FW_SLV_ID_CAN0 FW_SLV_ID(FW_SLV_TYPE_BUS, 0) 127 #define FW_SLV_ID_CAN1 FW_SLV_ID(FW_SLV_TYPE_BUS, 1) 128 #define FW_SLV_ID_I3C0 FW_SLV_ID(FW_SLV_TYPE_BUS, 2) 129 #define FW_SLV_ID_I3C1 FW_SLV_ID(FW_SLV_TYPE_BUS, 3) 130 #define FW_SLV_ID_BUS_IOC FW_SLV_ID(FW_SLV_TYPE_BUS, 4) 131 #define FW_SLV_ID_COMBO_PIPE_PHY0 FW_SLV_ID(FW_SLV_TYPE_BUS, 5) 132 #define FW_SLV_ID_COMBO_PIPE_PHY1 FW_SLV_ID(FW_SLV_TYPE_BUS, 6) 133 #define FW_SLV_ID_CRU FW_SLV_ID(FW_SLV_TYPE_BUS, 7) 134 #define FW_SLV_ID_DECOM FW_SLV_ID(FW_SLV_TYPE_BUS, 8) 135 #define FW_SLV_ID_CRU_PVTPLL FW_SLV_ID(FW_SLV_TYPE_BUS, 9) 136 #define FW_SLV_ID_I2C1 FW_SLV_ID(FW_SLV_TYPE_BUS, 13) 137 #define FW_SLV_ID_I2C2 FW_SLV_ID(FW_SLV_TYPE_BUS, 14) 138 #define FW_SLV_ID_I2C3 FW_SLV_ID(FW_SLV_TYPE_BUS, 15) 139 #define FW_SLV_ID_I2C4 FW_SLV_ID(FW_SLV_TYPE_BUS, 16) 140 #define FW_SLV_ID_I2C5 FW_SLV_ID(FW_SLV_TYPE_BUS, 17) 141 #define FW_SLV_ID_I2C6 FW_SLV_ID(FW_SLV_TYPE_BUS, 18) 142 #define FW_SLV_ID_I2C7 FW_SLV_ID(FW_SLV_TYPE_BUS, 19) 143 #define FW_SLV_ID_I2C8 FW_SLV_ID(FW_SLV_TYPE_BUS, 20) 144 #define FW_SLV_ID_I2C9 FW_SLV_ID(FW_SLV_TYPE_BUS, 21) 145 #define FW_SLV_ID_INTMUX2BUS FW_SLV_ID(FW_SLV_TYPE_BUS, 22) 146 #define FW_SLV_ID_INTMUX2DDR FW_SLV_ID(FW_SLV_TYPE_BUS, 23) 147 #define FW_SLV_ID_INTMUX2PMU FW_SLV_ID(FW_SLV_TYPE_BUS, 24) 148 #define FW_SLV_ID_PPLL_CRU FW_SLV_ID(FW_SLV_TYPE_BUS, 25) 149 #define FW_SLV_ID_COMBO_PIPE_PHY0_GRF FW_SLV_ID(FW_SLV_TYPE_BUS, 26) 150 #define FW_SLV_ID_COMBO_PIPE_PHY1_GRF FW_SLV_ID(FW_SLV_TYPE_BUS, 27) 151 #define FW_SLV_ID_PMU2 FW_SLV_ID(FW_SLV_TYPE_BUS, 28) 152 #define FW_SLV_ID_SARADC FW_SLV_ID(FW_SLV_TYPE_BUS, 32) 153 #define FW_SLV_ID_SPI0 FW_SLV_ID(FW_SLV_TYPE_BUS, 33) 154 #define FW_SLV_ID_SPI1 FW_SLV_ID(FW_SLV_TYPE_BUS, 34) 155 #define FW_SLV_ID_SPI2 FW_SLV_ID(FW_SLV_TYPE_BUS, 35) 156 #define FW_SLV_ID_SPI3 FW_SLV_ID(FW_SLV_TYPE_BUS, 36) 157 #define FW_SLV_ID_SPI4 FW_SLV_ID(FW_SLV_TYPE_BUS, 37) 158 #define FW_SLV_ID_SYS_GRF FW_SLV_ID(FW_SLV_TYPE_BUS, 38) 159 #define FW_SLV_ID_TSADC FW_SLV_ID(FW_SLV_TYPE_BUS, 41) 160 #define FW_SLV_ID_UART0 FW_SLV_ID(FW_SLV_TYPE_BUS, 42) 161 #define FW_SLV_ID_UART10 FW_SLV_ID(FW_SLV_TYPE_BUS, 43) 162 #define FW_SLV_ID_UART11 FW_SLV_ID(FW_SLV_TYPE_BUS, 44) 163 #define FW_SLV_ID_UART2 FW_SLV_ID(FW_SLV_TYPE_BUS, 45) 164 #define FW_SLV_ID_UART3 FW_SLV_ID(FW_SLV_TYPE_BUS, 46) 165 #define FW_SLV_ID_UART4 FW_SLV_ID(FW_SLV_TYPE_BUS, 47) 166 #define FW_SLV_ID_UART5 FW_SLV_ID(FW_SLV_TYPE_BUS, 48) 167 #define FW_SLV_ID_UART6 FW_SLV_ID(FW_SLV_TYPE_BUS, 49) 168 #define FW_SLV_ID_UART7 FW_SLV_ID(FW_SLV_TYPE_BUS, 50) 169 #define FW_SLV_ID_UART8 FW_SLV_ID(FW_SLV_TYPE_BUS, 51) 170 #define FW_SLV_ID_UART9 FW_SLV_ID(FW_SLV_TYPE_BUS, 52) 171 #define FW_SLV_ID_VCCIO0_1_3_IOC FW_SLV_ID(FW_SLV_TYPE_BUS, 53) 172 #define FW_SLV_ID_VCCIO2_4_5_IOC FW_SLV_ID(FW_SLV_TYPE_BUS, 54) 173 #define FW_SLV_ID_BUS_WDT FW_SLV_ID(FW_SLV_TYPE_BUS, 55) 174 #define FW_SLV_ID_WDT_NS FW_SLV_ID(FW_SLV_TYPE_BUS, 56) 175 #define FW_SLV_ID_DMAC0_NS FW_SLV_ID(FW_SLV_TYPE_BUS, 57) 176 #define FW_SLV_ID_DMAC1_NS FW_SLV_ID(FW_SLV_TYPE_BUS, 58) 177 #define FW_SLV_ID_DMAC2_NS FW_SLV_ID(FW_SLV_TYPE_BUS, 59) 178 #define FW_SLV_ID_DMAC0_S FW_SLV_ID(FW_SLV_TYPE_BUS, 60) 179 #define FW_SLV_ID_DMAC1_S FW_SLV_ID(FW_SLV_TYPE_BUS, 61) 180 #define FW_SLV_ID_DMAC2_S FW_SLV_ID(FW_SLV_TYPE_BUS, 62) 181 #define FW_SLV_ID_GIC400 FW_SLV_ID(FW_SLV_TYPE_BUS, 63) 182 #define FW_SLV_ID_SERVICE_BUS FW_SLV_ID(FW_SLV_TYPE_BUS, 64) 183 #define FW_SLV_ID_SPINLOCK FW_SLV_ID(FW_SLV_TYPE_BUS, 65) 184 #define FW_SLV_ID_MAILBOX_CH0 FW_SLV_ID(FW_SLV_TYPE_BUS, 66) 185 #define FW_SLV_ID_MAILBOX_CH1 FW_SLV_ID(FW_SLV_TYPE_BUS, 67) 186 #define FW_SLV_ID_MAILBOX_CH2 FW_SLV_ID(FW_SLV_TYPE_BUS, 68) 187 #define FW_SLV_ID_MAILBOX_CH3 FW_SLV_ID(FW_SLV_TYPE_BUS, 69) 188 #define FW_SLV_ID_MAILBOX_CH4 FW_SLV_ID(FW_SLV_TYPE_BUS, 70) 189 #define FW_SLV_ID_MAILBOX_CH5 FW_SLV_ID(FW_SLV_TYPE_BUS, 71) 190 #define FW_SLV_ID_MAILBOX_CH6 FW_SLV_ID(FW_SLV_TYPE_BUS, 72) 191 #define FW_SLV_ID_MAILBOX_CH7 FW_SLV_ID(FW_SLV_TYPE_BUS, 73) 192 #define FW_SLV_ID_MAILBOX_CH8 FW_SLV_ID(FW_SLV_TYPE_BUS, 74) 193 #define FW_SLV_ID_MAILBOX_CH9 FW_SLV_ID(FW_SLV_TYPE_BUS, 75) 194 #define FW_SLV_ID_MAILBOX_CH10 FW_SLV_ID(FW_SLV_TYPE_BUS, 76) 195 #define FW_SLV_ID_MAILBOX_CH11 FW_SLV_ID(FW_SLV_TYPE_BUS, 77) 196 #define FW_SLV_ID_MAILBOX_CH12 FW_SLV_ID(FW_SLV_TYPE_BUS, 78) 197 #define FW_SLV_ID_MAILBOX_CH13 FW_SLV_ID(FW_SLV_TYPE_BUS, 79) 198 #define FW_SLV_ID_PWM1_CH0 FW_SLV_ID(FW_SLV_TYPE_BUS, 82) 199 #define FW_SLV_ID_PWM1_CH1 FW_SLV_ID(FW_SLV_TYPE_BUS, 83) 200 #define FW_SLV_ID_PWM1_CH2 FW_SLV_ID(FW_SLV_TYPE_BUS, 84) 201 #define FW_SLV_ID_PWM1_CH3 FW_SLV_ID(FW_SLV_TYPE_BUS, 85) 202 #define FW_SLV_ID_PWM1_CH4 FW_SLV_ID(FW_SLV_TYPE_BUS, 86) 203 #define FW_SLV_ID_PWM1_CH5 FW_SLV_ID(FW_SLV_TYPE_BUS, 87) 204 #define FW_SLV_ID_PWM2_CH0 FW_SLV_ID(FW_SLV_TYPE_BUS, 88) 205 #define FW_SLV_ID_PWM2_CH1 FW_SLV_ID(FW_SLV_TYPE_BUS, 89) 206 #define FW_SLV_ID_PWM2_CH2 FW_SLV_ID(FW_SLV_TYPE_BUS, 90) 207 #define FW_SLV_ID_PWM2_CH3 FW_SLV_ID(FW_SLV_TYPE_BUS, 91) 208 #define FW_SLV_ID_PWM2_CH4 FW_SLV_ID(FW_SLV_TYPE_BUS, 92) 209 #define FW_SLV_ID_PWM2_CH5 FW_SLV_ID(FW_SLV_TYPE_BUS, 93) 210 #define FW_SLV_ID_PWM2_CH6 FW_SLV_ID(FW_SLV_TYPE_BUS, 94) 211 #define FW_SLV_ID_PWM2_CH7 FW_SLV_ID(FW_SLV_TYPE_BUS, 95) 212 #define FW_SLV_ID_TIMER_NS_0_CH0 FW_SLV_ID(FW_SLV_TYPE_BUS, 96) 213 #define FW_SLV_ID_TIMER_NS_0_CH1 FW_SLV_ID(FW_SLV_TYPE_BUS, 97) 214 #define FW_SLV_ID_TIMER_NS_0_CH2 FW_SLV_ID(FW_SLV_TYPE_BUS, 98) 215 #define FW_SLV_ID_TIMER_NS_0_CH3 FW_SLV_ID(FW_SLV_TYPE_BUS, 99) 216 #define FW_SLV_ID_TIMER_NS_0_CH4 FW_SLV_ID(FW_SLV_TYPE_BUS, 100) 217 #define FW_SLV_ID_TIMER_NS_0_CH5 FW_SLV_ID(FW_SLV_TYPE_BUS, 101) 218 #define FW_SLV_ID_TIMER_NS_1_CH0 FW_SLV_ID(FW_SLV_TYPE_BUS, 102) 219 #define FW_SLV_ID_TIMER_NS_1_CH1 FW_SLV_ID(FW_SLV_TYPE_BUS, 103) 220 #define FW_SLV_ID_TIMER_NS_1_CH2 FW_SLV_ID(FW_SLV_TYPE_BUS, 104) 221 #define FW_SLV_ID_TIMER_NS_1_CH3 FW_SLV_ID(FW_SLV_TYPE_BUS, 105) 222 #define FW_SLV_ID_TIMER_NS_1_CH4 FW_SLV_ID(FW_SLV_TYPE_BUS, 106) 223 #define FW_SLV_ID_TIMER_NS_1_CH5 FW_SLV_ID(FW_SLV_TYPE_BUS, 107) 224 #define FW_SLV_ID_GPIO1_CH0 FW_SLV_ID(FW_SLV_TYPE_BUS, 108) 225 #define FW_SLV_ID_GPIO1_CH1 FW_SLV_ID(FW_SLV_TYPE_BUS, 109) 226 #define FW_SLV_ID_GPIO1_CH2 FW_SLV_ID(FW_SLV_TYPE_BUS, 110) 227 #define FW_SLV_ID_GPIO1_CH3 FW_SLV_ID(FW_SLV_TYPE_BUS, 111) 228 #define FW_SLV_ID_GPIO2_CH0 FW_SLV_ID(FW_SLV_TYPE_BUS, 112) 229 #define FW_SLV_ID_GPIO2_CH1 FW_SLV_ID(FW_SLV_TYPE_BUS, 113) 230 #define FW_SLV_ID_GPIO2_CH2 FW_SLV_ID(FW_SLV_TYPE_BUS, 114) 231 #define FW_SLV_ID_GPIO2_CH3 FW_SLV_ID(FW_SLV_TYPE_BUS, 115) 232 #define FW_SLV_ID_GPIO3_CH0 FW_SLV_ID(FW_SLV_TYPE_BUS, 116) 233 #define FW_SLV_ID_GPIO3_CH1 FW_SLV_ID(FW_SLV_TYPE_BUS, 117) 234 #define FW_SLV_ID_GPIO3_CH2 FW_SLV_ID(FW_SLV_TYPE_BUS, 118) 235 #define FW_SLV_ID_GPIO3_CH3 FW_SLV_ID(FW_SLV_TYPE_BUS, 119) 236 #define FW_SLV_ID_GPIO4_CH0 FW_SLV_ID(FW_SLV_TYPE_BUS, 120) 237 #define FW_SLV_ID_GPIO4_CH1 FW_SLV_ID(FW_SLV_TYPE_BUS, 121) 238 #define FW_SLV_ID_GPIO4_CH2 FW_SLV_ID(FW_SLV_TYPE_BUS, 122) 239 #define FW_SLV_ID_GPIO4_CH3 FW_SLV_ID(FW_SLV_TYPE_BUS, 123) 240 #define FW_SLV_ID_BUS_CNT 125 241 242 #define FW_SLV_ID_ACDCDIG_DSM FW_SLV_ID(FW_SLV_TYPE_TOP, 0) 243 #define FW_SLV_ID_ASRC2CH_0 FW_SLV_ID(FW_SLV_TYPE_TOP, 1) 244 #define FW_SLV_ID_ASRC2CH_1 FW_SLV_ID(FW_SLV_TYPE_TOP, 2) 245 #define FW_SLV_ID_ASRC4CH_0 FW_SLV_ID(FW_SLV_TYPE_TOP, 3) 246 #define FW_SLV_ID_ASRC4CH_1 FW_SLV_ID(FW_SLV_TYPE_TOP, 4) 247 #define FW_SLV_ID_PDM1 FW_SLV_ID(FW_SLV_TYPE_TOP, 5) 248 #define FW_SLV_ID_SAI0_8CH FW_SLV_ID(FW_SLV_TYPE_TOP, 6) 249 #define FW_SLV_ID_SAI1_8CH FW_SLV_ID(FW_SLV_TYPE_TOP, 7) 250 #define FW_SLV_ID_SAI2_8CH FW_SLV_ID(FW_SLV_TYPE_TOP, 8) 251 #define FW_SLV_ID_SAI3_2CH FW_SLV_ID(FW_SLV_TYPE_TOP, 9) 252 #define FW_SLV_ID_SAI4_2CH FW_SLV_ID(FW_SLV_TYPE_TOP, 10) 253 #define FW_SLV_ID_SPDIF_RX0 FW_SLV_ID(FW_SLV_TYPE_TOP, 11) 254 #define FW_SLV_ID_SPDIF_RX1 FW_SLV_ID(FW_SLV_TYPE_TOP, 12) 255 #define FW_SLV_ID_SPDIF_TX0 FW_SLV_ID(FW_SLV_TYPE_TOP, 13) 256 #define FW_SLV_ID_SPDIF_TX1 FW_SLV_ID(FW_SLV_TYPE_TOP, 14) 257 #define FW_SLV_ID_DSMC_MEM FW_SLV_ID(FW_SLV_TYPE_TOP, 15) 258 #define FW_SLV_ID_FSPI1 FW_SLV_ID(FW_SLV_TYPE_TOP, 16) 259 #define FW_SLV_ID_FLEXBUS FW_SLV_ID(FW_SLV_TYPE_TOP, 17) 260 #define FW_SLV_ID_SDIO FW_SLV_ID(FW_SLV_TYPE_TOP, 18) 261 #define FW_SLV_ID_SDMMC FW_SLV_ID(FW_SLV_TYPE_TOP, 19) 262 #define FW_SLV_ID_DSMC_CFG FW_SLV_ID(FW_SLV_TYPE_TOP, 20) 263 #define FW_SLV_ID_GMAC0 FW_SLV_ID(FW_SLV_TYPE_TOP, 21) 264 #define FW_SLV_ID_GMAC1 FW_SLV_ID(FW_SLV_TYPE_TOP, 22) 265 #define FW_SLV_ID_SDGMAC_GRF FW_SLV_ID(FW_SLV_TYPE_TOP, 23) 266 #define FW_SLV_ID_EMMC FW_SLV_ID(FW_SLV_TYPE_TOP, 24) 267 #define FW_SLV_ID_FSPI0 FW_SLV_ID(FW_SLV_TYPE_TOP, 25) 268 #define FW_SLV_ID_NSCRYPTO FW_SLV_ID(FW_SLV_TYPE_TOP, 26) 269 #define FW_SLV_ID_RKRNG_NS FW_SLV_ID(FW_SLV_TYPE_TOP, 27) 270 #define FW_SLV_ID_SCRYPTO FW_SLV_ID(FW_SLV_TYPE_TOP, 28) 271 #define FW_SLV_ID_KEYLAD FW_SLV_ID(FW_SLV_TYPE_TOP, 29) 272 #define FW_SLV_ID_RKRNG_S FW_SLV_ID(FW_SLV_TYPE_TOP, 30) 273 #define FW_SLV_ID_OTPC_NS FW_SLV_ID(FW_SLV_TYPE_TOP, 31) 274 #define FW_SLV_ID_JTAG_LOCK FW_SLV_ID(FW_SLV_TYPE_TOP, 33) 275 #define FW_SLV_ID_OTPC_S FW_SLV_ID(FW_SLV_TYPE_TOP, 34) 276 #define FW_SLV_ID_OTPMASK FW_SLV_ID(FW_SLV_TYPE_TOP, 35) 277 #define FW_SLV_ID_SECURE_CRU FW_SLV_ID(FW_SLV_TYPE_TOP, 36) 278 #define FW_SLV_ID_SECURE_CRU_S FW_SLV_ID(FW_SLV_TYPE_TOP, 37) 279 #define FW_SLV_ID_SYS_SGRF FW_SLV_ID(FW_SLV_TYPE_TOP, 38) 280 #define FW_SLV_ID_BOOTROM FW_SLV_ID(FW_SLV_TYPE_TOP, 39) 281 #define FW_SLV_ID_WDT_S FW_SLV_ID(FW_SLV_TYPE_TOP, 41) 282 #define FW_SLV_ID_SERVICE_GMAC FW_SLV_ID(FW_SLV_TYPE_TOP, 42) 283 #define FW_SLV_ID_SERVICE_NVM FW_SLV_ID(FW_SLV_TYPE_TOP, 43) 284 #define FW_SLV_ID_SERVICE_SECURE FW_SLV_ID(FW_SLV_TYPE_TOP, 44) 285 #define FW_SLV_ID_SERVICE_VENC FW_SLV_ID(FW_SLV_TYPE_TOP, 45) 286 #define FW_SLV_ID_SERVICE_VI FW_SLV_ID(FW_SLV_TYPE_TOP, 46) 287 #define FW_SLV_ID_SERVICE_VPU FW_SLV_ID(FW_SLV_TYPE_TOP, 47) 288 #define FW_SLV_ID_VEPU0 FW_SLV_ID(FW_SLV_TYPE_TOP, 48) 289 #define FW_SLV_ID_ISP FW_SLV_ID(FW_SLV_TYPE_TOP, 49) 290 #define FW_SLV_ID_VICAP FW_SLV_ID(FW_SLV_TYPE_TOP, 50) 291 #define FW_SLV_ID_VPSS FW_SLV_ID(FW_SLV_TYPE_TOP, 51) 292 #define FW_SLV_ID_CSIHOST0 FW_SLV_ID(FW_SLV_TYPE_TOP, 52) 293 #define FW_SLV_ID_CSIHOST1 FW_SLV_ID(FW_SLV_TYPE_TOP, 53) 294 #define FW_SLV_ID_CSIHOST2 FW_SLV_ID(FW_SLV_TYPE_TOP, 54) 295 #define FW_SLV_ID_VI_GRF FW_SLV_ID(FW_SLV_TYPE_TOP, 55) 296 #define FW_SLV_ID_EBC FW_SLV_ID(FW_SLV_TYPE_TOP, 56) 297 #define FW_SLV_ID_JPEG FW_SLV_ID(FW_SLV_TYPE_TOP, 57) 298 #define FW_SLV_ID_RGA0 FW_SLV_ID(FW_SLV_TYPE_TOP, 58) 299 #define FW_SLV_ID_RGA1 FW_SLV_ID(FW_SLV_TYPE_TOP, 59) 300 #define FW_SLV_ID_VDPP FW_SLV_ID(FW_SLV_TYPE_TOP, 60) 301 #define FW_SLV_ID_TIMER_S_0_CH0 FW_SLV_ID(FW_SLV_TYPE_TOP, 61) 302 #define FW_SLV_ID_TIMER_S_0_CH1 FW_SLV_ID(FW_SLV_TYPE_TOP, 62) 303 #define FW_SLV_ID_TIMER_S_0_CH2 FW_SLV_ID(FW_SLV_TYPE_TOP, 63) 304 #define FW_SLV_ID_TIMER_S_0_CH3 FW_SLV_ID(FW_SLV_TYPE_TOP, 64) 305 #define FW_SLV_ID_TIMER_S_0_CH4 FW_SLV_ID(FW_SLV_TYPE_TOP, 65) 306 #define FW_SLV_ID_TIMER_S_0_CH5 FW_SLV_ID(FW_SLV_TYPE_TOP, 66) 307 #define FW_SLV_ID_TIMER_S_1_CH0 FW_SLV_ID(FW_SLV_TYPE_TOP, 67) 308 #define FW_SLV_ID_TIMER_S_1_CH1 FW_SLV_ID(FW_SLV_TYPE_TOP, 68) 309 #define FW_SLV_ID_TIMER_S_1_CH2 FW_SLV_ID(FW_SLV_TYPE_TOP, 69) 310 #define FW_SLV_ID_TIMER_S_1_CH3 FW_SLV_ID(FW_SLV_TYPE_TOP, 70) 311 #define FW_SLV_ID_TIMER_S_1_CH4 FW_SLV_ID(FW_SLV_TYPE_TOP, 71) 312 #define FW_SLV_ID_TIMER_S_1_CH5 FW_SLV_ID(FW_SLV_TYPE_TOP, 72) 313 #define FW_SLV_ID_SYS_FW FW_SLV_ID(FW_SLV_TYPE_TOP, 73) 314 #define FW_SLV_ID_VEPU1 FW_SLV_ID(FW_SLV_TYPE_TOP, 75) 315 #define FW_SLV_ID_SERVICE_VEPU1 FW_SLV_ID(FW_SLV_TYPE_TOP, 76) 316 #define FW_SLV_ID_CSIHOST3 FW_SLV_ID(FW_SLV_TYPE_TOP, 77) 317 #define FW_SLV_ID_CSIHOST4 FW_SLV_ID(FW_SLV_TYPE_TOP, 78) 318 #define FW_SLV_ID_TOP_CNT 80 319 320 #define FW_SLV_ID_CENTER_GRF FW_SLV_ID(FW_SLV_TYPE_CENTER, 0) 321 #define FW_SLV_ID_DMA2DDR FW_SLV_ID(FW_SLV_TYPE_CENTER, 1) 322 #define FW_SLV_ID_AHB2APB FW_SLV_ID(FW_SLV_TYPE_CENTER, 2) 323 #define FW_SLV_ID_DDR_GRF FW_SLV_ID(FW_SLV_TYPE_CENTER, 3) 324 #define FW_SLV_ID_DDRCTL0 FW_SLV_ID(FW_SLV_TYPE_CENTER, 4) 325 #define FW_SLV_ID_DDRCTL_1 FW_SLV_ID(FW_SLV_TYPE_CENTER, 5) 326 #define FW_SLV_ID_DDRPHY0 FW_SLV_ID(FW_SLV_TYPE_CENTER, 6) 327 #define FW_SLV_ID_DDR0_CRU FW_SLV_ID(FW_SLV_TYPE_CENTER, 7) 328 #define FW_SLV_ID_DDRPHY1 FW_SLV_ID(FW_SLV_TYPE_CENTER, 8) 329 #define FW_SLV_ID_DDR1_CRU FW_SLV_ID(FW_SLV_TYPE_CENTER, 9) 330 #define FW_SLV_ID_DDRMON0 FW_SLV_ID(FW_SLV_TYPE_CENTER, 10) 331 #define FW_SLV_ID_DDRMON1 FW_SLV_ID(FW_SLV_TYPE_CENTER, 11) 332 #define FW_SLV_ID_HWLP0 FW_SLV_ID(FW_SLV_TYPE_CENTER, 12) 333 #define FW_SLV_ID_HWLP1 FW_SLV_ID(FW_SLV_TYPE_CENTER, 13) 334 #define FW_SLV_ID_DDR_PVTPLL FW_SLV_ID(FW_SLV_TYPE_CENTER, 14) 335 #define FW_SLV_ID_DDR_WDT FW_SLV_ID(FW_SLV_TYPE_CENTER, 15) 336 #define FW_SLV_ID_RKVDEC FW_SLV_ID(FW_SLV_TYPE_CENTER, 16) 337 #define FW_SLV_ID_SERVICE_CCI2 FW_SLV_ID(FW_SLV_TYPE_CENTER, 17) 338 #define FW_SLV_ID_SERVICE_CENTER FW_SLV_ID(FW_SLV_TYPE_CENTER, 18) 339 #define FW_SLV_ID_SERVICE_DDR FW_SLV_ID(FW_SLV_TYPE_CENTER, 19) 340 #define FW_SLV_ID_SERVICE_RKVDEC FW_SLV_ID(FW_SLV_TYPE_CENTER, 20) 341 #define FW_SLV_ID_SERVICE_USB FW_SLV_ID(FW_SLV_TYPE_CENTER, 21) 342 #define FW_SLV_ID_SERVICE_VO0 FW_SLV_ID(FW_SLV_TYPE_CENTER, 22) 343 #define FW_SLV_ID_SERVICE_VO1 FW_SLV_ID(FW_SLV_TYPE_CENTER, 23) 344 #define FW_SLV_ID_SERVICE_VOP FW_SLV_ID(FW_SLV_TYPE_CENTER, 24) 345 #define FW_SLV_ID_UFS_APBS FW_SLV_ID(FW_SLV_TYPE_CENTER, 25) 346 #define FW_SLV_ID_UFS_AXIS FW_SLV_ID(FW_SLV_TYPE_CENTER, 26) 347 #define FW_SLV_ID_USB0 FW_SLV_ID(FW_SLV_TYPE_CENTER, 27) 348 #define FW_SLV_ID_MMU2 FW_SLV_ID(FW_SLV_TYPE_CENTER, 28) 349 #define FW_SLV_ID_USB_GRF FW_SLV_ID(FW_SLV_TYPE_CENTER, 29) 350 #define FW_SLV_ID_HDCP0_MMU FW_SLV_ID(FW_SLV_TYPE_CENTER, 30) 351 #define FW_SLV_ID_SAI5_8CH FW_SLV_ID(FW_SLV_TYPE_CENTER, 31) 352 #define FW_SLV_ID_SAI6_8CH FW_SLV_ID(FW_SLV_TYPE_CENTER, 32) 353 #define FW_SLV_ID_SPDIF_RX2 FW_SLV_ID(FW_SLV_TYPE_CENTER, 33) 354 #define FW_SLV_ID_SPDIF_TX2 FW_SLV_ID(FW_SLV_TYPE_CENTER, 34) 355 #define FW_SLV_ID_HDCP0_KEY FW_SLV_ID(FW_SLV_TYPE_CENTER, 35) 356 #define FW_SLV_ID_DSIHOST FW_SLV_ID(FW_SLV_TYPE_CENTER, 36) 357 #define FW_SLV_ID_EDP0 FW_SLV_ID(FW_SLV_TYPE_CENTER, 37) 358 #define FW_SLV_ID_HDCP0 FW_SLV_ID(FW_SLV_TYPE_CENTER, 38) 359 #define FW_SLV_ID_HDCP0_TRNG FW_SLV_ID(FW_SLV_TYPE_CENTER, 39) 360 #define FW_SLV_ID_HDMITX FW_SLV_ID(FW_SLV_TYPE_CENTER, 40) 361 #define FW_SLV_ID_VO0_GRF FW_SLV_ID(FW_SLV_TYPE_CENTER, 41) 362 #define FW_SLV_ID_EDP0_S FW_SLV_ID(FW_SLV_TYPE_CENTER, 42) 363 #define FW_SLV_ID_HDCP1_MMU FW_SLV_ID(FW_SLV_TYPE_CENTER, 43) 364 #define FW_SLV_ID_SAI7_8CH FW_SLV_ID(FW_SLV_TYPE_CENTER, 44) 365 #define FW_SLV_ID_SPDIF_TX3 FW_SLV_ID(FW_SLV_TYPE_CENTER, 45) 366 #define FW_SLV_ID_HDCP1_KEY FW_SLV_ID(FW_SLV_TYPE_CENTER, 46) 367 #define FW_SLV_ID_DP FW_SLV_ID(FW_SLV_TYPE_CENTER, 47) 368 #define FW_SLV_ID_HDCP1 FW_SLV_ID(FW_SLV_TYPE_CENTER, 48) 369 #define FW_SLV_ID_HDCP1_TRNG FW_SLV_ID(FW_SLV_TYPE_CENTER, 49) 370 #define FW_SLV_ID_VO1_GRF FW_SLV_ID(FW_SLV_TYPE_CENTER, 50) 371 #define FW_SLV_ID_VOP_GRF FW_SLV_ID(FW_SLV_TYPE_CENTER, 52) 372 #define FW_SLV_ID_UFS_GRF FW_SLV_ID(FW_SLV_TYPE_CENTER, 53) 373 #define FW_SLV_ID_SPDIF_TX4 FW_SLV_ID(FW_SLV_TYPE_CENTER, 54) 374 #define FW_SLV_ID_SPDIF_TX5 FW_SLV_ID(FW_SLV_TYPE_CENTER, 55) 375 #define FW_SLV_ID_SAI8_8CH FW_SLV_ID(FW_SLV_TYPE_CENTER, 56) 376 #define FW_SLV_ID_SAI9_8CH FW_SLV_ID(FW_SLV_TYPE_CENTER, 57) 377 #define FW_SLV_ID_DDR_TIMER_CH0 FW_SLV_ID(FW_SLV_TYPE_CENTER, 58) 378 #define FW_SLV_ID_DDR_TIMER_CH1 FW_SLV_ID(FW_SLV_TYPE_CENTER, 59) 379 #define FW_SLV_ID_VOP_RGN0 FW_SLV_ID(FW_SLV_TYPE_CENTER, 60) 380 #define FW_SLV_ID_VOP_RGN1 FW_SLV_ID(FW_SLV_TYPE_CENTER, 61) 381 #define FW_SLV_ID_VOP_RGN2 FW_SLV_ID(FW_SLV_TYPE_CENTER, 62) 382 #define FW_SLV_ID_VOP_RGN3 FW_SLV_ID(FW_SLV_TYPE_CENTER, 63) 383 #define FW_SLV_ID_VOP_OTHERS FW_SLV_ID(FW_SLV_TYPE_CENTER, 64) 384 #define FW_SLV_ID_CENTER_CNT 65 385 386 #define FW_SLV_ID_BIGCORE_CRU FW_SLV_ID(FW_SLV_TYPE_CCI, 0) 387 #define FW_SLV_ID_BIGCORE_GRF FW_SLV_ID(FW_SLV_TYPE_CCI, 1) 388 #define FW_SLV_ID_CCI FW_SLV_ID(FW_SLV_TYPE_CCI, 2) 389 #define FW_SLV_ID_CCI_CRU FW_SLV_ID(FW_SLV_TYPE_CCI, 3) 390 #define FW_SLV_ID_CCI_PVTPLL FW_SLV_ID(FW_SLV_TYPE_CCI, 4) 391 #define FW_SLV_ID_CCI_GRF FW_SLV_ID(FW_SLV_TYPE_CCI, 5) 392 #define FW_SLV_ID_DAP_LITE_A53 FW_SLV_ID(FW_SLV_TYPE_CCI, 6) 393 #define FW_SLV_ID_DAP_LITE_A72 FW_SLV_ID(FW_SLV_TYPE_CCI, 7) 394 #define FW_SLV_ID_LITCORE_GRF FW_SLV_ID(FW_SLV_TYPE_CCI, 8) 395 #define FW_SLV_ID_LITCORE_CRU FW_SLV_ID(FW_SLV_TYPE_CCI, 9) 396 #define FW_SLV_ID_SERVICE_CCI FW_SLV_ID(FW_SLV_TYPE_CCI, 10) 397 #define FW_SLV_ID_BIGCORE_PVTPLL FW_SLV_ID(FW_SLV_TYPE_CCI, 11) 398 #define FW_SLV_ID_LITCORE_PVTPLL FW_SLV_ID(FW_SLV_TYPE_CCI, 12) 399 #define FW_SLV_ID_CCI_CNT 15 400 401 #define FW_SLV_ID_PCIE0_DBI FW_SLV_ID(FW_SLV_TYPE_PHP, 0) 402 #define FW_SLV_ID_PCIE0_DBI_L FW_SLV_ID(FW_SLV_TYPE_PHP, 1) 403 #define FW_SLV_ID_PCIE0_S FW_SLV_ID(FW_SLV_TYPE_PHP, 2) 404 #define FW_SLV_ID_PCIE0_S_L FW_SLV_ID(FW_SLV_TYPE_PHP, 3) 405 #define FW_SLV_ID_PCIE1_DBI FW_SLV_ID(FW_SLV_TYPE_PHP, 4) 406 #define FW_SLV_ID_PCIE1_DBI_L FW_SLV_ID(FW_SLV_TYPE_PHP, 5) 407 #define FW_SLV_ID_PCIE1_S FW_SLV_ID(FW_SLV_TYPE_PHP, 6) 408 #define FW_SLV_ID_PCIE1_S_L FW_SLV_ID(FW_SLV_TYPE_PHP, 7) 409 #define FW_SLV_ID_USB1 FW_SLV_ID(FW_SLV_TYPE_PHP, 8) 410 #define FW_SLV_ID_PCIE0_APB FW_SLV_ID(FW_SLV_TYPE_PHP, 9) 411 #define FW_SLV_ID_PCIE1_APB FW_SLV_ID(FW_SLV_TYPE_PHP, 10) 412 #define FW_SLV_ID_PHP_GRF FW_SLV_ID(FW_SLV_TYPE_PHP, 11) 413 #define FW_SLV_ID_SATA0 FW_SLV_ID(FW_SLV_TYPE_PHP, 12) 414 #define FW_SLV_ID_SATA1 FW_SLV_ID(FW_SLV_TYPE_PHP, 13) 415 #define FW_SLV_ID_SERVICE_PHP FW_SLV_ID(FW_SLV_TYPE_PHP, 14) 416 #define FW_SLV_ID_MMU0 FW_SLV_ID(FW_SLV_TYPE_PHP, 15) 417 #define FW_SLV_ID_MMU1 FW_SLV_ID(FW_SLV_TYPE_PHP, 16) 418 #define FW_SLV_ID_PHP_CNT 20 419 420 #define FW_SLV_ID_GPU_GRF FW_SLV_ID(FW_SLV_TYPE_GPU, 0) 421 #define FW_SLV_ID_GPU FW_SLV_ID(FW_SLV_TYPE_GPU, 1) 422 #define FW_SLV_ID_SERVICE_GPU FW_SLV_ID(FW_SLV_TYPE_GPU, 2) 423 #define FW_SLV_ID_GPU_PVTPLL FW_SLV_ID(FW_SLV_TYPE_GPU, 3) 424 #define FW_SLV_ID_GPU_CNT 5 425 426 #define FW_SLV_ID_RKNN_TOP FW_SLV_ID(FW_SLV_TYPE_NPU, 0) 427 #define FW_SLV_ID_SERVICE_NPU0 FW_SLV_ID(FW_SLV_TYPE_NPU, 1) 428 #define FW_SLV_ID_SERVICE_NPU1 FW_SLV_ID(FW_SLV_TYPE_NPU, 2) 429 #define FW_SLV_ID_SERVICE_NPUSUBSYS FW_SLV_ID(FW_SLV_TYPE_NPU, 3) 430 #define FW_SLV_ID_RKNN_NSP FW_SLV_ID(FW_SLV_TYPE_NPU, 4) 431 #define FW_SLV_ID_NPU_GRF FW_SLV_ID(FW_SLV_TYPE_NPU, 5) 432 #define FW_SLV_ID_NPU_PVTPLL FW_SLV_ID(FW_SLV_TYPE_NPU, 6) 433 #define FW_SLV_ID_NPU_WDT FW_SLV_ID(FW_SLV_TYPE_NPU, 7) 434 #define FW_SLV_ID_NPU_TIMER_CH0 FW_SLV_ID(FW_SLV_TYPE_NPU, 8) 435 #define FW_SLV_ID_NPU_TIMER_CH1 FW_SLV_ID(FW_SLV_TYPE_NPU, 9) 436 #define FW_SLV_ID_NPU_CNT 10 437 438 #define FW_SLV_ID_PDM0 FW_SLV_ID(FW_SLV_TYPE_PMU, 0) 439 #define FW_SLV_ID_PMU_MEM FW_SLV_ID(FW_SLV_TYPE_PMU, 1) 440 #define FW_SLV_ID_CSIDPHY_GRF FW_SLV_ID(FW_SLV_TYPE_PMU, 2) 441 #define FW_SLV_ID_VDMA FW_SLV_ID(FW_SLV_TYPE_PMU, 3) 442 #define FW_SLV_ID_HDPTXPHY FW_SLV_ID(FW_SLV_TYPE_PMU, 4) 443 #define FW_SLV_ID_HDPTXPHY0_GRF FW_SLV_ID(FW_SLV_TYPE_PMU, 5) 444 #define FW_SLV_ID_I2C0 FW_SLV_ID(FW_SLV_TYPE_PMU, 6) 445 #define FW_SLV_ID_DCPHY FW_SLV_ID(FW_SLV_TYPE_PMU, 7) 446 #define FW_SLV_ID_CSIDPHY0 FW_SLV_ID(FW_SLV_TYPE_PMU, 8) 447 #define FW_SLV_ID_DCPHY_GRF FW_SLV_ID(FW_SLV_TYPE_PMU, 9) 448 #define FW_SLV_ID_PMU0 FW_SLV_ID(FW_SLV_TYPE_PMU, 10) 449 #define FW_SLV_ID_PMU0_GRF FW_SLV_ID(FW_SLV_TYPE_PMU, 11) 450 #define FW_SLV_ID_PMU0_IOC FW_SLV_ID(FW_SLV_TYPE_PMU, 12) 451 #define FW_SLV_ID_PMU1 FW_SLV_ID(FW_SLV_TYPE_PMU, 13) 452 #define FW_SLV_ID_PMU1_CRU FW_SLV_ID(FW_SLV_TYPE_PMU, 14) 453 #define FW_SLV_ID_PMU1_CRU_S FW_SLV_ID(FW_SLV_TYPE_PMU, 15) 454 #define FW_SLV_ID_PMU1_GRF FW_SLV_ID(FW_SLV_TYPE_PMU, 16) 455 #define FW_SLV_ID_PMU1_IOC FW_SLV_ID(FW_SLV_TYPE_PMU, 17) 456 #define FW_SLV_ID_PWM0_CH0 FW_SLV_ID(FW_SLV_TYPE_PMU, 18) 457 #define FW_SLV_ID_PWM0_CH1 FW_SLV_ID(FW_SLV_TYPE_PMU, 19) 458 #define FW_SLV_ID_UART1 FW_SLV_ID(FW_SLV_TYPE_PMU, 20) 459 #define FW_SLV_ID_MPHY_GRF FW_SLV_ID(FW_SLV_TYPE_PMU, 21) 460 #define FW_SLV_ID_MPHY FW_SLV_ID(FW_SLV_TYPE_PMU, 22) 461 #define FW_SLV_ID_USB2PHY0_GRF FW_SLV_ID(FW_SLV_TYPE_PMU, 23) 462 #define FW_SLV_ID_USB2PHY1_GRF FW_SLV_ID(FW_SLV_TYPE_PMU, 24) 463 #define FW_SLV_ID_USBDPPHY FW_SLV_ID(FW_SLV_TYPE_PMU, 25) 464 #define FW_SLV_ID_USBDPPHY_GRF FW_SLV_ID(FW_SLV_TYPE_PMU, 26) 465 #define FW_SLV_ID_VCCIO6_IOC FW_SLV_ID(FW_SLV_TYPE_PMU, 27) 466 #define FW_SLV_ID_PMU_WDT FW_SLV_ID(FW_SLV_TYPE_PMU, 28) 467 #define FW_SLV_ID_HPTIMER FW_SLV_ID(FW_SLV_TYPE_PMU, 29) 468 #define FW_SLV_ID_OSC_CHK FW_SLV_ID(FW_SLV_TYPE_PMU, 30) 469 #define FW_SLV_ID_PMU0_SGRF FW_SLV_ID(FW_SLV_TYPE_PMU, 31) 470 #define FW_SLV_ID_PMU1_SGRF FW_SLV_ID(FW_SLV_TYPE_PMU, 32) 471 #define FW_SLV_ID_PMU_PVTM FW_SLV_ID(FW_SLV_TYPE_PMU, 33) 472 #define FW_SLV_ID_SCRAMBLE_KEY FW_SLV_ID(FW_SLV_TYPE_PMU, 34) 473 #define FW_SLV_ID_SERVICE_PMU FW_SLV_ID(FW_SLV_TYPE_PMU, 35) 474 #define FW_SLV_ID_PMU_SRAM_REMAP FW_SLV_ID(FW_SLV_TYPE_PMU, 36) 475 #define FW_SLV_ID_PMU_TIMER_CH0 FW_SLV_ID(FW_SLV_TYPE_PMU, 37) 476 #define FW_SLV_ID_PMU_TIMER_CH1 FW_SLV_ID(FW_SLV_TYPE_PMU, 38) 477 #define FW_SLV_ID_GPIO0_CH0 FW_SLV_ID(FW_SLV_TYPE_PMU, 39) 478 #define FW_SLV_ID_GPIO0_CH1 FW_SLV_ID(FW_SLV_TYPE_PMU, 40) 479 #define FW_SLV_ID_GPIO0_CH2 FW_SLV_ID(FW_SLV_TYPE_PMU, 41) 480 #define FW_SLV_ID_GPIO0_CH3 FW_SLV_ID(FW_SLV_TYPE_PMU, 42) 481 #define FW_SLV_ID_PMU_FW FW_SLV_ID(FW_SLV_TYPE_PMU, 43) 482 #define FW_SLV_ID_PMU_CNT 45 483 484 #define PLAT_MAX_DDR_CAPACITY_MB 0x8000 /* for 32Gb */ 485 #define RG_MAP_SECURE(top, base) \ 486 (((((top) - 1) & 0x7fff) << 16) | ((base) & 0x7fff)) 487 #define RG_MAP_SRAM_SECURE(top_kb, base_kb) \ 488 (((((top_kb) / 4 - 1) & 0xff) << 8) | ((base_kb) / 4 & 0xff)) 489 #define RG_MAP_CBUF_SECURE(top_kb, base_kb) \ 490 (((((top_kb) / 4 - 1) & 0xff) << 8) | ((base_kb) / 4 & 0xff)) 491 492 #define FW_UPDATE_WAIT_LOOP 500000 493 494 __pmusramfunc void pmusram_fw_update_msk(uint32_t msk); 495 __pmusramfunc void pmusram_all_fw_bypass(void); 496 497 void fw_init(void); 498 499 #endif /* __FIREWALL_H__ */ 500