1 /*
2 * ALSA SoC ES7243E adc driver
3 *
4 * Author: David Yang, <yangxiaohua@everest-semi.com>
5 * or
6 * <info@everest-semi.com>
7 * Copyright: (C) 2017 Everest Semiconductor Co Ltd.,
8 *
9 * Based on sound/soc/codecs/es7243.c by DavidYang
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 * Notes:
16 * ES7243E is a stereo Audio ADC for Microphone Array
17 *
18 */
19
20 #include <linux/module.h>
21 #include <linux/moduleparam.h>
22 #include <linux/init.h>
23 #include <linux/delay.h>
24 #include <linux/pm.h>
25 #include <linux/i2c.h>
26 #include <linux/slab.h>
27 #include <sound/core.h>
28 #include <sound/pcm.h>
29 #include <sound/pcm_params.h>
30 #include <sound/soc.h>
31 #include <sound/soc-dapm.h>
32 #include <sound/tlv.h>
33 #include <sound/initval.h>
34 #include <linux/regmap.h>
35
36 #include "es7243e_usr_cfg.h"
37
38 static struct i2c_client *i2c_clt[(ES7243E_CHANNELS_MAX) / 2];
39
40 /* codec private data */
41 struct es7243e_priv {
42 struct regmap *regmap;
43 struct i2c_client *i2c;
44 unsigned int sysclk;
45 struct snd_pcm_hw_constraint_list *sysclk_constraints;
46 bool dmic;
47 u8 mclksrc;
48 bool mclkinv;
49 bool bclkinv;
50 u8 tdm;
51 u8 vdda;
52 };
53 static struct snd_soc_component *tron_component[8];
54 static int es7243e_codec_num = 0;
55
56 static const struct regmap_config es7243e_regmap_config = {
57 .reg_bits = 8, //Number of bits in a register address
58 .val_bits = 8, //Number of bits in a register value
59 };
60
61 /*
62 * ES7243 register cache
63 */
64 static const u8 es7243_reg[] = {
65 0x00, 0x00, 0x10, 0x04, /* 0 */
66 0x02, 0x13, 0x00, 0x3f, /* 4 */
67 0x11, 0x00, 0xc0, 0xc0, /* 8 */
68 0x12, 0xa0, 0x40, /* 12 */
69 };
70
71 static const struct reg_default es7243_reg_defaults[] = {
72 {0x00, 0x00}, {0x01, 0x00}, {0x02, 0x10}, {0x03, 0x04}, /* 0 */
73 {0x04, 0x02}, {0x05, 0x13}, {0x06, 0x00}, {0x07, 0x3f}, /* 4 */
74 {0x08, 0x11}, {0x09, 0x00}, {0x0a, 0xc0}, {0x0b, 0xc0}, /* 8 */
75 {0x0c, 0x12}, {0x0d, 0xa0}, {0x0e, 0x40}, /* 12 */
76 };
77
es7243e_read(u8 reg,u8 * rt_value,struct i2c_client * client)78 static int es7243e_read(u8 reg, u8 * rt_value, struct i2c_client *client)
79 {
80 int ret;
81 u8 read_cmd[3] = { 0 };
82 u8 cmd_len = 0;
83
84 read_cmd[0] = reg;
85 cmd_len = 1;
86
87 if (client->adapter == NULL)
88 pr_err("es7243_read client->adapter==NULL\n");
89
90 ret = i2c_master_send(client, read_cmd, cmd_len);
91 if (ret != cmd_len) {
92 pr_err("es7243_read error1\n");
93 return -1;
94 }
95
96 ret = i2c_master_recv(client, rt_value, 1);
97 if (ret != 1) {
98 pr_err("es7243_read error2, ret = %d.\n", ret);
99 return -1;
100 }
101
102 return 0;
103 }
104
105 static int
es7243e_write(u8 reg,unsigned char value,struct i2c_client * client)106 es7243e_write(u8 reg, unsigned char value, struct i2c_client *client)
107 {
108 int ret = 0;
109 u8 write_cmd[2] = { 0 };
110
111 write_cmd[0] = reg;
112 write_cmd[1] = value;
113
114 ret = i2c_master_send(client, write_cmd, 2);
115 if (ret != 2) {
116 pr_err("es7243_write error->[REG-0x%02x,val-0x%02x]\n",
117 reg, value);
118 return -1;
119 }
120
121 return 0;
122 }
123
124 static int
es7243e_update_bits(u8 reg,u8 mask,u8 value,struct i2c_client * client)125 es7243e_update_bits(u8 reg, u8 mask, u8 value, struct i2c_client *client)
126 {
127 u8 val_old = 0, val_new = 0;
128
129 es7243e_read(reg, &val_old, client);
130 val_new = (val_old & ~mask) | (value & mask);
131 if (val_new != val_old) {
132 es7243e_write(reg, val_new, client);
133 }
134
135 return 0;
136 }
137
138 struct _coeff_div {
139 u32 mclk; //mclk frequency
140 u32 sr_rate; //sample rate
141 u8 osr; //adc over sample rate
142 u8 prediv_premulti; //adcclk and dacclk divider
143 u8 cf_dsp_div; //adclrck divider and daclrck divider
144 u8 scale;
145 u8 lrckdiv_h;
146 u8 lrckdiv_l;
147 u8 bclkdiv; //sclk divider
148 };
149
150 /* codec hifi mclk clock divider coefficients */
151 static const struct _coeff_div coeff_div[] = {
152 //mclk lrck, osr, pre, div ,scale, lrckdiv_h, lrckdiv_l, bclkdiv
153 /* 24.576MHZ */
154 {24576000, 8000, 0x20, 0x50, 0x00, 0x00, 0x0b, 0xff, 0x2f},
155 {24576000, 12000, 0x20, 0x30, 0x00, 0x00, 0x07, 0xff, 0x1f},
156 {24576000, 16000, 0x20, 0x20, 0x00, 0x00, 0x05, 0xff, 0x17},
157 {24576000, 24000, 0x20, 0x10, 0x00, 0x00, 0x03, 0xff, 0x0f},
158 {24576000, 32000, 0x20, 0x21, 0x00, 0x00, 0x02, 0xff, 0x0b},
159 {24576000, 48000, 0x20, 0x00, 0x00, 0x00, 0x01, 0xff, 0x07},
160 /* 12.288MHZ */
161 {12288000, 8000, 0x20, 0x20, 0x00, 0x00, 0x05, 0xff, 0x17},
162 {12288000, 12000, 0x20, 0x10, 0x00, 0x00, 0x03, 0xff, 0x0f},
163 {12288000, 16000, 0x20, 0x21, 0x00, 0x00, 0x02, 0xff, 0x0b},
164 {12288000, 24000, 0x20, 0x00, 0x00, 0x00, 0x01, 0xff, 0x07},
165 {12288000, 32000, 0x20, 0x22, 0x00, 0x00, 0x01, 0x7f, 0x05},
166 {12288000, 48000, 0x20, 0x01, 0x00, 0x00, 0x00, 0xff, 0x03},
167 /* 6.144MHZ */
168 {6144000, 8000, 0x20, 0x21, 0x00, 0x00, 0x02, 0xff, 0x0b},
169 {6144000, 12000, 0x20, 0x00, 0x00, 0x00, 0x01, 0xff, 0x07},
170 {6144000, 16000, 0x20, 0x22, 0x00, 0x00, 0x01, 0x7f, 0x05},
171 {6144000, 24000, 0x20, 0x01, 0x00, 0x00, 0x00, 0xff, 0x03},
172 {6144000, 32000, 0x20, 0x23, 0x00, 0x00, 0x00, 0xbf, 0x02},
173 {6144000, 48000, 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x01},
174 /* 3.072MHZ */
175 {3072000, 8000, 0x20, 0x22, 0x00, 0x00, 0x01, 0x7f, 0x05},
176 {3072000, 12000, 0x20, 0x01, 0x00, 0x00, 0x00, 0xff, 0x03},
177 {3072000, 16000, 0x20, 0x23, 0x00, 0x00, 0x00, 0xbf, 0x02},
178 {3072000, 24000, 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x01},
179 {3072000, 32000, 0x10, 0x03, 0x20, 0x04, 0x00, 0x5f, 0x02},
180 {3072000, 48000, 0x20, 0x03, 0x00, 0x00, 0x00, 0x3f, 0x00},
181 /* 1.536MHZ */
182 {1536000, 8000, 0x20, 0x23, 0x00, 0x00, 0x00, 0xbf, 0x02},
183 {1536000, 12000, 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x01},
184 {1536000, 16000, 0x10, 0x03, 0x20, 0x04, 0x00, 0x5f, 0x00},
185 {1536000, 24000, 0x20, 0x03, 0x00, 0x00, 0x00, 0x3f, 0x00},
186 /* 32.768MHZ */
187 {32768000, 8000, 0x20, 0x70, 0x00, 0x00, 0x0f, 0xff, 0x3f},
188 {32768000, 16000, 0x20, 0x30, 0x00, 0x00, 0x07, 0xff, 0x1f},
189 {32768000, 32000, 0x20, 0x10, 0x00, 0x00, 0x03, 0xff, 0x0f},
190 /* 16.384MHZ */
191 {16384000, 8000, 0x20, 0x30, 0x00, 0x00, 0x07, 0xff, 0x1f},
192 {16384000, 16000, 0x20, 0x10, 0x00, 0x00, 0x03, 0xff, 0x0f},
193 {16384000, 32000, 0x20, 0x00, 0x00, 0x00, 0x01, 0xff, 0x07},
194 /* 8.192MHZ */
195 {8192000, 8000, 0x20, 0x10, 0x00, 0x00, 0x03, 0xff, 0x0f},
196 {8192000, 16000, 0x20, 0x00, 0x00, 0x00, 0x01, 0xff, 0x07},
197 {8192000, 32000, 0x20, 0x01, 0x00, 0x00, 0x00, 0xff, 0x03},
198 /* 4.096MHZ */
199 {4096000, 8000, 0x20, 0x00, 0x00, 0x00, 0x01, 0xff, 0x07},
200 {4096000, 16000, 0x20, 0x01, 0x00, 0x00, 0x00, 0xff, 0x03},
201 {4096000, 32000, 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x01},
202 /* 2.048MHZ */
203 {2048000, 8000, 0x20, 0x01, 0x00, 0x00, 0x00, 0xff, 0x03},
204 {2048000, 16000, 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x01},
205 {2048000, 32000, 0x20, 0x03, 0x00, 0x00, 0x00, 0x3f, 0x00},
206 /* 1.024MHZ */
207 {1024000, 8000, 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x01},
208 {1024000, 16000, 0x20, 0x03, 0x00, 0x00, 0x00, 0x3f, 0x00},
209 /* 22.5792MHz */
210 {22579200, 11025, 0x20, 0x30, 0x00, 0x00, 0x07, 0xff, 0x1f},
211 {22579200, 22050, 0x20, 0x10, 0x00, 0x00, 0x03, 0xff, 0x0f},
212 {22579200, 44100, 0x20, 0x00, 0x00, 0x00, 0x01, 0xff, 0x07},
213 /* 11.2896MHz */
214 {11289600, 11025, 0x20, 0x10, 0x00, 0x00, 0x03, 0xff, 0x0f},
215 {11289600, 22050, 0x20, 0x00, 0x00, 0x00, 0x01, 0xff, 0x07},
216 {11289600, 44100, 0x20, 0x01, 0x00, 0x00, 0x00, 0xff, 0x03},
217 /* 5.6448MHz */
218 {56448000, 11025, 0x20, 0x00, 0x00, 0x00, 0x01, 0xff, 0x07},
219 {56448000, 22050, 0x20, 0x01, 0x00, 0x00, 0x00, 0xff, 0x03},
220 {56448000, 44100, 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x01},
221 /* 2.8224MHz */
222 {28224000, 11025, 0x20, 0x01, 0x00, 0x00, 0x00, 0xff, 0x03},
223 {28224000, 22050, 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x01},
224 {28224000, 44100, 0x20, 0x03, 0x00, 0x00, 0x00, 0x3f, 0x00},
225 /* 1.4112MHz */
226 {14112000, 11025, 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x01},
227 {14112000, 22050, 0x20, 0x03, 0x00, 0x00, 0x00, 0x3f, 0x00},
228 };
229
get_coeff(int mclk,int rate)230 static inline int get_coeff(int mclk, int rate)
231 {
232 int i;
233
234 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
235 if (coeff_div[i].sr_rate == rate && coeff_div[i].mclk == mclk)
236 return i;
237 }
238
239 return -EINVAL;
240 }
241
242 /* The set of rates we can generate from the above for each SYSCLK */
243
244 static unsigned int rates_12288[] = {
245 8000, 12000, 16000, 24000, 32000, 48000, 64000, 96000, 128000, 192000,
246 };
247
248 static unsigned int rates_8192[] = {
249 8000, 16000, 32000, 64000, 128000,
250 };
251
252 static struct snd_pcm_hw_constraint_list constraints_12288 = {
253 .count = ARRAY_SIZE(rates_12288),
254 .list = rates_12288,
255 };
256
257 static struct snd_pcm_hw_constraint_list constraints_8192 = {
258 .count = ARRAY_SIZE(rates_8192),
259 .list = rates_8192,
260 };
261
262 static unsigned int rates_112896[] = {
263 8000, 11025, 22050, 44100,
264 };
265
266 static struct snd_pcm_hw_constraint_list constraints_112896 = {
267 .count = ARRAY_SIZE(rates_112896),
268 .list = rates_112896,
269 };
270
271 #if 0
272 static unsigned int rates_12[] = {
273 8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000,
274 48000, 88235, 96000,
275 };
276
277 static struct snd_pcm_hw_constraint_list constraints_12 = {
278 .count = ARRAY_SIZE(rates_12),
279 .list = rates_12,
280 };
281 #endif
282 /*
283 * Note that this should be called from init rather than from hw_params.
284 */
285 static int
es7243e_set_dai_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)286 es7243e_set_dai_sysclk(struct snd_soc_dai *codec_dai,
287 int clk_id, unsigned int freq, int dir)
288 {
289 struct snd_soc_component *component = codec_dai->component;
290 struct es7243e_priv *es7243e = snd_soc_component_get_drvdata(component);
291 printk("Enter into %s(), freq = %d\n", __func__, freq);
292 switch (freq) {
293 case 11289600:
294 case 22579200:
295 es7243e->sysclk_constraints = &constraints_112896;
296 es7243e->sysclk = freq;
297 return 0;
298 case 12288000:
299 case 24576000:
300 es7243e->sysclk_constraints = &constraints_12288;
301 es7243e->sysclk = freq;
302 return 0;
303 case 4096000:
304 case 8192000:
305 es7243e->sysclk_constraints = &constraints_8192;
306 es7243e->sysclk = freq;
307 return 0;
308 /*
309 case 12000000:
310 case 24000000:
311 es7243e->sysclk_constraints = &constraints_12;
312 es7243e->sysclk = freq;
313 return 0;
314 */
315 }
316 // return -EINVAL;
317 return 0;
318 }
319
es7243e_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)320 static int es7243e_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
321 {
322 #if 0
323 u8 iface = 0;
324 u8 adciface = 0;
325 u8 clksel = 0;
326 u8 i;
327 printk("Enter into %s()\n", __func__);
328 for (i = 0; i < (ES7243E_CHANNELS_MAX) / 2; i++) {
329 es7243e_read(0x0b, &adciface, i2c_clt[i]); //get interface format
330 es7243e_read(0x00, &iface, i2c_clt[i]); //get spd interface
331 es7243e_read(0x02, &clksel, i2c_clt[i]); //get spd interface
332
333 /* set master/slave audio interface */
334 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
335 case SND_SOC_DAIFMT_CBM_CFM: // MASTER MODE
336 iface |= 0x40;
337 break;
338 case SND_SOC_DAIFMT_CBS_CFS: // SLAVE MODE
339 iface &= 0xbf;
340 break;
341 default:
342 return -EINVAL;
343 }
344 /* interface format */
345 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
346 case SND_SOC_DAIFMT_I2S:
347 adciface &= 0xFC;
348 break;
349 case SND_SOC_DAIFMT_RIGHT_J:
350 return -EINVAL;
351 case SND_SOC_DAIFMT_LEFT_J:
352 adciface &= 0xFC;
353 adciface |= 0x01;
354 break;
355 case SND_SOC_DAIFMT_DSP_A:
356 adciface &= 0xDC;
357 adciface |= 0x03;
358 break;
359 case SND_SOC_DAIFMT_DSP_B:
360 adciface &= 0xDC;
361 adciface |= 0x23;
362 break;
363 default:
364 return -EINVAL;
365 }
366
367 /* clock inversion */
368 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
369 case SND_SOC_DAIFMT_NB_NF:
370 adciface &= 0xdf;
371 clksel &= 0xfe;
372 break;
373 case SND_SOC_DAIFMT_IB_IF:
374 adciface |= 0x20;
375 clksel |= 0x01;
376 break;
377 case SND_SOC_DAIFMT_IB_NF:
378 adciface &= 0xdf;
379 clksel |= 0x01;
380 break;
381 case SND_SOC_DAIFMT_NB_IF:
382 adciface |= 0x20;
383 clksel &= 0xfe;
384 break;
385 default:
386 return -EINVAL;
387 }
388
389 es7243e_write(0x00, iface, i2c_clt[i]);
390 es7243e_write(0x02, clksel, i2c_clt[i]);
391 es7243e_write(0x0b, adciface, i2c_clt[i]);
392 }
393 #endif
394 return 0;
395 }
396
397 static int
es7243e_pcm_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)398 es7243e_pcm_startup(struct snd_pcm_substream *substream,
399 struct snd_soc_dai *dai)
400 {
401
402 return 0;
403 }
404
405 static int
es7243e_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)406 es7243e_pcm_hw_params(struct snd_pcm_substream *substream,
407 struct snd_pcm_hw_params *params,
408 struct snd_soc_dai *dai)
409 {
410 // struct snd_soc_pcm_runtime *rtd = substream->private_data;
411 // struct snd_soc_codec *codec = rtd->codec;
412 // struct es7243e_priv *es7243e = snd_soc_codec_get_drvdata(codec);
413 u8 index, regv = 0;
414 // int coeff;
415 printk("Enter into %s()\n", __func__);
416 #if 0
417 coeff = get_coeff(es7243e->sysclk, params_rate(params));
418 if (coeff < 0) {
419 printk("Unable to configure sample rate %dHz with %dHz MCLK",
420 params_rate(params), es7243e->sysclk);
421 return coeff;
422 }
423 /*
424 * set clock parameters
425 */
426 if (coeff >= 0) {
427 for (index = 0; index < (ES7243E_CHANNELS_MAX) / 2; index++) {
428 es7243e_write(0x03, coeff_div[coeff].osr,
429 i2c_clt[index]);
430 es7243e_write(0x04,
431 coeff_div[coeff].prediv_premulti,
432 i2c_clt[index]);
433 es7243e_write(0x05, coeff_div[coeff].cf_dsp_div,
434 i2c_clt[index]);
435 es7243e_write(0x0d, coeff_div[coeff].scale,
436 i2c_clt[index]);
437 es7243e_write(0x03, coeff_div[coeff].osr,
438 i2c_clt[index]);
439
440 es7243e_read(0x07, ®v, i2c_clt[index]);
441 regv &= 0xf0;
442 regv |= (coeff_div[coeff].lrckdiv_h & 0x0f);
443 es7243e_write(0x07, regv, i2c_clt[index]);
444 es7243e_write(0x06, coeff_div[coeff].bclkdiv,
445 i2c_clt[index]);
446
447 }
448 }
449 #endif
450 /*
451 * set data length
452 */
453 for (index = 0; index < (ES7243E_CHANNELS_MAX) / 2; index++) {
454 es7243e_read(0x0b, ®v, i2c_clt[index]);
455 regv &= 0xe3;
456 switch (params_format(params)) {
457 case SNDRV_PCM_FORMAT_S16_LE:
458 regv |= 0x0c;
459 break;
460 case SNDRV_PCM_FORMAT_S20_3LE:
461 regv |= 0x04;
462 break;
463 case SNDRV_PCM_FORMAT_S24_LE:
464 break;
465 case SNDRV_PCM_FORMAT_S32_LE:
466 regv |= 0x10;
467 break;
468 default:
469 regv |= 0x0c;
470 break;
471 }
472 es7243e_write(0x0b, regv, i2c_clt[index]);
473 }
474 msleep(50);
475 for (index = 0; index < (ES7243E_CHANNELS_MAX) / 2; index++) {
476 es7243e_read(0x0b, ®v, i2c_clt[index]);
477 regv &= 0x3f;
478 es7243e_write(0x0b, regv, i2c_clt[index]);
479 }
480 return 0;
481 }
482
es7243e_mute(struct snd_soc_dai * dai,int mute,int stream)483 static int es7243e_mute(struct snd_soc_dai *dai, int mute, int stream)
484 {
485 //struct snd_soc_codec *codec = dai->codec;
486 u8 i;
487 printk("Enter into %s()\n", __func__);
488 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
489 return 0;
490
491 for (i = 0; i < (ES7243E_CHANNELS_MAX) / 2; i++) {
492 if (mute)
493 es7243e_update_bits(0x0b, 0xc0, 0xc0, i2c_clt[i]);
494 else
495 es7243e_update_bits(0x0b, 0xc0, 0x00, i2c_clt[i]);
496 }
497 return 0;
498 }
499
500 static int
es7243e_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)501 es7243e_set_bias_level(struct snd_soc_component *component,
502 enum snd_soc_bias_level level)
503 {
504 u8 i, regv = 0;
505 switch (level) {
506 case SND_SOC_BIAS_ON:
507 printk("%s on\n", __func__);
508 break;
509 case SND_SOC_BIAS_PREPARE:
510 printk("%s prepare\n", __func__);
511 break;
512 case SND_SOC_BIAS_STANDBY:
513 printk("%s standby\n", __func__);
514 for (i = 0; i < (ES7243E_CHANNELS_MAX) / 2; i++) {
515 /*
516 * enable clock
517 */
518 es7243e_read(0x01, ®v, i2c_clt[i]);
519 regv |= 0x0A;
520 es7243e_write(0x01, regv, i2c_clt[i]);
521 es7243e_write(0x16, 0x00, i2c_clt[i]); //power up analog
522 /*
523 * enable mic input 1
524 */
525 es7243e_read(0x20, ®v, i2c_clt[i]);
526 regv |= 0x10;
527 es7243e_write(0x20, regv, i2c_clt[i]);
528 /*
529 * enable mic input 2
530 */
531 es7243e_read(0x21, ®v, i2c_clt[i]);
532 regv |= 0x10;
533 es7243e_write(0x21, regv, i2c_clt[i]);
534 msleep(100);
535 es7243e_update_bits(0x0b, 0xc0, 0x00, i2c_clt[i]); //mute SDP
536 }
537 break;
538 case SND_SOC_BIAS_OFF:
539 printk("%s off\n", __func__);
540 for (i = 0; i < (ES7243E_CHANNELS_MAX) / 2; i++) {
541 es7243e_update_bits(0x0b, 0xc0, 0xc0, i2c_clt[i]); //mute SDP
542 /*
543 * disable mic input 1
544 */
545 es7243e_read(0x20, ®v, i2c_clt[i]);
546 regv &= 0xef;
547 es7243e_write(0x20, regv, i2c_clt[i]);
548 /*
549 * disable mic input 2
550 */
551 es7243e_read(0x21, ®v, i2c_clt[i]);
552 regv &= 0xef;
553 es7243e_write(0x21, regv, i2c_clt[i]);
554
555 es7243e_write(0x16, 0xff, i2c_clt[i]); //power down analog
556
557 /*
558 * disable clock
559 */
560 es7243e_read(0x01, ®v, i2c_clt[i]);
561 regv &= 0xf5;
562 es7243e_write(0x01, regv, i2c_clt[i]);
563 }
564 break;
565 }
566 //codec->dapm.bias_level = level;
567 return 0;
568 }
569
570 /*
571 * snd_controls for PGA gain, Mute, suspend and resume
572 */
573 static const DECLARE_TLV_DB_SCALE(mic_boost_tlv, 0, 300, 0);
574
575 #if ES7243E_CHANNELS_MAX > 0
576 static int
es7243e_micboost1_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)577 es7243e_micboost1_setting_set(struct snd_kcontrol *kcontrol,
578 struct snd_ctl_elem_value *ucontrol)
579 {
580 es7243e_update_bits(0x20, 0x0F,
581 ucontrol->value.integer.value[0] & 0x0f,
582 i2c_clt[0]);
583 return 0;
584 }
585
586 static int
es7243e_micboost1_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)587 es7243e_micboost1_setting_get(struct snd_kcontrol *kcontrol,
588 struct snd_ctl_elem_value *ucontrol)
589 {
590 u8 val = 0;
591 es7243e_read(0x20, &val, i2c_clt[0]);
592 ucontrol->value.integer.value[0] = val & 0x0f;
593 return 0;
594 }
595
596 static int
es7243e_micboost2_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)597 es7243e_micboost2_setting_set(struct snd_kcontrol *kcontrol,
598 struct snd_ctl_elem_value *ucontrol)
599 {
600 es7243e_update_bits(0x21, 0x0F,
601 ucontrol->value.integer.value[0] & 0x0f,
602 i2c_clt[0]);
603 return 0;
604 }
605
606 static int
es7243e_micboost2_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)607 es7243e_micboost2_setting_get(struct snd_kcontrol *kcontrol,
608 struct snd_ctl_elem_value *ucontrol)
609 {
610 u8 val = 0;
611 es7243e_read(0x21, &val, i2c_clt[0]);
612 ucontrol->value.integer.value[0] = val & 0x0f;
613 return 0;
614 }
615
616 static int
es7243e_adc1_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)617 es7243e_adc1_mute_set(struct snd_kcontrol *kcontrol,
618 struct snd_ctl_elem_value *ucontrol)
619 {
620 es7243e_update_bits(0x0B, 0x40,
621 (ucontrol->value.integer.value[0] & 0x01) << 6,
622 i2c_clt[0]);
623 return 0;
624 }
625
626 static int
es7243e_adc1_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)627 es7243e_adc1_mute_get(struct snd_kcontrol *kcontrol,
628 struct snd_ctl_elem_value *ucontrol)
629 {
630 u8 val = 0;
631 es7243e_read(0x0B, &val, i2c_clt[0]);
632 ucontrol->value.integer.value[0] = (val & 0x40) >> 6;
633 return 0;
634 }
635
636 static int
es7243e_adc2_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)637 es7243e_adc2_mute_set(struct snd_kcontrol *kcontrol,
638 struct snd_ctl_elem_value *ucontrol)
639 {
640 es7243e_update_bits(0x0B, 0x80,
641 (ucontrol->value.integer.value[0] & 0x01) << 7,
642 i2c_clt[0]);
643 return 0;
644 }
645
646 static int
es7243e_adc2_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)647 es7243e_adc2_mute_get(struct snd_kcontrol *kcontrol,
648 struct snd_ctl_elem_value *ucontrol)
649 {
650 u8 val = 0;
651 es7243e_read(0x0B, &val, i2c_clt[0]);
652 ucontrol->value.integer.value[0] = (val & 0x80) >> 7;
653 return 0;
654 }
655
656 static int
es7243e_adc1adc2_suspend_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)657 es7243e_adc1adc2_suspend_get(struct snd_kcontrol *kcontrol,
658 struct snd_ctl_elem_value *ucontrol)
659 {
660 u8 val = 0;
661 es7243e_read(0x17, &val, i2c_clt[0]);
662 ucontrol->value.integer.value[0] = (val & 0x02) >> 1;
663 return 0;
664 }
665
666 static int
es7243e_adc1adc2_suspend_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)667 es7243e_adc1adc2_suspend_set(struct snd_kcontrol *kcontrol,
668 struct snd_ctl_elem_value *ucontrol)
669 {
670 //u8 val;
671 if ((ucontrol->value.integer.value[0] & 0x01) == 1) { //suspend
672 es7243e_write(0x04, 0x02, i2c_clt[0]);
673 es7243e_write(0x04, 0x01, i2c_clt[0]);
674 es7243e_write(0xf7, 0x30, i2c_clt[0]);
675 es7243e_write(0xf9, 0x01, i2c_clt[0]);
676 es7243e_write(0x16, 0xff, i2c_clt[0]);
677 es7243e_write(0x17, 0x00, i2c_clt[0]);
678 es7243e_write(0x01, 0x38, i2c_clt[0]);
679 es7243e_update_bits(0x20, 0x10, 0x00, i2c_clt[0]);
680 es7243e_update_bits(0x21, 0x10, 0x00, i2c_clt[0]);
681 es7243e_write(0x00, 0x8e, i2c_clt[0]);
682 es7243e_write(0x01, 0x30, i2c_clt[0]);
683 } else { //resume
684 es7243e_write(0x01, 0x3a, i2c_clt[0]);
685 es7243e_write(0x00, 0x80, i2c_clt[0]);
686 es7243e_update_bits(0x20, 0x10, 0x10, i2c_clt[0]);
687 es7243e_update_bits(0x21, 0x10, 0x10, i2c_clt[0]);
688 es7243e_write(0x16, 0x00, i2c_clt[0]);
689 es7243e_write(0x17, 0x02, i2c_clt[0]);
690 }
691 return 0;
692 }
693 #endif
694 #if ES7243E_CHANNELS_MAX > 2
695 static int
es7243e_micboost3_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)696 es7243e_micboost3_setting_set(struct snd_kcontrol *kcontrol,
697 struct snd_ctl_elem_value *ucontrol)
698 {
699 es7243e_update_bits(0x20, 0x0F,
700 ucontrol->value.integer.value[0] & 0x0f,
701 i2c_clt[1]);
702 return 0;
703 }
704
705 static int
es7243e_micboost3_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)706 es7243e_micboost3_setting_get(struct snd_kcontrol *kcontrol,
707 struct snd_ctl_elem_value *ucontrol)
708 {
709 u8 val = 0;
710 es7243e_read(0x20, &val, i2c_clt[1]);
711 ucontrol->value.integer.value[0] = val & 0x0f;
712 return 0;
713 }
714
715 static int
es7243e_micboost4_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)716 es7243e_micboost4_setting_set(struct snd_kcontrol *kcontrol,
717 struct snd_ctl_elem_value *ucontrol)
718 {
719 es7243e_update_bits(0x21, 0x0F,
720 ucontrol->value.integer.value[0] & 0x0f,
721 i2c_clt[1]);
722 return 0;
723 }
724
725 static int
es7243e_micboost4_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)726 es7243e_micboost4_setting_get(struct snd_kcontrol *kcontrol,
727 struct snd_ctl_elem_value *ucontrol)
728 {
729 u8 val = 0;
730 es7243e_read(0x21, &val, i2c_clt[1]);
731 ucontrol->value.integer.value[0] = val & 0x0f;
732 return 0;
733 }
734
735 static int
es7243e_adc3_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)736 es7243e_adc3_mute_set(struct snd_kcontrol *kcontrol,
737 struct snd_ctl_elem_value *ucontrol)
738 {
739 es7243e_update_bits(0x0B, 0x40,
740 (ucontrol->value.integer.value[0] & 0x01) << 6,
741 i2c_clt[1]);
742 return 0;
743 }
744
745 static int
es7243e_adc3_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)746 es7243e_adc3_mute_get(struct snd_kcontrol *kcontrol,
747 struct snd_ctl_elem_value *ucontrol)
748 {
749 u8 val = 0;
750 es7243e_read(0x0B, &val, i2c_clt[1]);
751 ucontrol->value.integer.value[0] = (val & 0X40) >> 6;
752 return 0;
753 }
754
755 static int
es7243e_adc4_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)756 es7243e_adc4_mute_set(struct snd_kcontrol *kcontrol,
757 struct snd_ctl_elem_value *ucontrol)
758 {
759 es7243e_update_bits(0x0B, 0x80,
760 (ucontrol->value.integer.value[0] & 0x01) << 7,
761 i2c_clt[1]);
762 return 0;
763 }
764
765 static int
es7243e_adc4_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)766 es7243e_adc4_mute_get(struct snd_kcontrol *kcontrol,
767 struct snd_ctl_elem_value *ucontrol)
768 {
769 u8 val = 0;
770 es7243e_read(0x0B, &val, i2c_clt[1]);
771 ucontrol->value.integer.value[0] = (val & 0x80) >> 7;
772 return 0;
773 }
774
775 static int
es7243e_adc3adc4_suspend_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)776 es7243e_adc3adc4_suspend_get(struct snd_kcontrol *kcontrol,
777 struct snd_ctl_elem_value *ucontrol)
778 {
779 u8 val = 0;
780 es7243e_read(0x17, &val, i2c_clt[1]);
781 ucontrol->value.integer.value[0] = (val & 0x02) >> 1;
782 return 0;
783 }
784
785 static int
es7243e_adc3adc4_suspend_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)786 es7243e_adc3adc4_suspend_set(struct snd_kcontrol *kcontrol,
787 struct snd_ctl_elem_value *ucontrol)
788 {
789 //u8 val;
790 if ((ucontrol->value.integer.value[0] & 0x01) == 1) { //suspend
791 es7243e_write(0x04, 0x02, i2c_clt[1]);
792 es7243e_write(0x04, 0x01, i2c_clt[1]);
793 es7243e_write(0xf7, 0x30, i2c_clt[1]);
794 es7243e_write(0xf9, 0x01, i2c_clt[1]);
795 es7243e_write(0x16, 0xff, i2c_clt[1]);
796 es7243e_write(0x17, 0x00, i2c_clt[1]);
797 es7243e_write(0x01, 0x38, i2c_clt[1]);
798 es7243e_update_bits(0x20, 0x10, 0x00, i2c_clt[1]);
799 es7243e_update_bits(0x21, 0x10, 0x00, i2c_clt[1]);
800 es7243e_write(0x00, 0x8e, i2c_clt[1]);
801 es7243e_write(0x01, 0x30, i2c_clt[1]);
802 } else { //resume
803 es7243e_write(0x01, 0x3a, i2c_clt[1]);
804 es7243e_write(0x00, 0x80, i2c_clt[1]);
805 es7243e_update_bits(0x20, 0x10, 0x10, i2c_clt[1]);
806 es7243e_update_bits(0x21, 0x10, 0x10, i2c_clt[1]);
807 es7243e_write(0x16, 0x00, i2c_clt[1]);
808 es7243e_write(0x17, 0x02, i2c_clt[1]);
809 }
810 return 0;
811 }
812 #endif
813 #if ES7243E_CHANNELS_MAX > 4
814 static int
es7243e_micboost5_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)815 es7243e_micboost5_setting_set(struct snd_kcontrol *kcontrol,
816 struct snd_ctl_elem_value *ucontrol)
817 {
818 es7243e_update_bits(0x20, 0x0F,
819 ucontrol->value.integer.value[0] & 0x0f,
820 i2c_clt[2]);
821 return 0;
822 }
823
824 static int
es7243e_micboost5_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)825 es7243e_micboost5_setting_get(struct snd_kcontrol *kcontrol,
826 struct snd_ctl_elem_value *ucontrol)
827 {
828 u8 val = 0;
829 es7243e_read(0x20, &val, i2c_clt[2]);
830 ucontrol->value.integer.value[0] = val & 0x0f;
831 return 0;
832 }
833
834 static int
es7243e_micboost6_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)835 es7243e_micboost6_setting_set(struct snd_kcontrol *kcontrol,
836 struct snd_ctl_elem_value *ucontrol)
837 {
838 es7243e_update_bits(0x21, 0x0F,
839 ucontrol->value.integer.value[0] & 0x0f,
840 i2c_clt[2]);
841 return 0;
842 }
843
844 static int
es7243e_micboost6_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)845 es7243e_micboost6_setting_get(struct snd_kcontrol *kcontrol,
846 struct snd_ctl_elem_value *ucontrol)
847 {
848 u8 val = 0;
849 es7243e_read(0x21, &val, i2c_clt[2]);
850 ucontrol->value.integer.value[0] = val & 0x0f;
851 return 0;
852 }
853
854 static int
es7243e_adc5_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)855 es7243e_adc5_mute_set(struct snd_kcontrol *kcontrol,
856 struct snd_ctl_elem_value *ucontrol)
857 {
858 es7243e_update_bits(0x0B, 0x40,
859 (ucontrol->value.integer.value[0] & 0x01) << 6,
860 i2c_clt[2]);
861 return 0;
862 }
863
864 static int
es7243e_adc5_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)865 es7243e_adc5_mute_get(struct snd_kcontrol *kcontrol,
866 struct snd_ctl_elem_value *ucontrol)
867 {
868 u8 val = 0;
869 es7243e_read(0x0B, &val, i2c_clt[2]);
870 ucontrol->value.integer.value[0] = (val & 0x40) >> 6;
871 return 0;
872 }
873
874 static int
es7243e_adc6_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)875 es7243e_adc6_mute_set(struct snd_kcontrol *kcontrol,
876 struct snd_ctl_elem_value *ucontrol)
877 {
878 es7243e_update_bits(0x0B, 0x80,
879 (ucontrol->value.integer.value[0] & 0x01) << 7,
880 i2c_clt[2]);
881 return 0;
882 }
883
884 static int
es7243e_adc6_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)885 es7243e_adc6_mute_get(struct snd_kcontrol *kcontrol,
886 struct snd_ctl_elem_value *ucontrol)
887 {
888 u8 val = 0;
889 es7243e_read(0x0B, &val, i2c_clt[2]);
890 ucontrol->value.integer.value[0] = (val & 0x80) >> 7;
891 return 0;
892 }
893
894 static int
es7243e_adc5adc6_suspend_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)895 es7243e_adc5adc6_suspend_get(struct snd_kcontrol *kcontrol,
896 struct snd_ctl_elem_value *ucontrol)
897 {
898 u8 val = 0;
899 es7243e_read(0x17, &val, i2c_clt[2]);
900 ucontrol->value.integer.value[0] = (val & 0x02) >> 1;
901 return 0;
902 }
903
904 static int
es7243e_adc5adc6_suspend_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)905 es7243e_adc5adc6_suspend_set(struct snd_kcontrol *kcontrol,
906 struct snd_ctl_elem_value *ucontrol)
907 {
908 //u8 val;
909 if ((ucontrol->value.integer.value[0] & 0x01) == 1) { //suspend
910 es7243e_write(0x04, 0x02, i2c_clt[2]);
911 es7243e_write(0x04, 0x01, i2c_clt[2]);
912 es7243e_write(0xf7, 0x30, i2c_clt[2]);
913 es7243e_write(0xf9, 0x01, i2c_clt[2]);
914 es7243e_write(0x16, 0xff, i2c_clt[2]);
915 es7243e_write(0x17, 0x00, i2c_clt[2]);
916 es7243e_write(0x01, 0x38, i2c_clt[2]);
917 es7243e_update_bits(0x20, 0x10, 0x00, i2c_clt[2]);
918 es7243e_update_bits(0x21, 0x10, 0x00, i2c_clt[2]);
919 es7243e_write(0x00, 0x8e, i2c_clt[2]);
920 es7243e_write(0x01, 0x30, i2c_clt[2]);
921 } else { //resume
922 es7243e_write(0x01, 0x3a, i2c_clt[2]);
923 es7243e_write(0x00, 0x80, i2c_clt[2]);
924 es7243e_update_bits(0x20, 0x10, 0x10, i2c_clt[2]);
925 es7243e_update_bits(0x21, 0x10, 0x10, i2c_clt[2]);
926 es7243e_write(0x16, 0x00, i2c_clt[2]);
927 es7243e_write(0x17, 0x02, i2c_clt[2]);
928 }
929 return 0;
930 }
931 #endif
932 #if ES7243E_CHANNELS_MAX > 6
933 static int
es7243e_micboost7_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)934 es7243e_micboost7_setting_set(struct snd_kcontrol *kcontrol,
935 struct snd_ctl_elem_value *ucontrol)
936 {
937 es7243e_update_bits(0x20, 0x0F,
938 ucontrol->value.integer.value[0] & 0x0f,
939 i2c_clt[3]);
940 return 0;
941 }
942
943 static int
es7243e_micboost7_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)944 es7243e_micboost7_setting_get(struct snd_kcontrol *kcontrol,
945 struct snd_ctl_elem_value *ucontrol)
946 {
947 u8 val = 0;
948 es7243e_read(0x20, &val, i2c_clt[3]);
949 ucontrol->value.integer.value[0] = val & 0x0f;
950 return 0;
951 }
952
953 static int
es7243e_micboost8_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)954 es7243e_micboost8_setting_set(struct snd_kcontrol *kcontrol,
955 struct snd_ctl_elem_value *ucontrol)
956 {
957 es7243e_update_bits(0x21, 0x0F,
958 ucontrol->value.integer.value[0] & 0x0f,
959 i2c_clt[3]);
960 return 0;
961 }
962
963 static int
es7243e_micboost8_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)964 es7243e_micboost8_setting_get(struct snd_kcontrol *kcontrol,
965 struct snd_ctl_elem_value *ucontrol)
966 {
967 u8 val = 0;
968 es7243e_read(0x21, &val, i2c_clt[3]);
969 ucontrol->value.integer.value[0] = val & 0x0f;
970 return 0;
971 }
972
973 static int
es7243e_adc7_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)974 es7243e_adc7_mute_set(struct snd_kcontrol *kcontrol,
975 struct snd_ctl_elem_value *ucontrol)
976 {
977 es7243e_update_bits(0x0B, 0x40,
978 (ucontrol->value.integer.value[0] & 0x01) << 6,
979 i2c_clt[3]);
980 return 0;
981 }
982
983 static int
es7243e_adc7_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)984 es7243e_adc7_mute_get(struct snd_kcontrol *kcontrol,
985 struct snd_ctl_elem_value *ucontrol)
986 {
987 u8 val = 0;
988 es7243e_read(0x0B, &val, i2c_clt[3]);
989 ucontrol->value.integer.value[0] = (val & 0x40) >> 6;
990 return 0;
991 }
992
993 static int
es7243e_adc8_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)994 es7243e_adc8_mute_set(struct snd_kcontrol *kcontrol,
995 struct snd_ctl_elem_value *ucontrol)
996 {
997 es7243e_update_bits(0x0B, 0x80,
998 (ucontrol->value.integer.value[0] & 0x01) << 7,
999 i2c_clt[3]);
1000 return 0;
1001 }
1002
1003 static int
es7243e_adc8_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1004 es7243e_adc8_mute_get(struct snd_kcontrol *kcontrol,
1005 struct snd_ctl_elem_value *ucontrol)
1006 {
1007 u8 val = 0;
1008 es7243e_read(0x0B, &val, i2c_clt[3]);
1009 ucontrol->value.integer.value[0] = (val & 0x80) >> 7;
1010 return 0;
1011 }
1012
1013 static int
es7243e_adc7adc8_suspend_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1014 es7243e_adc7adc8_suspend_get(struct snd_kcontrol *kcontrol,
1015 struct snd_ctl_elem_value *ucontrol)
1016 {
1017 u8 val = 0;
1018 es7243e_read(0x17, &val, i2c_clt[3]);
1019 ucontrol->value.integer.value[0] = (val & 0x02) >> 2;
1020 return 0;
1021 }
1022
1023 static int
es7243e_adc7adc8_suspend_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1024 es7243e_adc7adc8_suspend_set(struct snd_kcontrol *kcontrol,
1025 struct snd_ctl_elem_value *ucontrol)
1026 {
1027 // u8 val;
1028 if ((ucontrol->value.integer.value[0] & 0x01) == 1) { //suspend
1029 es7243e_write(0x04, 0x02, i2c_clt[3]);
1030 es7243e_write(0x04, 0x01, i2c_clt[3]);
1031 es7243e_write(0xf7, 0x30, i2c_clt[3]);
1032 es7243e_write(0xf9, 0x01, i2c_clt[3]);
1033 es7243e_write(0x16, 0xff, i2c_clt[3]);
1034 es7243e_write(0x17, 0x00, i2c_clt[3]);
1035 es7243e_write(0x01, 0x38, i2c_clt[3]);
1036 es7243e_update_bits(0x20, 0x10, 0x00, i2c_clt[3]);
1037 es7243e_update_bits(0x21, 0x10, 0x00, i2c_clt[3]);
1038 es7243e_write(0x00, 0x8e, i2c_clt[3]);
1039 es7243e_write(0x01, 0x30, i2c_clt[3]);
1040 } else { //resume
1041 es7243e_write(0x01, 0x3a, i2c_clt[3]);
1042 es7243e_write(0x00, 0x80, i2c_clt[3]);
1043 es7243e_update_bits(0x20, 0x10, 0x10, i2c_clt[3]);
1044 es7243e_update_bits(0x21, 0x10, 0x10, i2c_clt[3]);
1045 es7243e_write(0x16, 0x00, i2c_clt[3]);
1046 es7243e_write(0x17, 0x02, i2c_clt[3]);
1047 }
1048 return 0;
1049 }
1050 #endif
1051 #if ES7243E_CHANNELS_MAX > 8
1052 static int
es7243e_micboost9_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1053 es7243e_micboost9_setting_set(struct snd_kcontrol *kcontrol,
1054 struct snd_ctl_elem_value *ucontrol)
1055 {
1056 es7243e_update_bits(0x20, 0x0F,
1057 ucontrol->value.integer.value[0] & 0x0f,
1058 i2c_clt[4]);
1059 return 0;
1060 }
1061
1062 static int
es7243e_micboost9_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1063 es7243e_micboost9_setting_get(struct snd_kcontrol *kcontrol,
1064 struct snd_ctl_elem_value *ucontrol)
1065 {
1066 u8 val = 0;
1067 es7243e_read(0x20, &val, i2c_clt[4]);
1068 ucontrol->value.integer.value[0] = val & 0x0f;
1069 return 0;
1070 }
1071
1072 static int
es7243e_micboost10_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1073 es7243e_micboost10_setting_set(struct snd_kcontrol *kcontrol,
1074 struct snd_ctl_elem_value *ucontrol)
1075 {
1076 es7243e_update_bits(0x21, 0x0F,
1077 ucontrol->value.integer.value[0] & 0x0f,
1078 i2c_clt[4]);
1079 return 0;
1080 }
1081
1082 static int
es7243e_micboost10_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1083 es7243e_micboost10_setting_get(struct snd_kcontrol *kcontrol,
1084 struct snd_ctl_elem_value *ucontrol)
1085 {
1086 u8 val = 0;
1087 es7243e_read(0x21, &val, i2c_clt[4]);
1088 ucontrol->value.integer.value[0] = val & 0x0f;
1089 return 0;
1090 }
1091
1092 static int
es7243e_adc9_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1093 es7243e_adc9_mute_set(struct snd_kcontrol *kcontrol,
1094 struct snd_ctl_elem_value *ucontrol)
1095 {
1096 es7243e_update_bits(0x0B, 0x40,
1097 (ucontrol->value.integer.value[0] & 0x01) << 6,
1098 i2c_clt[4]);
1099 return 0;
1100 }
1101
1102 static int
es7243e_adc9_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1103 es7243e_adc9_mute_get(struct snd_kcontrol *kcontrol,
1104 struct snd_ctl_elem_value *ucontrol)
1105 {
1106 u8 val = 0;
1107 es7243e_read(0x0B, &val, i2c_clt[4]);
1108 ucontrol->value.integer.value[0] = (val & 0x40) >> 6;
1109 return 0;
1110 }
1111
1112 static int
es7243e_adc10_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1113 es7243e_adc10_mute_set(struct snd_kcontrol *kcontrol,
1114 struct snd_ctl_elem_value *ucontrol)
1115 {
1116 es7243e_update_bits(0x0B, 0x80,
1117 (ucontrol->value.integer.value[0] & 0x01) << 7,
1118 i2c_clt[4]);
1119 return 0;
1120 }
1121
1122 static int
es7243e_adc10_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1123 es7243e_adc10_mute_get(struct snd_kcontrol *kcontrol,
1124 struct snd_ctl_elem_value *ucontrol)
1125 {
1126 u8 val = 0;
1127 es7243e_read(0x0B, &val, i2c_clt[4]);
1128 ucontrol->value.integer.value[0] = (val & 0x80) >> 7;
1129 return 0;
1130 }
1131
1132 static int
es7243e_adc9adc10_suspend_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1133 es7243e_adc9adc10_suspend_get(struct snd_kcontrol *kcontrol,
1134 struct snd_ctl_elem_value *ucontrol)
1135 {
1136 u8 val = 0;
1137 es7243e_read(0x17, &val, i2c_clt[4]);
1138 ucontrol->value.integer.value[0] = (val & 0x02) >> 2;
1139 return 0;
1140 }
1141
1142 static int
es7243e_adc9adc10_suspend_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1143 es7243e_adc9adc10_suspend_set(struct snd_kcontrol *kcontrol,
1144 struct snd_ctl_elem_value *ucontrol)
1145 {
1146 // u8 val;
1147 if ((ucontrol->value.integer.value[0] & 0x01) == 1) { //suspend
1148 es7243e_write(0x04, 0x02, i2c_clt[4]);
1149 es7243e_write(0x04, 0x01, i2c_clt[4]);
1150 es7243e_write(0xf7, 0x30, i2c_clt[4]);
1151 es7243e_write(0xf9, 0x01, i2c_clt[4]);
1152 es7243e_write(0x16, 0xff, i2c_clt[4]);
1153 es7243e_write(0x17, 0x00, i2c_clt[4]);
1154 es7243e_write(0x01, 0x38, i2c_clt[4]);
1155 es7243e_update_bits(0x20, 0x10, 0x00, i2c_clt[4]);
1156 es7243e_update_bits(0x21, 0x10, 0x00, i2c_clt[4]);
1157 es7243e_write(0x00, 0x8e, i2c_clt[4]);
1158 es7243e_write(0x01, 0x30, i2c_clt[4]);
1159 } else { //resume
1160 es7243e_write(0x01, 0x3a, i2c_clt[4]);
1161 es7243e_write(0x00, 0x80, i2c_clt[4]);
1162 es7243e_update_bits(0x20, 0x10, 0x10, i2c_clt[4]);
1163 es7243e_update_bits(0x21, 0x10, 0x10, i2c_clt[4]);
1164 es7243e_write(0x16, 0x00, i2c_clt[4]);
1165 es7243e_write(0x17, 0x02, i2c_clt[4]);
1166 }
1167 return 0;
1168 }
1169 #endif
1170 #if ES7243E_CHANNELS_MAX > 10
1171 static int
es7243e_micboost11_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1172 es7243e_micboost11_setting_set(struct snd_kcontrol *kcontrol,
1173 struct snd_ctl_elem_value *ucontrol)
1174 {
1175 es7243e_update_bits(0x20, 0x0F,
1176 ucontrol->value.integer.value[0] & 0x0f,
1177 i2c_clt[5]);
1178 return 0;
1179 }
1180
1181 static int
es7243e_micboost11_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1182 es7243e_micboost11_setting_get(struct snd_kcontrol *kcontrol,
1183 struct snd_ctl_elem_value *ucontrol)
1184 {
1185 u8 val = 0;
1186 es7243e_read(0x20, &val, i2c_clt[5]);
1187 ucontrol->value.integer.value[0] = val & 0x0f;
1188 return 0;
1189 }
1190
1191 static int
es7243e_micboost12_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1192 es7243e_micboost12_setting_set(struct snd_kcontrol *kcontrol,
1193 struct snd_ctl_elem_value *ucontrol)
1194 {
1195 es7243e_update_bits(0x21, 0x0F,
1196 ucontrol->value.integer.value[0] & 0x0f,
1197 i2c_clt[5]);
1198 return 0;
1199 }
1200
1201 static int
es7243e_micboost12_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1202 es7243e_micboost12_setting_get(struct snd_kcontrol *kcontrol,
1203 struct snd_ctl_elem_value *ucontrol)
1204 {
1205 u8 val = 0;
1206 es7243e_read(0x21, &val, i2c_clt[5]);
1207 ucontrol->value.integer.value[0] = val & 0x0f;
1208 return 0;
1209 }
1210
1211 static int
es7243e_adc11_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1212 es7243e_adc11_mute_set(struct snd_kcontrol *kcontrol,
1213 struct snd_ctl_elem_value *ucontrol)
1214 {
1215 es7243e_update_bits(0x0B, 0x40,
1216 (ucontrol->value.integer.value[0] & 0x01) << 6,
1217 i2c_clt[5]);
1218 return 0;
1219 }
1220
1221 static int
es7243e_adc11_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1222 es7243e_adc11_mute_get(struct snd_kcontrol *kcontrol,
1223 struct snd_ctl_elem_value *ucontrol)
1224 {
1225 u8 val = 0;
1226 es7243e_read(0x0B, &val, i2c_clt[5]);
1227 ucontrol->value.integer.value[0] = (val & 0x40) >> 6;
1228 return 0;
1229 }
1230
1231 static int
es7243e_adc12_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1232 es7243e_adc12_mute_set(struct snd_kcontrol *kcontrol,
1233 struct snd_ctl_elem_value *ucontrol)
1234 {
1235 es7243e_update_bits(0x0B, 0x80,
1236 (ucontrol->value.integer.value[0] & 0x01) << 7,
1237 i2c_clt[5]);
1238 return 0;
1239 }
1240
1241 static int
es7243e_adc12_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1242 es7243e_adc12_mute_get(struct snd_kcontrol *kcontrol,
1243 struct snd_ctl_elem_value *ucontrol)
1244 {
1245 u8 val = 0;
1246 es7243e_read(0x0B, &val, i2c_clt[5]);
1247 ucontrol->value.integer.value[0] = (val & 0x80) >> 7;
1248 return 0;
1249 }
1250
1251 static int
es7243e_adc11adc12_suspend_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1252 es7243e_adc11adc12_suspend_get(struct snd_kcontrol *kcontrol,
1253 struct snd_ctl_elem_value *ucontrol)
1254 {
1255 u8 val = 0;
1256 es7243e_read(0x17, &val, i2c_clt[5]);
1257 ucontrol->value.integer.value[0] = (val & 0x02) >> 2;
1258 return 0;
1259 }
1260
1261 static int
es7243e_adc11adc12_suspend_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1262 es7243e_adc11adc12_suspend_set(struct snd_kcontrol *kcontrol,
1263 struct snd_ctl_elem_value *ucontrol)
1264 {
1265 // u8 val;
1266 if ((ucontrol->value.integer.value[0] & 0x01) == 1) { //suspend
1267 es7243e_write(0x04, 0x02, i2c_clt[5]);
1268 es7243e_write(0x04, 0x01, i2c_clt[5]);
1269 es7243e_write(0xf7, 0x30, i2c_clt[5]);
1270 es7243e_write(0xf9, 0x01, i2c_clt[5]);
1271 es7243e_write(0x16, 0xff, i2c_clt[5]);
1272 es7243e_write(0x17, 0x00, i2c_clt[5]);
1273 es7243e_write(0x01, 0x38, i2c_clt[5]);
1274 es7243e_update_bits(0x20, 0x10, 0x00, i2c_clt[5]);
1275 es7243e_update_bits(0x21, 0x10, 0x00, i2c_clt[5]);
1276 es7243e_write(0x00, 0x8e, i2c_clt[5]);
1277 es7243e_write(0x01, 0x30, i2c_clt[5]);
1278 } else { //resume
1279 es7243e_write(0x01, 0x3a, i2c_clt[5]);
1280 es7243e_write(0x00, 0x80, i2c_clt[5]);
1281 es7243e_update_bits(0x20, 0x10, 0x10, i2c_clt[5]);
1282 es7243e_update_bits(0x21, 0x10, 0x10, i2c_clt[5]);
1283 es7243e_write(0x16, 0x00, i2c_clt[5]);
1284 es7243e_write(0x17, 0x02, i2c_clt[5]);
1285 }
1286 return 0;
1287 }
1288 #endif
1289 #if ES7243E_CHANNELS_MAX > 12
1290 static int
es7243e_micboost13_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1291 es7243e_micboost13_setting_set(struct snd_kcontrol *kcontrol,
1292 struct snd_ctl_elem_value *ucontrol)
1293 {
1294 es7243e_update_bits(0x20, 0x0F,
1295 ucontrol->value.integer.value[0] & 0x0f,
1296 i2c_clt[6]);
1297 return 0;
1298 }
1299
1300 static int
es7243e_micboost13_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1301 es7243e_micboost13_setting_get(struct snd_kcontrol *kcontrol,
1302 struct snd_ctl_elem_value *ucontrol)
1303 {
1304 u8 val = 0;
1305 es7243e_read(0x20, &val, i2c_clt[6]);
1306 ucontrol->value.integer.value[0] = val & 0x0f;
1307 return 0;
1308 }
1309
1310 static int
es7243e_micboost14_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1311 es7243e_micboost14_setting_set(struct snd_kcontrol *kcontrol,
1312 struct snd_ctl_elem_value *ucontrol)
1313 {
1314 es7243e_update_bits(0x21, 0x0F,
1315 ucontrol->value.integer.value[0] & 0x0f,
1316 i2c_clt[6]);
1317 return 0;
1318 }
1319
1320 static int
es7243e_micboost14_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1321 es7243e_micboost14_setting_get(struct snd_kcontrol *kcontrol,
1322 struct snd_ctl_elem_value *ucontrol)
1323 {
1324 u8 val = 0;
1325 es7243e_read(0x21, &val, i2c_clt[6]);
1326 ucontrol->value.integer.value[0] = val & 0x0f;
1327 return 0;
1328 }
1329
1330 static int
es7243e_adc13_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1331 es7243e_adc13_mute_set(struct snd_kcontrol *kcontrol,
1332 struct snd_ctl_elem_value *ucontrol)
1333 {
1334 es7243e_update_bits(0x0B, 0x40,
1335 (ucontrol->value.integer.value[0] & 0x01) << 6,
1336 i2c_clt[6]);
1337 return 0;
1338 }
1339
1340 static int
es7243e_adc13_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1341 es7243e_adc13_mute_get(struct snd_kcontrol *kcontrol,
1342 struct snd_ctl_elem_value *ucontrol)
1343 {
1344 u8 val = 0;
1345 es7243e_read(0x0B, &val, i2c_clt[6]);
1346 ucontrol->value.integer.value[0] = (val & 0x40) >> 6;
1347 return 0;
1348 }
1349
1350 static int
es7243e_adc14_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1351 es7243e_adc14_mute_set(struct snd_kcontrol *kcontrol,
1352 struct snd_ctl_elem_value *ucontrol)
1353 {
1354 es7243e_update_bits(0x0B, 0x80,
1355 (ucontrol->value.integer.value[0] & 0x01) << 7,
1356 i2c_clt[6]);
1357 return 0;
1358 }
1359
1360 static int
es7243e_adc14_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1361 es7243e_adc14_mute_get(struct snd_kcontrol *kcontrol,
1362 struct snd_ctl_elem_value *ucontrol)
1363 {
1364 u8 val = 0;
1365 es7243e_read(0x0B, &val, i2c_clt[6]);
1366 ucontrol->value.integer.value[0] = (val & 0x80) >> 7;
1367 return 0;
1368 }
1369
1370 static int
es7243e_adc13adc14_suspend_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1371 es7243e_adc13adc14_suspend_get(struct snd_kcontrol *kcontrol,
1372 struct snd_ctl_elem_value *ucontrol)
1373 {
1374 u8 val = 0;
1375 es7243e_read(0x17, &val, i2c_clt[6]);
1376 ucontrol->value.integer.value[0] = (val & 0x02) >> 2;
1377 return 0;
1378 }
1379
1380 static int
es7243e_adc13adc14_suspend_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1381 es7243e_adc13adc14_suspend_set(struct snd_kcontrol *kcontrol,
1382 struct snd_ctl_elem_value *ucontrol)
1383 {
1384 // u8 val;
1385 if ((ucontrol->value.integer.value[0] & 0x01) == 1) { //suspend
1386 es7243e_write(0x04, 0x02, i2c_clt[6]);
1387 es7243e_write(0x04, 0x01, i2c_clt[6]);
1388 es7243e_write(0xf7, 0x30, i2c_clt[6]);
1389 es7243e_write(0xf9, 0x01, i2c_clt[6]);
1390 es7243e_write(0x16, 0xff, i2c_clt[6]);
1391 es7243e_write(0x17, 0x00, i2c_clt[6]);
1392 es7243e_write(0x01, 0x38, i2c_clt[6]);
1393 es7243e_update_bits(0x20, 0x10, 0x00, i2c_clt[6]);
1394 es7243e_update_bits(0x21, 0x10, 0x00, i2c_clt[6]);
1395 es7243e_write(0x00, 0x8e, i2c_clt[6]);
1396 es7243e_write(0x01, 0x30, i2c_clt[6]);
1397 } else { //resume
1398 es7243e_write(0x01, 0x3a, i2c_clt[6]);
1399 es7243e_write(0x00, 0x80, i2c_clt[6]);
1400 es7243e_update_bits(0x20, 0x10, 0x10, i2c_clt[6]);
1401 es7243e_update_bits(0x21, 0x10, 0x10, i2c_clt[6]);
1402 es7243e_write(0x16, 0x00, i2c_clt[6]);
1403 es7243e_write(0x17, 0x02, i2c_clt[6]);
1404 }
1405 return 0;
1406 }
1407 #endif
1408 #if ES7243E_CHANNELS_MAX > 14
1409 static int
es7243e_micboost15_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1410 es7243e_micboost15_setting_set(struct snd_kcontrol *kcontrol,
1411 struct snd_ctl_elem_value *ucontrol)
1412 {
1413 es7243e_update_bits(0x20, 0x0F,
1414 ucontrol->value.integer.value[0] & 0x0f,
1415 i2c_clt[7]);
1416 return 0;
1417 }
1418
1419 static int
es7243e_micboost15_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1420 es7243e_micboost15_setting_get(struct snd_kcontrol *kcontrol,
1421 struct snd_ctl_elem_value *ucontrol)
1422 {
1423 u8 val = 0;
1424 es7243e_read(0x20, &val, i2c_clt[7]);
1425 ucontrol->value.integer.value[0] = val & 0x0f;
1426 return 0;
1427 }
1428
1429 static int
es7243e_micboost16_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1430 es7243e_micboost16_setting_set(struct snd_kcontrol *kcontrol,
1431 struct snd_ctl_elem_value *ucontrol)
1432 {
1433 es7243e_update_bits(0x21, 0x0F,
1434 ucontrol->value.integer.value[0] & 0x0f,
1435 i2c_clt[7]);
1436 return 0;
1437 }
1438
1439 static int
es7243e_micboost16_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1440 es7243e_micboost16_setting_get(struct snd_kcontrol *kcontrol,
1441 struct snd_ctl_elem_value *ucontrol)
1442 {
1443 u8 val = 0;
1444 es7243e_read(0x21, &val, i2c_clt[7]);
1445 ucontrol->value.integer.value[0] = val & 0x0f;
1446 return 0;
1447 }
1448
1449 static int
es7243e_adc15_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1450 es7243e_adc15_mute_set(struct snd_kcontrol *kcontrol,
1451 struct snd_ctl_elem_value *ucontrol)
1452 {
1453 es7243e_update_bits(0x0B, 0x40,
1454 (ucontrol->value.integer.value[0] & 0x01) << 6,
1455 i2c_clt[7]);
1456 return 0;
1457 }
1458
1459 static int
es7243e_adc15_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1460 es7243e_adc15_mute_get(struct snd_kcontrol *kcontrol,
1461 struct snd_ctl_elem_value *ucontrol)
1462 {
1463 u8 val = 0;
1464 es7243e_read(0x0B, &val, i2c_clt[7]);
1465 ucontrol->value.integer.value[0] = (val 0x40) >> 6;
1466 return 0;
1467 }
1468
1469 static int
es7243e_adc16_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1470 es7243e_adc16_mute_set(struct snd_kcontrol *kcontrol,
1471 struct snd_ctl_elem_value *ucontrol)
1472 {
1473 es7243e_update_bits(0x0B, 0x80,
1474 (ucontrol->value.integer.value[0] & 0x01) << 7,
1475 i2c_clt[7]);
1476 return 0;
1477 }
1478
1479 static int
es7243e_adc16_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1480 es7243e_adc16_mute_get(struct snd_kcontrol *kcontrol,
1481 struct snd_ctl_elem_value *ucontrol)
1482 {
1483 u8 val = 0;
1484 es7243e_read(0x0B, &val, i2c_clt[7]);
1485 ucontrol->value.integer.value[0] = (val & 0x80) >> 7;
1486 return 0;
1487 }
1488
1489 static int
es7243e_adc15adc16_suspend_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1490 es7243e_adc15adc16_suspend_get(struct snd_kcontrol *kcontrol,
1491 struct snd_ctl_elem_value *ucontrol)
1492 {
1493 u8 val = 0;
1494 es7243e_read(0x17, &val, i2c_clt[7]);
1495 ucontrol->value.integer.value[0] = (val & 0x02) >> 2;
1496 return 0;
1497 }
1498
1499 static int
es7243e_adc15adc16_suspend_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1500 es7243e_adc15adc16_suspend_set(struct snd_kcontrol *kcontrol,
1501 struct snd_ctl_elem_value *ucontrol)
1502 {
1503 // u8 val;
1504 if ((ucontrol->value.integer.value[0] & 0x01) == 1) { //suspend
1505 es7243e_write(0x04, 0x02, i2c_clt[7]);
1506 es7243e_write(0x04, 0x01, i2c_clt[7]);
1507 es7243e_write(0xf7, 0x30, i2c_clt[7]);
1508 es7243e_write(0xf9, 0x01, i2c_clt[7]);
1509 es7243e_write(0x16, 0xff, i2c_clt[7]);
1510 es7243e_write(0x17, 0x00, i2c_clt[7]);
1511 es7243e_write(0x01, 0x38, i2c_clt[7]);
1512 es7243e_update_bits(0x20, 0x10, 0x00, i2c_clt[7]);
1513 es7243e_update_bits(0x21, 0x10, 0x00, i2c_clt[7]);
1514 es7243e_write(0x00, 0x8e, i2c_clt[7]);
1515 es7243e_write(0x01, 0x30, i2c_clt[7]);
1516 } else { //resume
1517 es7243e_write(0x01, 0x3a, i2c_clt[7]);
1518 es7243e_write(0x00, 0x80, i2c_clt[7]);
1519 es7243e_update_bits(0x20, 0x10, 0x10, i2c_clt[7]);
1520 es7243e_update_bits(0x21, 0x10, 0x10, i2c_clt[7]);
1521 es7243e_write(0x16, 0x00, i2c_clt[7]);
1522 es7243e_write(0x17, 0x02, i2c_clt[7]);
1523 }
1524 return 0;
1525 }
1526 #endif
1527 static const struct snd_kcontrol_new es7243e_snd_controls[] = {
1528 #if ES7243E_CHANNELS_MAX > 0
1529 SOC_SINGLE_EXT_TLV("PGA1_setting", 0x20, 0, 0x0F, 0,
1530 es7243e_micboost1_setting_get,
1531 es7243e_micboost1_setting_set,
1532 mic_boost_tlv),
1533 SOC_SINGLE_EXT_TLV("PGA2_setting", 0x21, 0, 0x0F, 0,
1534 es7243e_micboost2_setting_get,
1535 es7243e_micboost2_setting_set,
1536 mic_boost_tlv),
1537 SOC_SINGLE_EXT("ADC1_MUTE", 0x0B, 1, 0x40, 0,
1538 es7243e_adc1_mute_get, es7243e_adc1_mute_set),
1539 SOC_SINGLE_EXT("ADC2_MUTE", 0x0B, 1, 0x80, 0,
1540 es7243e_adc2_mute_get, es7243e_adc2_mute_set),
1541 SOC_SINGLE_EXT("ADC1ADC2_SUSPEND", 0x17, 1, 1, 0,
1542 es7243e_adc1adc2_suspend_get,
1543 es7243e_adc1adc2_suspend_set),
1544 #endif
1545 #if ES7243E_CHANNELS_MAX > 2
1546 SOC_SINGLE_EXT_TLV("PGA3_setting", 0x20, 0, 0x0F, 0,
1547 es7243e_micboost3_setting_get,
1548 es7243e_micboost3_setting_set,
1549 mic_boost_tlv),
1550 SOC_SINGLE_EXT_TLV("PGA4_setting", 0x21, 0, 0x0F, 0,
1551 es7243e_micboost4_setting_get,
1552 es7243e_micboost4_setting_set,
1553 mic_boost_tlv),
1554 SOC_SINGLE_EXT("ADC3_MUTE", 0x0B, 1, 0x40, 0,
1555 es7243e_adc3_mute_get, es7243e_adc3_mute_set),
1556 SOC_SINGLE_EXT("ADC4_MUTE", 0x0B, 1, 0x80, 0,
1557 es7243e_adc4_mute_get,
1558 es7243e_adc4_mute_set),
1559 SOC_SINGLE_EXT("ADC3ADC4_SUSPEND", 0x17, 1, 1, 0,
1560 es7243e_adc3adc4_suspend_get,
1561 es7243e_adc3adc4_suspend_set),
1562 #endif
1563 #if ES7243E_CHANNELS_MAX > 4
1564 SOC_SINGLE_EXT_TLV("PGA5_setting", 0x20, 0, 0x0F, 0,
1565 es7243e_micboost5_setting_get,
1566 es7243e_micboost5_setting_set,
1567 mic_boost_tlv),
1568 SOC_SINGLE_EXT_TLV("PGA6_setting", 0x21, 0, 0x0F, 0,
1569 es7243e_micboost6_setting_get,
1570 es7243e_micboost6_setting_set,
1571 mic_boost_tlv),
1572 SOC_SINGLE_EXT("ADC5_MUTE", 0x0B, 1, 0x40, 0,
1573 es7243e_adc5_mute_get, es7243e_adc5_mute_set),
1574 SOC_SINGLE_EXT("ADC6_MUTE", 0x0B, 1, 0x80, 0,
1575 es7243e_adc6_mute_get, es7243e_adc6_mute_set),
1576 SOC_SINGLE_EXT("ADC5ADC6_SUSPEND", 0x17, 1, 1, 0,
1577 es7243e_adc5adc6_suspend_get,
1578 es7243e_adc5adc6_suspend_set),
1579 #endif
1580 #if ES7243E_CHANNELS_MAX > 6
1581 SOC_SINGLE_EXT_TLV("PGA7_setting", 0x20, 0, 0x0F, 0,
1582 es7243e_micboost7_setting_get,
1583 es7243e_micboost7_setting_set,
1584 mic_boost_tlv),
1585 SOC_SINGLE_EXT_TLV("PGA8_setting", 0x21, 0, 0x0F, 0,
1586 es7243e_micboost8_setting_get,
1587 es7243e_micboost8_setting_set,
1588 mic_boost_tlv),
1589 SOC_SINGLE_EXT("ADC7_MUTE", 0x0B, 1, 0x40, 0,
1590 es7243e_adc7_mute_get, es7243e_adc7_mute_set),
1591 SOC_SINGLE_EXT("ADC8_MUTE", 0x0B, 1, 0x80, 0,
1592 es7243e_adc8_mute_get, es7243e_adc8_mute_set),
1593 SOC_SINGLE_EXT("ADC7ADC8_SUSPEND", 0x17, 1, 1, 0,
1594 es7243e_adc7adc8_suspend_get,
1595 es7243e_adc7adc8_suspend_set),
1596 #endif
1597 #if ES7243E_CHANNELS_MAX > 8
1598 SOC_SINGLE_EXT_TLV("PGA9_setting", 0x20, 0, 0x0F, 0,
1599 es7243e_micboost9_setting_get,
1600 es7243e_micboost9_setting_set,
1601 mic_boost_tlv),
1602 SOC_SINGLE_EXT_TLV("PGA10_setting", 0x21, 0, 0x0F, 0,
1603 es7243e_micboost10_setting_get,
1604 es7243e_micboost10_setting_set,
1605 mic_boost_tlv),
1606 SOC_SINGLE_EXT("ADC9_MUTE", 0x0B, 1, 0x40, 0,
1607 es7243e_adc9_mute_get, es7243e_adc9_mute_set),
1608 SOC_SINGLE_EXT("ADC10_MUTE", 0x0B, 1, 0x80, 0,
1609 es7243e_adc10_mute_get, es7243e_adc10_mute_set),
1610 SOC_SINGLE_EXT("ADC9ADC10_SUSPEND", 0x17, 1, 1, 0,
1611 es7243e_adc9adc10_suspend_get,
1612 es7243e_adc9adc10_suspend_set),
1613 #endif
1614 #if ES7243E_CHANNELS_MAX > 10
1615 SOC_SINGLE_EXT_TLV("PGA11_setting", 0x20, 0, 0x0F, 0,
1616 es7243e_micboost11_setting_get,
1617 es7243e_micboost11_setting_set,
1618 mic_boost_tlv),
1619 SOC_SINGLE_EXT_TLV("PGA12_setting", 0x21, 0, 0x0F, 0,
1620 es7243e_micboost12_setting_get,
1621 es7243e_micboost12_setting_set,
1622 mic_boost_tlv),
1623 SOC_SINGLE_EXT("ADC11_MUTE", 0x0B, 1, 0x40, 0,
1624 es7243e_adc11_mute_get, es7243e_adc11_mute_set),
1625 SOC_SINGLE_EXT("ADC12_MUTE", 0x0B, 1, 0x80, 0,
1626 es7243e_adc12_mute_get, es7243e_adc12_mute_set),
1627 SOC_SINGLE_EXT("ADC11ADC12_SUSPEND", 0x17, 1, 1, 0,
1628 es7243e_adc11adc12_suspend_get,
1629 es7243e_adc11adc12_suspend_set),
1630 #endif
1631 #if ES7243E_CHANNELS_MAX > 12
1632 SOC_SINGLE_EXT_TLV("PGA13_setting", 0x20, 0, 0x0F, 0,
1633 es7243e_micboost13_setting_get,
1634 es7243e_micboost13_setting_set,
1635 mic_boost_tlv),
1636 SOC_SINGLE_EXT_TLV("PGA14_setting", 0x21, 0, 0x0F, 0,
1637 es7243e_micboost14_setting_get,
1638 es7243e_micboost14_setting_set,
1639 mic_boost_tlv),
1640 SOC_SINGLE_EXT("ADC13_MUTE", 0x0B, 1, 0x40, 0,
1641 es7243e_adc13_mute_get, es7243e_adc13_mute_set),
1642 SOC_SINGLE_EXT("ADC14_MUTE", 0x0B, 1, 0x80, 0,
1643 es7243e_adc14_mute_get, es7243e_adc14_mute_set),
1644 SOC_SINGLE_EXT("ADC13ADC14_SUSPEND", 0x17, 1, 1, 0,
1645 es7243e_adc13adc14_suspend_get,
1646 es7243e_adc13adc14_suspend_set),
1647 #endif
1648 #if ES7243E_CHANNELS_MAX > 14
1649 SOC_SINGLE_EXT_TLV("PGA15_setting", 0x20, 0, 0x0F, 0,
1650 es7243e_micboost15_setting_get,
1651 es7243e_micboost15_setting_set,
1652 mic_boost_tlv),
1653 SOC_SINGLE_EXT_TLV("PGA16_setting", 0x21, 0, 0x0F, 0,
1654 es7243e_micboost16_setting_get,
1655 es7243e_micboost16_setting_set,
1656 mic_boost_tlv),
1657 SOC_SINGLE_EXT("ADC15_MUTE", 0x0B, 1, 0x40, 0,
1658 es7243e_adc15_mute_get, es7243e_adc15_mute_set),
1659 SOC_SINGLE_EXT("ADC16_MUTE", 0x0B, 1, 0x80, 0,
1660 es7243e_adc16_mute_get, es7243e_adc16_mute_set),
1661 SOC_SINGLE_EXT("ADC15ADC16_SUSPEND", 0x17, 1, 1, 0,
1662 es7243e_adc15adc16_suspend_get,
1663 es7243e_adc15adc16_suspend_set),
1664 #endif
1665 };
1666
1667 #define es7243e_RATES SNDRV_PCM_RATE_8000_48000
1668
1669 #define es7243e_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1670 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1671
1672 static struct snd_soc_dai_ops es7243e_ops = {
1673 .startup = es7243e_pcm_startup,
1674 .hw_params = es7243e_pcm_hw_params,
1675 .set_fmt = es7243e_set_dai_fmt,
1676 .set_sysclk = es7243e_set_dai_sysclk,
1677 .mute_stream = es7243e_mute,
1678 };
1679
1680 #if ES7243E_CHANNELS_MAX > 0
1681 static struct snd_soc_dai_driver es7243e_dai0 = {
1682 .name = "ES7243E HiFi 0",
1683 .capture = {
1684 .stream_name = "Capture",
1685 .channels_min = 1,
1686 .channels_max = 8,
1687 .rates = es7243e_RATES,
1688 .formats = es7243e_FORMATS,
1689 },
1690 .ops = &es7243e_ops,
1691 .symmetric_rates = 1,
1692 };
1693 #endif
1694 #if ES7243E_CHANNELS_MAX > 2
1695 static struct snd_soc_dai_driver es7243e_dai1 = {
1696 .name = "ES7243E HiFi 1",
1697 .capture = {
1698 .stream_name = "Capture",
1699 .channels_min = 1,
1700 .channels_max = 8,
1701 .rates = es7243e_RATES,
1702 .formats = es7243e_FORMATS,
1703 },
1704 .ops = &es7243e_ops,
1705 .symmetric_rates = 1,
1706 };
1707 #endif
1708 #if ES7243E_CHANNELS_MAX > 4
1709 static struct snd_soc_dai_driver es7243e_dai2 = {
1710 .name = "ES7243E HiFi 2",
1711 .capture = {
1712 .stream_name = "Capture",
1713 .channels_min = 1,
1714 .channels_max = 8,
1715 .rates = es7243e_RATES,
1716 .formats = es7243e_FORMATS,
1717 },
1718 .ops = &es7243e_ops,
1719 .symmetric_rates = 1,
1720 };
1721 #endif
1722 #if ES7243E_CHANNELS_MAX > 6
1723 static struct snd_soc_dai_driver es7243e_dai3 = {
1724 .name = "ES7243E HiFi 3",
1725 .capture = {
1726 .stream_name = "Capture",
1727 .channels_min = 1,
1728 .channels_max = 8,
1729 .rates = es7243e_RATES,
1730 .formats = es7243e_FORMATS,
1731 },
1732 .ops = &es7243e_ops,
1733 .symmetric_rates = 1,
1734 };
1735 #endif
1736 #if ES7243E_CHANNELS_MAX > 8
1737 static struct snd_soc_dai_driver es7243e_dai5 = {
1738 .name = "ES7243E HiFi 4",
1739 .capture = {
1740 .stream_name = "Capture",
1741 .channels_min = 1,
1742 .channels_max = 2,
1743 .rates = es7243e_RATES,
1744 .formats = es7243e_FORMATS,
1745 },
1746 .ops = &es7243e_ops,
1747 .symmetric_rates = 1,
1748 };
1749 #endif
1750 #if ES7243E_CHANNELS_MAX > 10
1751 static struct snd_soc_dai_driver es7243e_dai6 = {
1752 .name = "ES7243E HiFi 5",
1753 .capture = {
1754 .stream_name = "Capture",
1755 .channels_min = 1,
1756 .channels_max = 2,
1757 .rates = es7243e_RATES,
1758 .formats = es7243e_FORMATS,
1759 },
1760 .ops = &es7243e_ops,
1761 .symmetric_rates = 1,
1762 };
1763 #endif
1764 #if ES7243E_CHANNELS_MAX > 12
1765 static struct snd_soc_dai_driver es7243e_dai7 = {
1766 .name = "ES7243E HiFi 6",
1767 .capture = {
1768 .stream_name = "Capture",
1769 .channels_min = 1,
1770 .channels_max = 2,
1771 .rates = es7243e_RATES,
1772 .formats = es7243e_FORMATS,
1773 },
1774 .ops = &es7243e_ops,
1775 .symmetric_rates = 1,
1776 };
1777 #endif
1778 #if ES7243E_CHANNELS_MAX > 14
1779 static struct snd_soc_dai_driver es7243e_dai8 = {
1780 .name = "ES7243E HiFi 7",
1781 .capture = {
1782 .stream_name = "Capture",
1783 .channels_min = 1,
1784 .channels_max = 2,
1785 .rates = es7243e_RATES,
1786 .formats = es7243e_FORMATS,
1787 },
1788 .ops = &es7243e_ops,
1789 .symmetric_rates = 1,
1790 };
1791 #endif
1792 static struct snd_soc_dai_driver *es7243e_dai[] = {
1793 #if ES7243E_CHANNELS_MAX > 0
1794 &es7243e_dai0,
1795 #endif
1796 #if ES7243E_CHANNELS_MAX > 2
1797 &es7243e_dai1,
1798 #endif
1799 #if ES7243E_CHANNELS_MAX > 4
1800 &es7243e_dai2,
1801 #endif
1802 #if ES7243E_CHANNELS_MAX > 6
1803 &es7243e_dai3,
1804 #endif
1805 #if ES7243E_CHANNELS_MAX > 8
1806 &es7243e_dai4,
1807 #endif
1808 #if ES7243E_CHANNELS_MAX > 10
1809 &es7243e_dai5,
1810 #endif
1811 #if ES7243E_CHANNELS_MAX > 12
1812 &es7243e_dai6,
1813 #endif
1814 #if ES7243E_CHANNELS_MAX > 14
1815 &es7243e_dai7,
1816 #endif
1817 };
1818
es7243e_suspend(struct snd_soc_component * component)1819 static int es7243e_suspend(struct snd_soc_component *component)
1820 {
1821 es7243e_set_bias_level(component, SND_SOC_BIAS_OFF);
1822 return 0;
1823 }
1824
es7243e_resume(struct snd_soc_component * component)1825 static int es7243e_resume(struct snd_soc_component *component)
1826 {
1827 es7243e_set_bias_level(component, SND_SOC_BIAS_STANDBY);
1828 return 0;
1829 }
1830
1831 struct _mclk_lrck_ratio {
1832 u16 ratio; //ratio between mclk and lrck
1833 u8 nfs; //nfs mode, =0, nfs mode disabled
1834 u8 osr; //adc over sample rate
1835 u8 prediv_premulti; //adcclk and dacclk divider
1836 u8 cf_dsp_div; //adclrck divider and daclrck divider
1837 u8 scale;
1838 };
1839
1840 /* codec hifi mclk clock divider coefficients */
1841 static const struct _mclk_lrck_ratio ratio_div[] = {
1842 //ratio nfs, osr, pre, div ,scale
1843 {3072, 0, 0x20, 0x50, 0x00, 0x00},
1844 {3072, 2, 0x20, 0xb0, 0x00, 0x00},
1845
1846 {2048, 0, 0x20, 0x30, 0x00, 0x00},
1847 {2048, 2, 0x20, 0x70, 0x00, 0x00},
1848 {2048, 3, 0x20, 0xb0, 0x00, 0x00},
1849 {2048, 4, 0x20, 0xf0, 0x00, 0x00},
1850
1851 {1536, 0, 0x20, 0x20, 0x00, 0x00},
1852 {1536, 2, 0x20, 0x50, 0x00, 0x00},
1853 {1536, 3, 0x20, 0x80, 0x00, 0x00},
1854 {1536, 4, 0x20, 0xb0, 0x00, 0x00},
1855
1856 {1024, 0, 0x20, 0x10, 0x00, 0x00},
1857 {1024, 2, 0x20, 0x30, 0x00, 0x00},
1858 {1024, 3, 0x20, 0x50, 0x00, 0x00},
1859 {1024, 4, 0x20, 0x70, 0x00, 0x00},
1860 {1024, 5, 0x20, 0x90, 0x00, 0x00},
1861 {1024, 6, 0x20, 0xb0, 0x00, 0x00},
1862 {1024, 7, 0x20, 0xd0, 0x00, 0x00},
1863 {1024, 8, 0x20, 0xf0, 0x00, 0x00},
1864
1865 {768, 0, 0x20, 0x21, 0x00, 0x00},
1866 {768, 2, 0x20, 0x20, 0x00, 0x00},
1867 {768, 3, 0x20, 0x81, 0x00, 0x00},
1868 {768, 4, 0x20, 0x50, 0x00, 0x00},
1869 {768, 5, 0x20, 0xe1, 0x00, 0x00},
1870 {768, 6, 0x20, 0x80, 0x00, 0x00},
1871 {768, 8, 0x20, 0xb0, 0x00, 0x00},
1872
1873 {512, 0, 0x20, 0x00, 0x00, 0x00},
1874 {512, 2, 0x20, 0x10, 0x00, 0x00},
1875 {512, 3, 0x20, 0x20, 0x00, 0x00},
1876 {512, 4, 0x20, 0x30, 0x00, 0x00},
1877 {512, 5, 0x20, 0x40, 0x00, 0x00},
1878 {512, 6, 0x20, 0x50, 0x00, 0x00},
1879 {512, 7, 0x20, 0x60, 0x00, 0x00},
1880 {512, 8, 0x20, 0x70, 0x00, 0x00},
1881
1882 {384, 0, 0x20, 0x22, 0x00, 0x00},
1883 {384, 2, 0x20, 0x21, 0x00, 0x00},
1884 {384, 3, 0x20, 0x82, 0x00, 0x00},
1885 {384, 4, 0x20, 0x20, 0x00, 0x00},
1886 {384, 5, 0x20, 0xe2, 0x00, 0x00},
1887 {384, 6, 0x20, 0x81, 0x00, 0x00},
1888 {384, 8, 0x20, 0x50, 0x00, 0x00},
1889
1890 {256, 0, 0x20, 0x01, 0x00, 0x00},
1891 {256, 2, 0x20, 0x00, 0x00, 0x00},
1892 {256, 3, 0x20, 0x21, 0x00, 0x00},
1893 {256, 4, 0x20, 0x10, 0x00, 0x00},
1894 {256, 5, 0x20, 0x41, 0x00, 0x00},
1895 {256, 6, 0x20, 0x20, 0x00, 0x00},
1896 {256, 7, 0x20, 0x61, 0x00, 0x00},
1897 {256, 8, 0x20, 0x30, 0x00, 0x00},
1898
1899 {192, 0, 0x20, 0x23, 0x00, 0x00},
1900 {192, 2, 0x20, 0x22, 0x00, 0x00},
1901 {192, 3, 0x20, 0x83, 0x00, 0x00},
1902 {192, 4, 0x20, 0x21, 0x00, 0x00},
1903 {192, 5, 0x20, 0xe3, 0x00, 0x00},
1904 {192, 6, 0x20, 0x82, 0x00, 0x00},
1905 {192, 8, 0x20, 0x20, 0x00, 0x00},
1906
1907 {128, 0, 0x20, 0x02, 0x00, 0x00},
1908 {128, 2, 0x20, 0x01, 0x00, 0x00},
1909 {128, 3, 0x20, 0x22, 0x00, 0x00},
1910 {128, 4, 0x20, 0x00, 0x00, 0x00},
1911 {128, 5, 0x20, 0x42, 0x00, 0x00},
1912 {128, 6, 0x20, 0x21, 0x00, 0x00},
1913 {128, 7, 0x20, 0x62, 0x00, 0x00},
1914 {128, 8, 0x20, 0x10, 0x00, 0x00},
1915
1916 {64, 0, 0x20, 0x03, 0x00, 0x00},
1917 {64, 2, 0x20, 0x02, 0x00, 0x00},
1918 {64, 3, 0x20, 0x23, 0x00, 0x00},
1919 {64, 4, 0x20, 0x01, 0x00, 0x00},
1920 {64, 5, 0x20, 0x43, 0x00, 0x00},
1921 {64, 6, 0x20, 0x22, 0x00, 0x00},
1922 {64, 7, 0x20, 0x63, 0x00, 0x00},
1923 {64, 8, 0x20, 0x00, 0x00, 0x00},
1924 };
1925
get_mclk_lrck_ratio(int clk_ratio,int n_fs)1926 static inline int get_mclk_lrck_ratio(int clk_ratio, int n_fs)
1927 {
1928 int i;
1929
1930 for (i = 0; i < ARRAY_SIZE(ratio_div); i++) {
1931 if (ratio_div[i].ratio == clk_ratio
1932 && ratio_div[i].nfs == n_fs)
1933
1934 return i;
1935 }
1936
1937 return -EINVAL;
1938 }
1939
es7243e_probe(struct snd_soc_component * component)1940 static int es7243e_probe(struct snd_soc_component *component)
1941 {
1942 struct es7243e_priv *es7243e = snd_soc_component_get_drvdata(component);
1943 int ret = 0;
1944 u8 index, regv = 0, chn, work_mode, ratio_index, datbits;
1945 u16 ratio;
1946 u8 digital_vol[16], pga_gain[16];
1947
1948 printk("begin->>>>>>>>>>%s!\n", __func__);
1949 #if !ES7243E_CODEC_RW_TEST_EN
1950 //ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C);//8,8
1951 #else
1952 component->control_data = devm_regmap_init_i2c(es7243e->i2c,
1953 &es7243e_regmap_config);
1954 ret = PTR_ERR_OR_ZERO(component->control_data);
1955 #endif
1956 if (ret < 0) {
1957 dev_err(component->dev, "Failed to set cache I/O: %d\n", ret);
1958 return ret;
1959 }
1960
1961 tron_component[es7243e_codec_num++] = component;
1962 index = 0;
1963 #if ES7243E_CHANNELS_MAX > 0
1964 digital_vol[index] = ES7243E_DIGITAL_VOLUME_1;
1965 pga_gain[index] = ES7243E_MIC_ARRAY_AIN1_PGA;
1966 index++;
1967 digital_vol[index] = ES7243E_DIGITAL_VOLUME_2;
1968 pga_gain[index] = ES7243E_MIC_ARRAY_AIN2_PGA;
1969 index++;
1970 #endif
1971 #if ES7243E_CHANNELS_MAX > 2
1972 digital_vol[index] = ES7243E_DIGITAL_VOLUME_3;
1973 pga_gain[index] = ES7243E_MIC_ARRAY_AIN3_PGA;
1974 index++;
1975 digital_vol[index] = ES7243E_DIGITAL_VOLUME_4;
1976 pga_gain[index] = ES7243E_MIC_ARRAY_AIN4_PGA;
1977 index++;
1978 #endif
1979 #if ES7243E_CHANNELS_MAX > 4
1980 digital_vol[index] = ES7243E_DIGITAL_VOLUME_5;
1981 pga_gain[index] = ES7243E_MIC_ARRAY_AIN5_PGA;
1982 index++;
1983 digital_vol[index] = ES7243E_DIGITAL_VOLUME_6;
1984 pga_gain[index] = ES7243E_MIC_ARRAY_AIN6_PGA;
1985 index++;
1986 #endif
1987 #if ES7243E_CHANNELS_MAX > 6
1988 digital_vol[index] = ES7243E_DIGITAL_VOLUME_7;
1989 pga_gain[index] = ES7243E_MIC_ARRAY_AIN7_PGA;
1990 index++;
1991 digital_vol[index] = ES7243E_DIGITAL_VOLUME_8;
1992 pga_gain[index] = ES7243E_MIC_ARRAY_AIN8_PGA;
1993 index++;
1994 #endif
1995 #if ES7243E_CHANNELS_MAX > 8
1996 digital_vol[index] = ES7243E_DIGITAL_VOLUME_9;
1997 pga_gain[index] = ES7243E_MIC_ARRAY_AIN9_PGA;
1998 index++;
1999 digital_vol[index] = ES7243E_DIGITAL_VOLUME_10;
2000 pga_gain[index] = ES7243E_MIC_ARRAY_AIN10_PGA;
2001 index++;
2002 #endif
2003 #if ES7243E_CHANNELS_MAX > 10
2004 digital_vol[index] = ES7243E_DIGITAL_VOLUME_11;
2005 pga_gain[index] = ES7243E_MIC_ARRAY_AIN11_PGA;
2006 index++;
2007 digital_vol[index] = ES7243E_DIGITAL_VOLUME_12;
2008 pga_gain[index] = ES7243E_MIC_ARRAY_AIN12_PGA;
2009 index++;
2010 #endif
2011 #if ES7243E_CHANNELS_MAX > 12
2012 digital_vol[index] = ES7243E_DIGITAL_VOLUME_13;
2013 pga_gain[index] = ES7243E_MIC_ARRAY_AIN13_PGA;
2014 index++;
2015 digital_vol[index] = ES7243E_DIGITAL_VOLUME_14;
2016 pga_gain[index] = ES7243E_MIC_ARRAY_AIN14_PGA;
2017 index++;
2018 #endif
2019 #if ES7243E_CHANNELS_MAX > 14
2020 digital_vol[index] = ES7243E_DIGITAL_VOLUME_15;
2021 pga_gain[index] = ES7243E_MIC_ARRAY_AIN15_PGA;
2022 index++;
2023 digital_vol[index] = ES7243E_DIGITAL_VOLUME_16;
2024 pga_gain[index] = ES7243E_MIC_ARRAY_AIN16_PGA;
2025 index++;
2026 #endif
2027
2028 for (index = 0; index < (ES7243E_CHANNELS_MAX) / 2; index++) {
2029 printk("%s(), index = %d\n", __func__, index);
2030 es7243e_read(0x02, ®v, i2c_clt[index]);
2031 if (es7243e->mclksrc == FROM_MCLK_PIN)
2032 regv &= 0x7f;
2033 else
2034 regv |= 0x80;
2035 regv &= 0xfd;
2036 if (es7243e->mclkinv == true) {
2037 regv |= 0x20;
2038 }
2039 regv &= 0xfe;
2040 if (es7243e->bclkinv == true) {
2041 regv |= 0x01;
2042 }
2043 es7243e_write(0x02, regv, i2c_clt[index]);
2044 /*
2045 * set data bits
2046 */
2047 es7243e_read(0x0b, ®v, i2c_clt[index]);
2048 regv &= 0xe3;
2049 datbits = ES7243E_DATA_LENGTH;
2050 switch (datbits) {
2051 case DATA_16BITS:
2052 regv |= 0x0c;
2053 break;
2054 case DATA_24BITS:
2055 break;
2056 case DATA_32BITS:
2057 regv |= 0x10;
2058 break;
2059 default:
2060 regv |= 0x0c;
2061 break;
2062 }
2063 es7243e_write(0x0b, regv, i2c_clt[index]);
2064 /*
2065 * set sdp format and tdm mode
2066 */
2067 chn = ES7243E_CHANNELS_MAX / 2;
2068 switch (es7243e->tdm) {
2069 case ES7243E_NORMAL_I2S:
2070 es7243e_read(0x0b, ®v, i2c_clt[index]);
2071 regv &= 0xfc;
2072 es7243e_write(0x0b, regv, i2c_clt[index]);
2073 es7243e_read(0x0c, ®v, i2c_clt[index]);
2074 regv &= 0xc0;
2075 es7243e_write(0x0c, regv, i2c_clt[index]);
2076 work_mode = 0;
2077 break;
2078 case ES7243E_NORMAL_LJ:
2079 es7243e_read(0x0b, ®v, i2c_clt[index]);
2080 regv &= 0xfc;
2081 regv |= 0x01;
2082 es7243e_write(0x0b, regv, i2c_clt[index]);
2083 es7243e_read(0x0c, ®v, i2c_clt[index]);
2084 regv &= 0xc0;
2085 es7243e_write(0x0c, regv, i2c_clt[index]);
2086 work_mode = 0;
2087 break;
2088 case ES7243E_NORMAL_DSPA:
2089 es7243e_read(0x0b, ®v, i2c_clt[index]);
2090 regv &= 0xdc;
2091 regv |= 0x03;
2092 es7243e_write(0x0b, regv, i2c_clt[index]);
2093 es7243e_read(0x0c, ®v, i2c_clt[index]);
2094 regv &= 0xc0;
2095 es7243e_write(0x0c, regv, i2c_clt[index]);
2096 work_mode = 0;
2097 break;
2098 case ES7243E_NORMAL_DSPB:
2099 es7243e_read(0x0b, ®v, i2c_clt[index]);
2100 regv &= 0xdc;
2101 regv |= 0x23;
2102 es7243e_write(0x0b, regv, i2c_clt[index]);
2103 es7243e_read(0x0c, ®v, i2c_clt[index]);
2104 regv &= 0xc0;
2105 es7243e_write(0x0c, regv, i2c_clt[index]);
2106 work_mode = 0;
2107 break;
2108 case ES7243E_TDM_A:
2109 es7243e_read(0x0b, ®v, i2c_clt[index]);
2110 regv &= 0xdc;
2111 regv |= 0x03;
2112 es7243e_write(0x0b, regv, i2c_clt[index]);
2113 es7243e_read(0x0c, ®v, i2c_clt[index]);
2114 regv &= 0xc0;
2115 regv |= 0x08;
2116 es7243e_write(0x0c, regv, i2c_clt[index]);
2117 work_mode = 0;
2118 break;
2119 case ES7243E_NFS_I2S:
2120 es7243e_read(0x0b, ®v, i2c_clt[index]);
2121 regv &= 0xfc;
2122 es7243e_write(0x0b, regv, i2c_clt[index]);
2123 es7243e_read(0x0c, ®v, i2c_clt[index]);
2124 regv &= 0xc0;
2125 switch (chn) {
2126 case 2:
2127 regv |= 0x01;
2128 work_mode = 2;
2129 break;
2130 case 3:
2131 regv |= 0x02;
2132 work_mode = 3;
2133 break;
2134 case 4:
2135 regv |= 0x03;
2136 work_mode = 4;
2137 break;
2138 case 5:
2139 regv |= 0x04;
2140 work_mode = 5;
2141 break;
2142 case 6:
2143 regv |= 0x05;
2144 work_mode = 6;
2145 break;
2146 case 7:
2147 regv |= 0x06;
2148 work_mode = 7;
2149 break;
2150 case 8:
2151 regv |= 0x07;
2152 work_mode = 8;
2153 break;
2154 default:
2155 work_mode = 0;
2156 break;
2157 }
2158 /*
2159 * the last chip generate flag bits, others chip in sync mode
2160 */
2161 if (index == ((ES7243E_CHANNELS_MAX / 2) - 1))
2162 regv |= 0x10;
2163 else
2164 regv |= 0x20;
2165 es7243e_write(0x0c, regv, i2c_clt[index]);
2166 break;
2167 default:
2168 work_mode = 0;
2169 break;
2170 }
2171
2172 /*
2173 * set clock divider and multiplexer according clock ratio and nfs mode
2174 */
2175 ratio = ES7243E_MCLK_LRCK_RATIO;
2176 ratio_index = get_mclk_lrck_ratio(ratio, work_mode);
2177 if (ratio_index < 0) {
2178 printk
2179 ("can't get configuration for %d ratio with %d es7243e",
2180 ratio, work_mode);
2181 es7243e_write(0x03, 0x20, i2c_clt[index]);
2182 es7243e_write(0x0d, 0x00, i2c_clt[index]);
2183 es7243e_write(0x04, 0x00, i2c_clt[index]);
2184 es7243e_write(0x05, 0x00, i2c_clt[index]);
2185 } else {
2186 es7243e_write(0x03, ratio_div[ratio_index].osr,
2187 i2c_clt[index]);
2188 es7243e_write(0x0d, ratio_div[ratio_index].scale,
2189 i2c_clt[index]);
2190 es7243e_write(0x04,
2191 ratio_div
2192 [ratio_index].prediv_premulti,
2193 i2c_clt[index]);
2194 es7243e_write(0x05,
2195 ratio_div[ratio_index].cf_dsp_div,
2196 i2c_clt[index]);
2197 }
2198
2199 es7243e_write(0x09, 0xe0, i2c_clt[index]);
2200 es7243e_write(0x0a, 0xa0, i2c_clt[index]);
2201
2202 es7243e_write(0x0e, digital_vol[index * 2], i2c_clt[index]);
2203
2204 es7243e_write(0x0f, 0x80, i2c_clt[index]);
2205 es7243e_write(0x14, 0x0c, i2c_clt[index]);
2206 es7243e_write(0x15, 0x0c, i2c_clt[index]);
2207 if (es7243e->vdda == VDDA_3V3) {
2208 es7243e_write(0x18, 0x26, i2c_clt[index]);
2209 es7243e_write(0x17, 0x02, i2c_clt[index]);
2210 es7243e_write(0x19, 0x77, i2c_clt[index]);
2211 es7243e_write(0x1a, 0xf4, i2c_clt[index]);
2212 es7243e_write(0x1b, 0x66, i2c_clt[index]);
2213 es7243e_write(0x1c, 0x44, i2c_clt[index]);
2214 es7243e_write(0x1d, 0x3c, i2c_clt[index]);
2215 es7243e_write(0x1e, 0x00, i2c_clt[index]);
2216 es7243e_write(0x1f, 0x0c, i2c_clt[index]);
2217 } else {
2218 es7243e_write(0x16, 0x00, i2c_clt[index]);
2219 es7243e_write(0x18, 0x26, i2c_clt[index]);
2220 es7243e_write(0x17, 0x02, i2c_clt[index]);
2221 es7243e_write(0x19, 0x66, i2c_clt[index]);
2222 es7243e_write(0x1a, 0x44, i2c_clt[index]);
2223 es7243e_write(0x1b, 0x44, i2c_clt[index]);
2224 es7243e_write(0x1c, 0x44, i2c_clt[index]);
2225 es7243e_write(0x1d, 0x3c, i2c_clt[index]);
2226 es7243e_write(0x1e, 0x0f, i2c_clt[index]);
2227 es7243e_write(0x1f, 0x07, i2c_clt[index]);
2228 }
2229 es7243e_write(0x00, 0x80, i2c_clt[index]);
2230 es7243e_write(0x01, 0x3a, i2c_clt[index]);
2231 es7243e_write(0x16, 0x00, i2c_clt[index]);
2232
2233 es7243e_write(0x20, (0x10 | pga_gain[index * 2]),
2234 i2c_clt[index]);
2235 es7243e_write(0x21, (0x10 | pga_gain[index * 2 + 1]),
2236 i2c_clt[index]);
2237
2238 //es7243e_write(0x1f, 0x03, i2c_clt[index]);
2239 /*
2240 * reset PGA
2241 */
2242 msleep(100);
2243 es7243e_write(0x16, 0x03, i2c_clt[index]);
2244 msleep(100);
2245 es7243e_write(0x16, 0x00, i2c_clt[index]);
2246 }
2247 return 0;
2248 }
2249
es7243e_remove(struct snd_soc_component * component)2250 static void es7243e_remove(struct snd_soc_component *component)
2251 {
2252 es7243e_set_bias_level(component, SND_SOC_BIAS_OFF);
2253 }
2254
2255 static struct snd_soc_component_driver soc_codec_dev_es7243e = {
2256 .probe = es7243e_probe,
2257 .remove = es7243e_remove,
2258 .suspend = es7243e_suspend,
2259 .resume = es7243e_resume,
2260 .set_bias_level = es7243e_set_bias_level,
2261 //.idle_bias_off = true,
2262 //.reg_word_size = sizeof(u8),
2263 .idle_bias_on = 1,
2264 .use_pmdown_time = 1,
2265 .endianness = 1,
2266 .non_legacy_dai_naming = 1,
2267 #if ES7243E_CODEC_RW_TEST_EN
2268 .read = es7243e_codec_read,
2269 .write = es7243e_codec_write,
2270 #endif
2271 //.component_driver = {
2272 .controls = es7243e_snd_controls,
2273 .num_controls = ARRAY_SIZE(es7243e_snd_controls),
2274 // }
2275 //,
2276
2277 };
2278
2279 static ssize_t
es7243e_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2280 es7243e_store(struct device *dev,
2281 struct device_attribute *attr, const char *buf, size_t count)
2282 {
2283 int val = 0, flag = 0;
2284 u8 i = 0, reg, num, value_w, value_r;
2285
2286 struct es7243e_priv *es7243e = dev_get_drvdata(dev);
2287 val = simple_strtol(buf, NULL, 16);
2288 flag = (val >> 16) & 0xFF;
2289
2290 if (flag) {
2291 reg = (val >> 8) & 0xFF;
2292 value_w = val & 0xFF;
2293 printk("\nWrite: start REG:0x%02x,val:0x%02x,count:0x%02x\n",
2294 reg, value_w, flag);
2295 while (flag--) {
2296 es7243e_write(reg, value_w, es7243e->i2c);
2297 printk("Write 0x%02x to REG:0x%02x\n", value_w, reg);
2298 reg++;
2299 }
2300 } else {
2301 reg = (val >> 8) & 0xFF;
2302 num = val & 0xff;
2303 printk("\nRead: start REG:0x%02x,count:0x%02x\n", reg, num);
2304 do {
2305 value_r = 0;
2306 es7243e_read(reg, &value_r, es7243e->i2c);
2307 printk("REG[0x%02x]: 0x%02x; \n", reg, value_r);
2308 reg++;
2309 i++;
2310 if ((i == num) || (i % 4 == 0))
2311 printk("\n");
2312 }
2313 while (i < num);
2314 }
2315
2316 return count;
2317 }
2318
2319 static ssize_t
es7243e_show(struct device * dev,struct device_attribute * attr,char * buf)2320 es7243e_show(struct device *dev, struct device_attribute *attr, char *buf)
2321 {
2322 printk("echo flag|reg|val > es7243e\n");
2323 printk("eg read star addres=0x06,count 0x10:echo 0610 >es7243e\n");
2324 printk
2325 ("eg write star addres=0x90,value=0x3c,count=4:echo 4903c >es7243\n");
2326 //printk("eg write value:0xfe to address:0x06 :echo 106fe > es7243\n");
2327 return 0;
2328 }
2329
2330 static DEVICE_ATTR(es7243e, 0644, es7243e_show, es7243e_store);
2331
2332 static struct attribute *es7243e_debug_attrs[] = {
2333 &dev_attr_es7243e.attr,
2334 NULL,
2335 };
2336
2337 static struct attribute_group es7243e_debug_attr_group = {
2338 .name = "es7243e_debug",
2339 .attrs = es7243e_debug_attrs,
2340 };
2341
2342 /*
2343 * If the i2c layer weren't so broken, we could pass this kind of data
2344 * around
2345 */
2346 static int
es7243e_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * i2c_id)2347 es7243e_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *i2c_id)
2348 {
2349 struct es7243e_priv *es7243e;
2350 int ret;
2351
2352 printk("begin->>>>>>>>>>%s!\n", __func__);
2353
2354 es7243e = devm_kzalloc(&i2c->dev, sizeof(struct es7243e_priv),
2355 GFP_KERNEL);
2356 if (es7243e == NULL)
2357 return -ENOMEM;
2358 es7243e->i2c = i2c;
2359 es7243e->tdm = ES7243E_WORK_MODE; //to initialize tdm mode
2360 es7243e->mclksrc = ES7243E_MCLK_SOURCE;
2361 es7243e->dmic = DMIC_INTERFACE;
2362 es7243e->mclkinv = MCLK_INVERTED_OR_NOT;
2363 es7243e->bclkinv = BCLK_INVERTED_OR_NOT;
2364 es7243e->vdda = VDDA_VOLTAGE;
2365
2366 dev_set_drvdata(&i2c->dev, es7243e);
2367 //i2c_set_clientdata(i2c, es7243e);
2368 //es7243e->regmap = devm_regmap_init_i2c(i2c, &es7243e_regmap);
2369 // if (IS_ERR(es7243e->regmap)) {
2370 // ret = PTR_ERR(es7243e->regmap);
2371 // dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2372 // ret);
2373 // return ret;
2374 // }
2375 if (i2c_id->driver_data < (ES7243E_CHANNELS_MAX) / 2) {
2376 i2c_clt[i2c_id->driver_data] = i2c;
2377 ret = devm_snd_soc_register_component(&i2c->dev,
2378 &soc_codec_dev_es7243e,
2379 es7243e_dai
2380 [i2c_id->driver_data], 1);
2381 if (ret < 0) {
2382 devm_kfree(&i2c->dev, es7243e);
2383 printk("%s(), failed to register codec device\n",
2384 __func__);
2385 return ret;
2386 }
2387 }
2388 ret = sysfs_create_group(&i2c->dev.kobj, &es7243e_debug_attr_group);
2389 if (ret) {
2390 pr_err("failed to create attr group\n");
2391 }
2392 return ret;
2393 }
2394
es7243e_i2c_remove(struct i2c_client * i2c)2395 static int __exit es7243e_i2c_remove(struct i2c_client *i2c)
2396 {
2397 sysfs_remove_group(&i2c->dev.kobj, &es7243e_debug_attr_group);
2398
2399 return 0;
2400 }
2401
2402 #if !ES7243E_MATCH_DTS_EN
2403 static int
es7243e_i2c_detect(struct i2c_client * client,struct i2c_board_info * info)2404 es7243e_i2c_detect(struct i2c_client *client, struct i2c_board_info *info)
2405 {
2406 struct i2c_adapter *adapter = client->adapter;
2407 printk("Enter into %s()\n", __func__);
2408 if (adapter->nr == ES7243E_I2C_BUS_NUM) {
2409 #if ES7243E_CHANNELS_MAX > 0
2410 if (client->addr == ES7243E_I2C_CHIP_ADDRESS_0) {
2411 strlcpy(info->type, "ES7243E_MicArray_0", I2C_NAME_SIZE);
2412 return 0;
2413 }
2414 #endif
2415 #if ES7243E_CHANNELS_MAX > 2
2416 else if (client->addr == ES7243E_I2C_CHIP_ADDRESS_1) {
2417 strlcpy(info->type, "ES7243E_MicArray_1", I2C_NAME_SIZE);
2418 return 0;
2419 }
2420 #endif
2421 #if ES7243E_CHANNELS_MAX > 4
2422 else if (client->addr == ES7243E_I2C_CHIP_ADDRESS_2) {
2423 strlcpy(info->type, "ES7243E_MicArray_2", I2C_NAME_SIZE);
2424 return 0;
2425 }
2426 #endif
2427 #if ES7243E_CHANNELS_MAX > 6
2428 else if (client->addr == ES7243E_I2C_CHIP_ADDRESS_3) {
2429 strlcpy(info->type, "ES7243E_MicArray_3", I2C_NAME_SIZE);
2430 return 0;
2431 }
2432 #endif
2433 #if ES7243E_CHANNELS_MAX > 8
2434 else if (client->addr == ES7243E_I2C_CHIP_ADDRESS_4) {
2435 strlcpy(info->type, "ES7243E_MicArray_4", I2C_NAME_SIZE);
2436 return 0;
2437 }
2438 #endif
2439 #if ES7243E_CHANNELS_MAX > 10
2440 else if (client->addr == ES7243E_I2C_CHIP_ADDRESS_5) {
2441 strlcpy(info->type, "ES7243E_MicArray_5", I2C_NAME_SIZE);
2442 return 0;
2443 }
2444 #endif
2445 #if ES7243E_CHANNELS_MAX > 12
2446 else if (client->addr == ES7243E_I2C_CHIP_ADDRESS_6) {
2447 strlcpy(info->type, "ES7243E_MicArray_6", I2C_NAME_SIZE);
2448 return 0;
2449 }
2450 #endif
2451 #if ES7243E_CHANNELS_MAX > 14
2452 else if (client->addr == ES7243E_I2C_CHIP_ADDRESS_7) {
2453 strlcpy(info->type, "ES7243E_MicArray_7", I2C_NAME_SIZE);
2454 return 0;
2455 }
2456 #endif
2457 }
2458 return -ENODEV;
2459 }
2460 #endif
2461
2462 static const unsigned short es7243e_i2c_addr[] = {
2463 #if ES7243E_CHANNELS_MAX > 0
2464 ES7243E_I2C_CHIP_ADDRESS_0,
2465 #endif
2466
2467 #if ES7243E_CHANNELS_MAX > 2
2468 ES7243E_I2C_CHIP_ADDRESS_1,
2469 #endif
2470
2471 #if ES7243E_CHANNELS_MAX > 4
2472 ES7243E_I2C_CHIP_ADDRESS_2,
2473 #endif
2474
2475 #if ES7243E_CHANNELS_MAX > 6
2476 ES7243E_I2C_CHIP_ADDRESS_3,
2477 #endif
2478
2479 #if ES7243E_CHANNELS_MAX > 8
2480 ES7243E_I2C_CHIP_ADDRESS_4,
2481 #endif
2482
2483 #if ES7243E_CHANNELS_MAX > 10
2484 ES7243E_I2C_CHIP_ADDRESS_5,
2485 #endif
2486
2487 #if ES7243E_CHANNELS_MAX > 12
2488 ES7243E_I2C_CHIP_ADDRESS_6,
2489 #endif
2490
2491 #if ES7243E_CHANNELS_MAX > 14
2492 ES7243E_I2C_CHIP_ADDRESS_7,
2493 #endif
2494
2495 I2C_CLIENT_END,
2496 };
2497
2498 /*
2499 * device tree source or i2c_board_info both use to transfer hardware information to linux kernel,
2500 * use one of them wil be OK
2501 */
2502 #if !ES7243E_MATCH_DTS_EN
2503 static struct i2c_board_info es7243e_i2c_board_info[] = {
2504 #if ES7243E_CHANNELS_MAX > 0
2505 {I2C_BOARD_INFO("ES7243E_MicArray_0", ES7243E_I2C_CHIP_ADDRESS_0),}, //es7243e_0
2506 #endif
2507
2508 #if ES7243E_CHANNELS_MAX > 2
2509 {I2C_BOARD_INFO("ES7243E_MicArray_1", ES7243E_I2C_CHIP_ADDRESS_1),}, //es7243e_1
2510 #endif
2511
2512 #if ES7243E_CHANNELS_MAX > 4
2513 {I2C_BOARD_INFO("ES7243E_MicArray_2", ES7243E_I2C_CHIP_ADDRESS_2),}, //es7243e_2
2514 #endif
2515
2516 #if ES7243E_CHANNELS_MAX > 6
2517 {I2C_BOARD_INFO("ES7243E_MicArray_3", ES7243E_I2C_CHIP_ADDRESS_3),}, //es7243e_3
2518 #endif
2519 #if ES7243E_CHANNELS_MAX > 8
2520 {I2C_BOARD_INFO("ES7243E_MicArray_4", ES7243E_I2C_CHIP_ADDRESS_4),}, //es7243e_4
2521 #endif
2522
2523 #if ES7243E_CHANNELS_MAX > 10
2524 {I2C_BOARD_INFO("ES7243E_MicArray_5", ES7243E_I2C_CHIP_ADDRESS_5),}, //es7243e_5
2525 #endif
2526
2527 #if ES7243E_CHANNELS_MAX > 12
2528 {I2C_BOARD_INFO("ES7243E_MicArray_6", ES7243E_I2C_CHIP_ADDRESS_6),}, //es7243e_6
2529 #endif
2530
2531 #if ES7243E_CHANNELS_MAX > 14
2532 {I2C_BOARD_INFO("ES7243E_MicArray_7", ES7243E_I2C_CHIP_ADDRESS_7),}, //es7243e_7
2533 #endif
2534 };
2535 #endif
2536 static const struct i2c_device_id es7243e_i2c_id[] = {
2537 #if ES7243E_CHANNELS_MAX > 0
2538 {"ES7243E_MicArray_0", 0}, //es7243e_0
2539 #endif
2540
2541 #if ES7243E_CHANNELS_MAX > 2
2542 {"ES7243E_MicArray_1", 1}, //es7243e_1
2543 #endif
2544
2545 #if ES7243E_CHANNELS_MAX > 4
2546 {"ES7243E_MicArray_2", 2}, //es7243e_2
2547 #endif
2548
2549 #if ES7243E_CHANNELS_MAX > 6
2550 {"ES7243E_MicArray_3", 3}, //es7243e_3
2551 #endif
2552
2553 #if ES7243E_CHANNELS_MAX > 8
2554 {"ES7243E_MicArray_4", 4}, //es7243e_4
2555 #endif
2556
2557 #if ES7243E_CHANNELS_MAX > 10
2558 {"ES7243E_MicArray_5", 5}, //es7243e_5
2559 #endif
2560
2561 #if ES7243E_CHANNELS_MAX > 12
2562 {"ES7243E_MicArray_6", 6}, //es7243e_6
2563 #endif
2564
2565 #if ES7243E_CHANNELS_MAX > 14
2566 {"ES7243E_MicArray_7", 7}, //es7243e_7
2567 #endif
2568 {}
2569 };
2570
2571 MODULE_DEVICE_TABLE(i2c, es7243e_i2c_id);
2572
2573 static const struct of_device_id es7243e_dt_ids[] = {
2574 #if ES7243E_CHANNELS_MAX > 0
2575 {.compatible = "ES7243E_MicArray_0",}, //es7243e_0
2576 #endif
2577
2578 #if ES7243E_CHANNELS_MAX > 2
2579 {.compatible = "ES7243E_MicArray_1",}, //es7243e_1
2580 #endif
2581
2582 #if ES7243E_CHANNELS_MAX > 4
2583 {.compatible = "ES7243E_MicArray_2",}, //es7243e_2
2584 #endif
2585
2586 #if ES7243E_CHANNELS_MAX > 6
2587 {.compatible = "ES7243E_MicArray_3",}, //es7243e_3
2588 #endif
2589
2590 #if ES7243E_CHANNELS_MAX > 8
2591 {.compatible = "ES7243E_MicArray_4",}, //es7243e_4
2592 #endif
2593
2594 #if ES7243E_CHANNELS_MAX > 10
2595 {.compatible = "ES7243E_MicArray_5",}, //es7243e_5
2596 #endif
2597
2598 #if ES7243E_CHANNELS_MAX > 12
2599 {.compatible = "ES7243E_MicArray_6",}, //es7243e_6
2600 #endif
2601
2602 #if ES7243E_CHANNELS_MAX > 14
2603 {.compatible = "ES7243E_MicArray_7",}, //es7243e_7
2604 #endif
2605 {}
2606 };
2607
2608 MODULE_DEVICE_TABLE(of, es7243e_dt_ids);
2609
2610 static struct i2c_driver es7243e_i2c_driver = {
2611 .driver = {
2612 .name = "es7243e",
2613 .owner = THIS_MODULE,
2614 #if ES7243E_MATCH_DTS_EN
2615 .of_match_table = es7243e_dt_ids,
2616 #endif
2617 },
2618 .probe = es7243e_i2c_probe,
2619 .remove = __exit_p(es7243e_i2c_remove),
2620 .class = I2C_CLASS_HWMON,
2621 .id_table = es7243e_i2c_id,
2622
2623 #if !ES7243E_MATCH_DTS_EN
2624 .address_list = es7243e_i2c_addr,
2625 .detect = es7243e_i2c_detect,
2626 #endif
2627
2628 };
2629
es7243e_modinit(void)2630 static int __init es7243e_modinit(void)
2631 {
2632 int ret;
2633 #if 0
2634 int i;
2635 struct i2c_adapter *adapter;
2636 struct i2c_client *client;
2637 #endif
2638
2639 #if 0
2640 adapter = i2c_get_adapter(ES7243E_I2C_BUS_NUM);
2641 if (!adapter) {
2642 printk("i2c_get_adapter() fail!\n");
2643 return -ENODEV;
2644 }
2645 printk("%s() begin0000\n", __func__);
2646
2647 for (i = 0; i < ES7243E_CHANNELS_MAX / 2; i++) {
2648 client = i2c_new_device(adapter, &es7243e_i2c_board_info[i]);
2649 printk("%s() i2c_new_device\n", __func__);
2650 if (!client)
2651 return -ENODEV;
2652 }
2653 i2c_put_adapter(adapter);
2654 #endif
2655 ret = i2c_add_driver(&es7243e_i2c_driver);
2656 if (ret != 0)
2657 printk("Failed to register es7243 i2c driver : %d \n", ret);
2658 return ret;
2659 }
2660
2661 //late_initcall(es7243e_modinit);
2662 module_init(es7243e_modinit);
es7243e_exit(void)2663 static void __exit es7243e_exit(void)
2664 {
2665 i2c_del_driver(&es7243e_i2c_driver);
2666 }
2667
2668 module_exit(es7243e_exit);
2669 MODULE_DESCRIPTION("ASoC ES7243E audio adc driver");
2670 MODULE_AUTHOR("David Yang <yangxiaohua@everest-semi.com>");
2671 MODULE_LICENSE("GPL v2");
2672