xref: /utopia/UTPA2-700.0.x/modules/gpd/drv/gpd/drvgpd.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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77 //<MStar Software>
78 #ifndef DRVGPD_H
79 #define DRVGPD_H
80 
81 #include "gpd.h"
82 
83 #define DEFAULT_ALPHA 0xFF
84 
85 
86 #define FALSE  0
87 #define TRUE   1
88 
89 #if 1
90 extern MS_VIRT READBITBASE;
91 #define read_bits_reg(n) 	(*((volatile MS_U16*)(MS_VIRT)(READBITBASE+((0x10|(n-1))<<2))))
92 #define show_bits_reg(n) 	(*((volatile MS_U16*)(MS_VIRT)(READBITBASE+((0x20|(n-1))<<2))))
93 #else
94 #define READBITBASE1 0xA000543C
95 #define READBITBASE2 0xA000547C
96 #define read_bits_reg(n) 	(*((volatile MS_U32*)(READBITBASE1+(n<<2))))
97 #define show_bits_reg(n) 	(*((volatile MS_U32*)(READBITBASE2+(n<<2))))
98 #endif
99 
100 void drv_gpd_set_scaling(MS_U32 enable, MS_U32 mode);
101 MS_U32 drv_gpd_get_scaling_mode(void);
102 
103 #if (defined(__arm__))
104 void drv_eng_always_active(MS_U32 value);
105 #endif
106 
107 void drv_gpd_png_en(void);
108 void drv_gpd_gif_en(void);
109 MS_U16 read_bits(MS_U32 n);
110 MS_U16 show_bits(MS_U32 n);
111 
112 MS_U32 drv_reg_iofifo_state(void);
113 void drv_gpd_eco_enable(MS_U32 enable);
114 
115 void drv_gpd_set_zbuf_bas(MS_PHY base);
116 void drv_gpd_set_cbuf_bas(MS_PHY base);
117 
118 void set_nop_cmd(MS_U32 num);
119 
120 MS_U32 drv_gpd_png_state(void);
121 MS_U32 drv_gpd_bitpos(void);
122 MS_U32 drv_gpd_ififo_radr(void);
123 MS_U32 drv_gpd_ififo_empty(void);
124 MS_U32 drv_gpd_ififo_full(void);
125 MS_U32 drv_gpd_ofifo_done(void);
126 MS_U32 drv_gpd_bsadr_full(void);
127 MS_U32 drv_gpd_png_blk_done(void);
128 MS_U32 drv_gpd_png_eob(void);
129 
130 void drv_gpd_Init(void);
131 void drv_gpd_set_bstart_end(MS_PHY bstart, MS_PHY bend);
132 void drv_gpd_set_ocolor(MS_U32 ocolor_typ);
133 void drv_gpd_write_cmap(MS_U32 num, MS_U8 *ptr, MS_U32 trans_idx);
134 //void drv_gpd_write_cmap(MS_U32 num, MS_U32 *ptr);
135 
136 void drv_gpd_set_pitch(MS_U32 pitch);
137 void drv_gpd_set_gif_swidth_sheight(MS_U32 width ,MS_U32 height);
138 void drv_gpd_set_iwidth_height(MS_U32 iwidth, MS_U32 iheight);
139 void drv_gpd_set_istart(MS_U32 istart);
140 void drv_gpd_set_ROI(MS_U32 enable, MS_U32 hstart, MS_U32 vstart, MS_U32 width, MS_U32 height);
141 void drv_gpd_set_interlace(MS_U8 interlace);
142 void drv_gpd_set_gif_local_map_size(MS_U32 bpp);
143 
144 void drv_gpd_set_gif_go(void);
145 MS_U32 drv_gpd_gif_done(void);
146 void drv_gpd_set_trans(MS_U16 r, MS_U16 g, MS_U16 b, MS_U8 enable);
147 void drv_gpd_set_palette(MS_U8 *palette, MS_U16 palette_num, MS_U8 *trans, MS_U16 num_trans);
148 void drv_gpd_set_pgend(MS_U8 pgend);
149 
150 void drv_gpd_set_frun_cnt(MS_U32 frun_cnt);
151 void drv_gpd_set_iccp_dtsize(MS_U8 iccp, MS_U8 dtsize);
152 void drv_gpd_set_type(MS_U8 color_type, MS_U8 interlace, MS_U8 color_depth);
153 void drv_gpd_set_default_alpha(MS_U8 alpha);
154 void drv_gpd_set_sca_dfa(MS_U8 sca, MS_U8 dfa);
155 void drv_gpd_set_ltsize(MS_U16 ltsize);
156 
157 void drv_gpd_set_scline_width_progressive(MS_U32 width, MS_U8 bpp);
158 void drv_gpd_set_scline_height_progressive(MS_U32 height);
159 void drv_gpd_set_scline_width_interlace(MS_U32 width, MS_U8 bpp);
160 void drv_gpd_set_scline_height_interlace(MS_U32 height);
161 
162 void drv_gpd_set_png_go(void);
163 void drv_gpd_set_blk_go(void);
164 void drv_gpd_set_png_done(MS_U32 value);
165 void drv_gpd_set_cmp_type(MS_U8 type);
166 
167 void drv_gpd_set_lbase(MS_U16 *lbase);
168 void drv_gpd_set_dbase(MS_U16 *dbase);
169 void drv_gpd_set_lmincode_valid(MS_U16 lmin_valid);
170 void drv_gpd_set_dmincode_valid(MS_U16 dmin_valid);
171 void drv_gpd_set_lmincode(MS_U16 *lmin);
172 void drv_gpd_set_dmincode(MS_U16 *dmin);
173 
174 void drv_gpd_set_fixed_ldata(void);
175 void drv_gpd_set_dynamic_ldata(MS_U16 num, MS_U16 *ldata);
176 void drv_gpd_set_dynamic_ddata(MS_U16 num, MS_U16 *ddata);
177 MS_U32 drv_gpd_check_engine(void);
178 void drv_gpd_set_hipri(MS_U16 hipri);
179 void drv_gpd_set_access_region(MS_U32 start, MS_U32 end);
180 MS_U32 drv_gpd_get_clkbase(void);
181 MS_U32 drv_gpd_get_clkoffset(void);
182 MS_U32 is_stb(void);
183 void drv_gpd_init_outside_reg(MS_VIRT BankBaseAddr);
184 void drv_gpd_power_on(void);
185 void drv_gpd_power_off(void);
186 void drv_gpd_init_chip_specific_reg(void);
187 MS_U8 MDrv_GPD_MIU_Select(MS_U32 u32Addr);
188 void MDrv_GPD_Reg_Base(MS_U32* u32RIUBase, MS_U32* u32XIUBase);
189 void MDrv_GPD_MIU_Client(MS_U8* u8Offset, MS_U16* u16BitMask);
190 
191 // GPD Interrupt Register Function
192 typedef void (*GPD_IsrFuncCb)(void);
193 
194 MS_U8 MDrv_GPD_EnableISR(GPD_IsrFuncCb IsrCb);
195 MS_U8 MDrv_GPD_DisableISR(void);
196 void MDrv_GPD_SetISRMask(void);
197 void MDrv_GPD_PrintGPDBuf(void);
198 void drv_gpd_dbg_dump(void);
199 void drv_gpd_set_cacheable(MS_U32 u32Cacheable);
200 MS_U32 drv_gpd_get_cacheable(void);
201 MS_VIRT drv_gpd_get_RIU_BASE(void);
202 void drv_gpd_set_access_bound(MS_U32 w_start, MS_U32 w_end, MS_U32 i_start, MS_U32 i_end);
203 
204 #endif
205 
206