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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 //////////////////////////////////////////////////////////////////////////////////////////////////// 96 /// 97 /// file drvRASP.h 98 /// @brief RASP Driver Interface 99 /// @author MStar Semiconductor,Inc. 100 /// @attention 101 //////////////////////////////////////////////////////////////////////////////////////////////////// 102 103 #ifndef _DRVRASP_H_ 104 #define _DRVRASP_H_ 105 106 #ifdef __cplusplus 107 extern "C" 108 { 109 #endif 110 111 #include "UFO.h" 112 //-------------------------------------------------------------------------------------------------- 113 // Define 114 //-------------------------------------------------------------------------------------------------- 115 #define RASP_PIDFLT_START_NUM 0 116 #define RASP_PIDFLT_END_NUM 24 117 118 #define RASP_PIDFLT_NUM_ALL 24 119 120 #define RASP_ECMFLT_START_NUM 0 121 #define RASP_ECMFLT_END_NUM 6 122 123 #define RASP_ECMFLT_NUM_ALL 6 124 125 #ifdef HW_PVR_ENABLE 126 #define PVR_PIDFLT_START_NUM 0 127 #define PVR_PIDFLT_END_NUM 16 128 129 #define PVR_PIDFLT_NUM_ALL 16 130 #endif //#endif HW_PVR_ENABLE 131 132 #define CALLBACK_SIZE_MIN 16//due to current MIU alignment's up to 16 bytes 133 134 #define DRVRASP_PID_NULL 0x1FFF // Transport stream null PID 135 #define MSIF_RASP_LIB_CODE {'R','A','S','P'} // Lib code 136 #define MSIF_RASP_LIBVER {'0','2'} // LIB version 137 #define MSIF_RASP_BUILDNUM {'0','0'} // Build Number 138 #define MSIF_RASP_CHANGELIST {'0','0','5','1','1','4','7','0'} // P4 ChangeList Number 139 140 #define RASP_DRV_VERSION /* Character String for DRV/API version */ \ 141 MSIF_TAG, /* 'MSIF' */ \ 142 MSIF_CLASS, /* '00' */ \ 143 MSIF_CUS, /* 0x0000 */ \ 144 MSIF_MOD, /* 0x0000 */ \ 145 MSIF_CHIP, \ 146 MSIF_CPU, \ 147 MSIF_RASP_LIB_CODE, /* IP__ */ \ 148 MSIF_RASP_LIBVER, /* 0.0 ~ Z.Z */ \ 149 MSIF_RASP_BUILDNUM, /* 00 ~ 99 */ \ 150 MSIF_RASP_CHANGELIST, /* CL# */ \ 151 MSIF_OS 152 153 //-------------------------------------------------------------------------------------------------- 154 // Driver Capability 155 //-------------------------------------------------------------------------------------------------- 156 157 //-------------------------------------------------------------------------------------------------- 158 // Type and Structure 159 //-------------------------------------------------------------------------------------------------- 160 161 /// RASP DDI return value 162 /// @name TSP_Result 163 /// @ref TSP_Result 164 /// return value 165 /// @{ 166 typedef enum 167 { 168 DRVRASP_FAIL = 0, 169 DRVRASP_OK, 170 DRVRASP_INVALID_PARAM, 171 DRVRASP_FUNC_ERROR, 172 } RASP_RESULT; 173 174 typedef enum 175 { 176 E_NDS_OK, 177 E_NDS_FAIL, 178 179 } NDS_Result; 180 181 typedef struct _NDS_RASP_Param 182 { 183 MS_PHYADDR ecm_addr; // NDS_CAP_BUF_SIZE * NDS_CAP_ECM_NUM 184 MS_U8 *pu8ecm_buf; // virtual address of ecm address 185 MS_U32 ecm_size; // total buffer size from emm_ecm_addr 186 187 MS_PHYADDR payload_addr; // NDS_CAP_BUF_SIZE * NDS_CAP_ECM_NUM 188 MS_U8 *pu8playload_buf; // virtual address of ecm address 189 MS_U32 payload_size; // total buffer size from emm_ecm_addr 190 191 } NDS_RASP_Param; 192 193 #define DrvRASP_Event MS_U32 194 #define E_DRVRASP_EVENT_DATA_INIT 0x00000000 195 //PVR buffer callback size met 196 #define E_DRVRASP_EVENT_CALLBACK_SIZE_MET 0x00000040 197 198 // Payload/Event Mask flag 199 //#define RASP_BYPASS_MASK 0xffffffff 200 #define E_DRVRASP_BYPASS_AFE 0x00000001 // adaptation field extension 201 #define E_DRVRASP_BYPASS_TPD 0x00000002 // transport private data 202 #define E_DRVRASP_BYPASS_SP 0x00000004 // splicing point 203 #define E_DRVRASP_BYPASS_OPCR 0x00000008 // OPCR 204 #define E_DRVRASP_BYPASS_PCR 0x00000010 // PCR 205 #define E_DRVRASP_BYPASS_ESPI 0x00000020 // elementary stream priority indicator 206 #define E_DRVRASP_BYPASS_RAI 0x00000040 // random access indicator 207 #define E_DRVRASP_BYPASS_DI 0x00000080 // discontinue indicator 208 #define E_DRVRASP_BYPASS_ESNS 0x00000100 // elementary stream not scrambled 209 #define E_DRVRASP_BYPASS_ESES 0x00000200 // elementary stream even scrambled 210 #define E_DRVRASP_BYPASS_ESOS 0x00000400 // elementary stream odd scrambled 211 #define E_DRVRASP_BYPASS_PUSI 0x00000800 // payload unit start indicator 212 #define E_DRVRASP_BYPASS_FPR 0x00001000 // first packet recorded 213 #define E_DRVRASP_BYPASS_RASP_Tick 0x80000000 // rasp tick 214 215 typedef enum 216 { 217 E_NDSRASP_CAP_FILTER_NUM = 0, // Get filter number 218 E_NDSRASP_CAP_FILTER_PVR_NUM, // Get pvr filter number 219 E_NDSRASP_CAP_PVR_ALIGN, // Get pvr buffer minimal alignment 220 E_NDSRASP_CAP_RESOURCE_SIZE, // Get the data structure size of private resource (share resource) 221 E_NDSRASP_CAP_RASP_NUM, // Get RASP num 222 E_NDSRASP_CAP_ECMFLT_NUM, 223 E_NDSRASP_CAP_EVENT_FIFO_DEPTH, 224 E_NDSRASP_CAP_EVENT_NUM, 225 E_NDSRASP_CAP_NULL, 226 } NDSRASP_Cap; 227 228 /// RASP channel state bit flags 229 typedef enum //_DrvTSP_FltState 230 { 231 E_DRVRASP_FLT_STATE_FREE = 0x00000000, ///<\n 232 E_DRVRASP_FLT_STATE_ALLOC = 0x00000001, ///<\n 233 E_DRVRASP_FLT_STATE_ENABLE = 0x00000002, ///<\n 234 E_DRVRASP_FLT_STATE_OVERFLOW = 0x00010000, //[Reserved] 235 E_DRVRASP_FLT_STATE_NA = 0xFFFFFFFF, 236 } DrvRASP_FltState; 237 238 /// TSP record mode 239 typedef enum //_DrvRASP_RecMode 240 { 241 // Record PID 242 E_DRVRASP_REC_MODE_PID = 0x00000000, 243 // Record ALL 244 E_DRVRASP_REC_MODE_ALL = 0x00000001, 245 } DrvRASP_RecMode; 246 247 // 248 typedef enum 249 { 250 E_DRVRASP_MODE_PAYLOAD = 0x00000000, 251 // Record ECM 252 E_DRVRASP_MODE_ECM = 0x00000001, 253 } DrvRASP_CtrlMode; 254 255 256 /// TSP interface 257 typedef enum 258 { 259 E_DRVRASP_IF_PLAYBACK = 0x0, // TS interface 0 260 E_DRVRASP_IF_PVR0 = 0x1, // TS interface 1, mainly for PVR 261 } DrvRASP_If; 262 263 typedef struct //_DrvRASP_Msg 264 {/*//why union? by teddy.chen 265 /// Union data type of message 266 union 267 { 268 /// FltInfo message 269 /// - Byte[0] : Section filter id 270 /// - Byte[1] : TSP id 271 MS_U32 FltInfo; 272 /// PvrBufId 273 /// - Byte[0] : PVR buffer id 274 MS_U32 PvrBufId; 275 }; 276 */ 277 MS_U8 u8PVREngNum; 278 } DrvRASP_Msg; 279 280 typedef enum //_DrvRASP_RecType 281 { 282 STR2MIU = 0x0, 283 PAYLOAD2MIU = 0x1, 284 ECM2MIU = 0x2, 285 } NDSRASP_RecType; 286 287 typedef enum //RASP Output Packet Size 288 { 289 RASP_OUT_188 = 0, 290 RASP_OUT_192 291 } RASP_OUTSIZE_e; 292 293 typedef enum //RASP Output Packet Size 294 { 295 RASP_IN_188, 296 RASP_IN_192 297 } RASP_INPUTSIZE_e; 298 299 typedef enum{ 300 EVENT_WATERMARK, 301 TIMER_WATERMARK, 302 }WATERMARK_TYPE; 303 304 typedef enum 305 { 306 WATERMARK_50MS = 0, 307 WATERMARK_200MS = 1, 308 WATERMARK_500MS = 2, 309 }TIME_WATERMARK_e; 310 311 312 typedef enum 313 { 314 NDSRASP_CB_STR2RAM = 0, 315 NDSRASP_CB_PAYLOAD2RAM, 316 NDSRASP_CB_ECM2RAM, 317 NDSRASP_CB_ECMREADY, 318 NDSRASP_CB_EVENTMARK, 319 NDSRASP_CB_TIMEMARK, 320 NDSRASP_CB_EVENTWRITE_OVF, 321 NDSRASP_CB_EVENTREAD_OVF, 322 }NDSRASP_Event_e; 323 324 typedef enum 325 { 326 CMDQ_WR_LEVEL_EMPTY=0, 327 CMDQ_WR_LEVEL_25_FULL, 328 CMDQ_WR_LEVEL_50_FULL, 329 CMDQ_WR_LEVEL_75_FULL, 330 }FILEIN_CMDQ_LEVEL; 331 332 333 typedef struct 334 { 335 NDSRASP_Event_e eEvent; 336 MS_U16 length; 337 MS_U16 index; 338 MS_U32 write_ptr; 339 MS_U8 *pRetBuf; 340 } NDSRaspCallBack_t; 341 342 typedef struct 343 { 344 MS_U32 Event_Descriptor; 345 MS_U32 Pid; 346 MS_U32 PacketNum; 347 MS_U32 Timer; 348 MS_U32 PCR; 349 350 }NDS_RASP_EVENT; 351 352 #if defined(UFO_PUBLIC_HEADER_500_3) 353 typedef enum 354 { 355 RASP_FLOW_INPUT_TS0, ///< DMX input from TS0 356 RASP_FLOW_INPUT_TS1, ///< DMX input from TS1 357 RASP_FLOW_INPUT_TS2, ///< DMX input from TS2 358 RASP_FLOW_INPUT_TS3, ///< DMX input from TS3 359 RASP_FLOW_INPUT_TS4, ///< DMX input from TS4 360 RASP_FLOW_INPUT_TS5, ///< DMX input from TS5 361 RASP_FLOW_INPUT_TS6, ///< DMX input from TS6 362 RASP_FLOW_INPUT_DEMOD0, ///< DMX input from internal demod 0 363 RASP_FLOW_INPUT_DEMOD1, ///< DMX input from internal demod 1 364 RASP_FLOW_INPUT_MEM, ///< DMX input from memory 365 } RASP_FLOW_INPUT; 366 #else 367 typedef enum 368 { 369 RASP_FLOW_INPUT_DEMOD, ///< DMX input from internal demod 370 RASP_FLOW_INPUT_TS0, ///< DMX input from internal demod 371 RASP_FLOW_INPUT_TS1, ///< DMX input from internal demod 372 RASP_FLOW_INPUT_MEM, ///< DMX input from memory 373 } RASP_FLOW_INPUT; 374 #endif 375 376 typedef enum 377 { 378 RASP_FLOW_OUTPUT_PVR, 379 RASP_FLOW_OUTPUT_PLAYBACK, 380 } RASP_FLOW_OUTPUT; 381 382 /// TSP notification function 383 typedef void (*P_DrvRASP_EvtCallback)(DrvRASP_Event eEvent, DrvRASP_Msg *pMsg); 384 typedef void (*P_DrvRASP_EventCB)(MS_U32 RaspID, NDS_RASP_EVENT* event_ptr /*event callback struct*/, MS_U16 event_size, MS_U16 event_index); 385 386 typedef void (*P_NDSRASP_Callback)(MS_U8 RaspID, NDSRaspCallBack_t *pMsg); 387 388 //-------------------------------------------------------------------------------------------------- 389 // Function Prototype 390 //-------------------------------------------------------------------------------------------------- 391 392 // Initialization API 393 MS_U32 NDS_RASP_InitLibResource(void* pResMemAddr); 394 MS_U32 NDS_RASP_Init(void); 395 MS_U32 NDS_RASP_Exit(void); 396 MS_U32 NDS_RASP_Reset(void); 397 //MS_U32 NDS_RASP_SetTSIF(MS_U32 u32RASPEng, MS_BOOL bPara, MS_BOOL bExtSync, MS_BOOL bDataSWP); 398 MS_U32 NDS_RASP_GetTSIFStatus(MS_U32 u32RASPEng, MS_BOOL* pbExtSyc, MS_BOOL* pbParl, MS_BOOL *pbDataSWP); 399 MS_U32 NDS_RASP_FileinEnable(MS_U32 u32RASPEng, MS_BOOL bEn); 400 MS_U32 NDS_RASP_GetFileinEnable(MS_U32 u32RASPEng, MS_BOOL* bEn); 401 402 // Capacity query 403 MS_U32 NDS_RASP_GetCap(NDSRASP_Cap eCap, void* pOutput); 404 MS_U32 NDS_RASP_GetLibVer(const MSIF_Version **ppVersion); 405 MS_U32 NDS_RASP_GetTimerAndPacketNum(const MSIF_Version **ppVersion); 406 MS_U32 NDS_RASP_GetTsPayload(const MSIF_Version **ppVersion); 407 MS_U32 NDS_RASP_GetEventMask(const MSIF_Version **ppVersion); 408 409 // PVR API 410 #if 0 411 MS_U32 NDS_RASP_SetBuffer(MS_U32 u32RASPEng, MS_PHYADDR u32BufStart0, MS_PHYADDR u32BufStart1, MS_U32 u32BufSize0, MS_U32 u32BufSize1); 412 #endif 413 MS_U32 NDS_RASP_CtrlConfig(MS_U32 u32RASPEng,DrvRASP_CtrlMode eCtrlMode,MS_BOOL bEnable); 414 MS_U32 NDS_RASP_PvrEngStart(MS_U32 u32RASPEng,DrvRASP_RecMode eRecMode,MS_BOOL bEnable); 415 MS_U32 NDS_RASP_Pause(MS_U32 u32RASPEng, MS_BOOL bPause); 416 MS_U32 NDS_RASP_GetWriteAddr(MS_U32 u32RASPEng, MS_PHYADDR *pu32WriteAddr); 417 MS_U32 NDS_RASP_SetNotify(MS_U32 u32RASPEng, DrvRASP_Event eEvents, P_DrvRASP_EvtCallback pfCallback); 418 MS_U32 NDS_RASP_SetPacketMode(MS_U32 u32RASPEng, NDSRASP_RecType eRecType, RASP_OUTSIZE_e eOutSize); 419 MS_U32 NDS_RASP_SetRecordTimeStamp(MS_U32 u32RASPEng, MS_U32 u32Stamp); 420 MS_U32 NDS_RASP_GetRecordTimeStamp(MS_U32 u32RASPEng, MS_U32* u32Stamp); 421 MS_U32 NDS_RASP_GetCurrentPktStatus(MS_U32 u32RASPEng, MS_U32* u32PktStamp, MS_U32* u32PktNumber); 422 MS_U32 NDS_RASP_TimeStampSelRecordStampSrc(MS_U32 u32RASPEng, MS_BOOL bLocal); 423 MS_U32 NDS_RASP_AllocFlt(MS_U32 u32RASPEng, MS_U32 *pu16PidFltId); 424 MS_U32 NDS_RASP_FreeFlt(MS_U32 u32RASPEng, MS_U32 u32PidFltId); 425 MS_U32 NDS_RASP_AllocECMFlt(MS_U32 u32RASPEng,MS_U16 * pu16ECMFltId); 426 MS_U32 NDS_RASP_FreeECMFlt(MS_U32 u32RASPEng,MS_U16 u16ECMFltId); 427 MS_U32 NDS_RASP_SetPid(MS_U32 u32RASPEng, MS_U16 u16Fltid, MS_U16 u16Pid); 428 MS_U32 NDS_RASP_GetPid(MS_U32 u32RASPEng, MS_U16 u16Fltid, MS_U16 *pu16Pid); 429 MS_U32 NDS_RASP_AttachInterrupt(InterruptCb pIntCb); 430 MS_U32 NDS_RASP_EnableInterrupt(void); 431 MS_U32 NDS_RASP_CallbackSize(MS_U32 u32RASPEng, MS_U32* pu32CallbackSize, MS_BOOL bSet); 432 //MS_U32 NDS_RASP_TimeStampSetPlaybackStamp(MS_U32 u32Stamp); 433 //MS_U32 NDS_RASP_TimeStampGetPlaybackStamp(MS_U32* u32Stamp); 434 //MS_U32 NDS_RASP_TimeStamp(MS_BOOL bEnable); 435 436 // RASP API 437 MS_U32 NDS_RASP_SetEventMask(MS_U32 u32RASPEng, MS_U16 u16Flt, MS_U32 u32Event); 438 MS_U32 NDS_RASP_SetWatermark(MS_U32 u32RASPEng, WATERMARK_TYPE WType, MS_BOOL bEnable); 439 MS_U32 NDS_RASP_AdvEnable(MS_U32 u32RASPEng, DrvRASP_RecMode eRecMode, MS_BOOL bEn); 440 MS_U32 NDS_RASP_Rec_PID(MS_U32 u32RASPEng, MS_BOOL bEnRecordPid); 441 442 MS_U32 NDS_RASP_SetPayloadMask(MS_U32 u32RASPEng, MS_U16 u16Flt, MS_U32 u32Payload); 443 MS_U32 NDS_RASP_SetDataSwap(MS_U32 u32RASPEng, MS_BOOL bEn); 444 445 MS_U32 NDS_PROC_RASP_PVR_SizeMet(MS_U32 u32RASPEng); 446 MS_U32 NDS_RASP_CallbackIntCheck(MS_U32 u32RASPEng, MS_BOOL* bInterrupted); 447 MS_U32 NDS_RASP_CallbackIntClr(MS_U32 u32RASPEng); 448 449 NDS_Result NDS_RASP_Init2(NDS_RASP_Param *Param); 450 NDS_Result NDS_RASP_Exit2(void); 451 452 MS_U32 NDS_RASP_SetFileIn_Config(MS_U32 RaspEng, MS_U32 StartAddr, MS_U32 FileInSize); 453 MS_U32 NDS_RASP_FileIn_Start(MS_U32 RaspEng); 454 MS_U32 NDS_RASP_192FileIn_Start(MS_U32 RaspEng); 455 MS_U32 NDS_RASP_SetFileIn_Timer(MS_U32 RaspEng, MS_U16 u16Timer); 456 MS_U32 NDS_RASP_SetFileIn_PktSize(MS_U32 RaspEng, MS_U16 PktSize); 457 MS_BOOL NDS_RASP_IsFileIn_Done(MS_U32 RaspEng); 458 MS_U32 NDS_RASP_FileIn_Flush(MS_U32 RaspEng); 459 MS_U32 NDS_RASP_SetBufInfo(MS_U32 u32RASPEng, NDSRASP_RecType eRecType, MS_PHYADDR u32BufStart0, MS_PHYADDR u32BufStart1, MS_U32 u32BufSize0, MS_U32 u32BufSize1); 460 MS_U32 NDS_RASP_FileinInit(MS_U32 u32RASPEng); 461 462 MS_U32 NDS_RASP_FileIn_BypassTimeStamp(MS_U32 u32RASPEng,MS_BOOL bypass); 463 MS_U32 NDS_RASP_FileIn_SetPlaybackTimeStamp(MS_U32 u32RASPEng,MS_U32 u32Stamp); 464 MS_U32 NDS_RASP_FileIn_GetPlaybackTimeStamp(MS_U32 u32RASPEng); 465 MS_BOOL NDS_RASP_FileIn_IsCMDQ_Full(MS_U32 RaspEng); 466 MS_BOOL NDS_RASP_FileIn_IsCMDQ_Empty(MS_U32 RaspEng); 467 MS_BOOL NDS_RASP_FileIn_GetCmdQueueLevel(MS_U32 RaspEng,FILEIN_CMDQ_LEVEL * peCMDQLvl); 468 MS_BOOL NDS_RASP_FileIn_GetEmptyNum(MS_U32 RaspEng,MS_U8 * peCMDQCnt); 469 MS_U32 NDS_RASP_FileIn_Timer(MS_U32 RaspEng,MS_BOOL bEnFileInTimer,MS_U16 u16Timer); 470 #ifdef UFO_PUBLIC_HEADER_500_3 471 MS_BOOL NDS_RASP_FileIn_Init_TimeStamp(MS_U32 RaspEng,MS_U32 u32SetPacketTimeStamp); 472 #else 473 MS_BOOL NDS_RASP_FileIn_Init_TimeStamp(MS_U32 RaspEng,MS_BOOL u32SetPacketTimeStamp); 474 #endif 475 MS_BOOL NDS_RASP_Reset_EventPktCounter(MS_U32 RaspEng); 476 MS_BOOL NDS_RASP_Reset_EventPktTimer(MS_U32 RaspEng); 477 MS_BOOL NDS_RASP_GetEventDescriptor(MS_U32 RaspEng,NDS_RASP_EVENT * pEventDesc,MS_U32 u32ArraySize); 478 MS_U16 NDS_RASP_GetEventNumber(MS_U32 RaspEng); 479 480 MS_BOOL NDS_RASP_FlowSet(MS_U32 rasp_eng, RASP_FLOW_INPUT eSource, RASP_FLOW_OUTPUT eDest, MS_BOOL bPara, MS_BOOL bExtSync, MS_BOOL bDataSWP, RASP_INPUTSIZE_e eMode ); 481 MS_U32 NDS_RASP_RaspEngStart(MS_U32 u32RASPEng, DrvRASP_CtrlMode eCtrlMode, MS_BOOL bEnable); 482 MS_BOOL NDS_RASP_Livein_Config(MS_U32 rasp_eng); 483 484 void NDS_RASP_SetDbgLevel(MS_U32 level); 485 MS_U32 NDS_RASP_SetPayloadTimeStamp(MS_U32 u32RASPEng , MS_U32 u32TimeStamp); 486 MS_U32 NDS_RASP_GetPayloadTimeStamp(MS_U32 u32RASPEng , MS_U32 *pu32TimeStamp); 487 MS_U32 NDS_RASP_GetPayloadWriteAddr(MS_U32 u32RASPEng, MS_PHYADDR *pu32WriteAddr); 488 489 MS_U32 NDS_RASP_SetECMPid(MS_U32 u32RASPEng, MS_U16 u16Fltid, MS_U16 u16Pid); 490 MS_U32 NDS_RASP_SetCallBack(MS_U32 u32RASPEng, P_NDSRASP_Callback pfCallback); 491 MS_U32 NDS_RASP_Set_EventNotify(MS_U32 u32RASPEng,P_DrvRASP_EventCB CallBackFun); 492 MS_BOOL NDS_RASP_SetEvent_Threshold(MS_U32 u32RASPEng,MS_U8 u8Threshold /*!!! Maximum value is 31 !!!*/); 493 MS_BOOL NDS_RASP_SetTime_Timeout(MS_U32 u32RASPEng,TIME_WATERMARK_e timeout); 494 495 MS_U32 NDS_RASP_SetECMTimeStamp(MS_U32 u32RASPEng,MS_U32 u32Stamp); 496 MS_U32 NDS_RASP_GetECMTimeStamp(MS_U32 u32RASPEng,MS_U32 * u32Stamp); 497 498 MS_BOOL NDS_RASP_SetEventCounter(MS_U32 RaspEng,MS_U32 ValueInitial); 499 MS_BOOL NDS_RASP_SetEventTimer(MS_U32 RaspEng,MS_U32 ValueInitial); 500 501 #ifdef __cplusplus 502 } // closing brace for extern "C" 503 #endif 504 #endif // _DRVRASP_H_ 505