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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 /////////////////////////////////////////////////////////////////////////////////////////////////// 96 /// 97 /// @file drvAVD_v2.h 98 /// @brief AVD Driver utopia 2.0 Interface 99 /// @author MStar Semiconductor Inc. 100 /////////////////////////////////////////////////////////////////////////////////////////////////// 101 102 #include "drvAVD.h" 103 104 #ifndef _DRV_AVD_V2_H_ 105 #define _DRV_AVD_V2_H_ 106 107 //------------------------------------------------------------------------------------------------- 108 // Macro and Define 109 //------------------------------------------------------------------------------------------------- 110 111 #ifdef MS_DEBUG 112 #define AVD_DRV_DEBUG 1 113 #else 114 #define AVD_DRV_DEBUG 0 115 #endif 116 117 #if 0 118 #define MSIF_AVD_LIB_CODE {'A','V','D','_'} //Lib code 119 #define MSIF_AVD_LIBVER {'1','1'} //LIB version 120 #define MSIF_AVD_BUILDNUM {'0','0' } //Build Number 121 #define MSIF_AVD_CHANGELIST {'0','0','6','1','6','9','9','1'} //P4 ChangeList Number 122 123 #define AVD_VER /* Character String for DRV/API version */ \ 124 MSIF_TAG, /* 'MSIF' */ \ 125 MSIF_CLASS, /* '00' */ \ 126 MSIF_CUS, /* 0x0000 */ \ 127 MSIF_MOD, /* 0x0000 */ \ 128 MSIF_CHIP, \ 129 MSIF_CPU, \ 130 MSIF_AVD_LIB_CODE, /* IP__ */ \ 131 MSIF_AVD_LIBVER, /* 0.0 ~ Z.Z */ \ 132 MSIF_AVD_BUILDNUM, /* 00 ~ 99 */ \ 133 MSIF_AVD_CHANGELIST, /* CL# */ \ 134 MSIF_OS 135 136 // video decoder status 137 #define VD_SYNC_LOCKED ((BIT_(15))) 138 #define VD_HSYNC_LOCKED ((BIT_(14))) 139 #define VD_INTERLACED ((BIT_(13))) 140 #define VD_VSYNC_50HZ ((BIT_(12))) 141 #define VD_RESET_ON ((BIT_(11))) 142 #define VD_COLOR_LOCKED ((BIT_(10))) 143 #define VD_PAL_SWITCH ((BIT_(9))) 144 #define VD_FSC_TYPE ((BIT_(7))|(BIT_(6))|(BIT_(5))) 145 #define VD_FSC_3579 ((BIT_(6))) // NTSC 146 #define VD_FSC_3575 ((BIT_(7))) // PAL(M) 147 #define VD_FSC_3582 ((BIT_(7))|(BIT_(6))) // PAL(Nc) 148 #define VD_FSC_4433 (0) // PAL or NTSC443 149 #define VD_FSC_4285 (BIT_(5)) // SECAM 150 #define VD_VCR_MODE (BIT_(4)) 151 #define VD_VCR_PAUSE (BIT_(3)) 152 #define VD_MACROVISION (BIT_(2)) 153 #define VD_BURST_ON (BIT_(1)) 154 #define VD_STATUS_RDY (BIT_(0)) 155 #define VD_MODE_DETECT_MASK (VD_SYNC_LOCKED|VD_HSYNC_LOCKED|VD_VSYNC_50HZ|VD_FSC_TYPE|VD_RESET_ON) // 20100331 remove BURST check first because too many burst on/off issues 156 157 // Gain Control (Auto/Fix/Mix) Define 158 #define VD_USE_FIX_GAIN 0 159 #define VD_USE_AUTO_GAIN 1 160 // Gain Control (Auto/Fix/Mix) Define 161 //#define AVD_AGC_ENABLE 0x00 162 //#define AVD_AGC_DISABLE 0x03 163 164 165 #define IS_BITS_SET(val, bits) (((val)&(bits)) == (bits)) 166 #define VD_MODE_STANDARD_MASK (VD_VSYNC_50HZ | VD_PAL_SWITCH | VD_FSC_TYPE | VD_STATUS_RDY) 167 168 #define FSC_AUTO_DET_ENABLE 0x00 169 #define FSC_AUTO_DET_DISABLE 0x01 170 171 #define VD_USE_FB 0 172 173 // VD Check Hsync Thresholdffff 174 #define VD_CHK_HSYNC_WAIT 1 // ms 175 #define VD_CHK_HSYNC_CONT 60//40 // timeout=VD_CHK_HSYNC_CONT*VD_CHK_HSYNC_WAIT=20ms 176 #define VD_CHK_HSYNC_OK_THR 2 //7 177 #define VD_CHK_DEBOUNCE_WAIT 20 // ms 178 #define VD_CHK_DEBOUNCE_CONT 40 // timeout=VD_CHK_COLOR_CONT*VD_CHK_COLOR_WAIT=800ms 179 #define VD_CHK_NSPL_WAIT 1 //ms 180 #define VD_CHK_NSPL_CONT 500 //timeout=VD_CHK_NSPL_WAIT*VD_CHK_NSPL_CONT=400ms 181 #define VD_CHK_NSPL_OK_THR 20//10 182 #define VD_CHK_VideoSys_CONT 250 //timeout=VD_CHK_NSPL_WAIT*VD_CHK_NSPL_CONT=400ms 183 184 #define DSP_VER_OFFSET 255 185 186 //----------------AVD Patch flag item-------------------------------------------------------------------------- 187 #define AVD_PATCH_NONE 0 188 #define AVD_PATCH_NTSC_50 BIT_(0) 189 #define AVD_PATCH_FINE_TUNE_FH_DOT BIT_(1) 190 #define AVD_PATCH_FINE_TUNE_COMB_F2 BIT_(2) 191 #define AVD_PATCH_FINE_TUNE_3D_COMB BIT_(3) 192 #define AVD_PATCH_FINE_TUNE_FSC_SHIFT BIT_(4) 193 #define AVD_PATCH_NON_STANDARD_VTOTAL BIT_(5) 194 #define AVD_PATCH_FINE_TUNE_STILL_IMAGE BIT_(6) 195 196 #define AVD_PATCH_HTOTAL_1135_MUL_15 0 197 #define AVD_PATCH_HTOTAL_1135 BIT_(8) 198 #define AVD_PATCH_HTOTAL_DYNAMIC BIT_(9) 199 #define AVD_PATCH_HTOTAL_USER (BIT_(9)|BIT_(8)) 200 #define AVD_PATCH_HTOTAL_MASK (BIT_(9)|BIT_(8)) 201 #define AVD_PATCH_SCART_SVIDEO (BIT_(10)) 202 #define AVD_PATCH_CVBS_NEGATIVESIG (BIT_(11)) 203 204 #define AVD_PATCH_DISABLE_PWS BIT_(24) // used to store ENABLE_PWS 205 206 //------------------------------------------------------------------------------------------------- 207 // Type and Structure 208 //------------------------------------------------------------------------------------------------- 209 typedef enum 210 { 211 AVD_LOAD_CODE_BDMA_FROM_SPI, 212 AVD_LOAD_CODE_BDMA_FROM_DRAM, 213 AVD_LOAD_CODE_BYTE_WRITE, 214 } AVD_LoadCodeType; 215 216 typedef enum 217 { 218 DEMODE_NORMAL = 0, 219 DEMODE_MSTAR_VIF = 1, 220 DEMODE_MSTAR_VIF_MSB1210 = 2, 221 } AVD_DemodType; 222 223 typedef enum 224 { 225 E_VIDEO_SYSTEM_ATSC, 226 E_VIDEO_SYSTEM_DVB 227 } AVD_VideoSystem; 228 229 typedef enum 230 { 231 E_VIDEO_FQ_NOSIGNAL = 0, // Video Frequency No signal 232 E_VIDEO_FQ_50Hz = 50, // Video Frequency 50Hz 233 E_VIDEO_FQ_60Hz = 60 // Video Frequency 60Hz 234 } AVD_VideoFreq; 235 236 typedef enum 237 { 238 E_FREERUN_FQ_AUTO = 0x00, 239 E_FREERUN_FQ_50Hz = 0x01, 240 E_FREERUN_FQ_60Hz = 0x02, 241 E_FREERUN_FQ_MAX 242 } AVD_FreeRunFreq; 243 244 typedef enum 245 { 246 E_VIDEOSTANDARD_PAL_BGHI = 0x00, // Video standard PAL BGHI 247 E_VIDEOSTANDARD_NTSC_M = 0x01, // Video standard NTSC M 248 E_VIDEOSTANDARD_SECAM = 0x02, // Video standard SECAM 249 E_VIDEOSTANDARD_NTSC_44 = 0x03, // Video standard NTSC 44 250 E_VIDEOSTANDARD_PAL_M = 0x04, // Video standard PAL M 251 E_VIDEOSTANDARD_PAL_N = 0x05, // Video standard PAL N 252 E_VIDEOSTANDARD_PAL_60 = 0x06, // Video standard PAL 60 253 E_VIDEOSTANDARD_NOTSTANDARD = 0x07, // NOT Video standard 254 E_VIDEOSTANDARD_AUTO = 0x08, // Video standard AUTO 255 E_VIDEOSTANDARD_MAX // Max Number 256 } AVD_VideoStandardType; 257 258 typedef enum 259 { 260 E_INPUT_SOURCE_INVALID = 0x00, // Video source Invalid 261 E_INPUT_SOURCE_ATV = 0x01, // Video source ATV 262 E_INPUT_SOURCE_CVBS1 = 0x02, // Video source CVBS 1 263 E_INPUT_SOURCE_CVBS2 = 0x03, // Video source CVBS 2 264 E_INPUT_SOURCE_CVBS3 = 0x04, // Video source CVBS 2 265 E_INPUT_SOURCE_SVIDEO1 = 0x05, // Video source SVIDEO 1 266 E_INPUT_SOURCE_SVIDEO2 = 0x06, // Video source SVIDEO 2 267 E_INPUT_SOURCE_SCART1 = 0x07, // Video source SCART 1 268 E_INPUT_SOURCE_SCART2 = 0x08, // Video source SCART 2 269 E_INPUT_SOURCE_YPbPr = 0x09, // Video source YPbPr 270 E_INPUT_SOURCE_THROUGH_3DCOMB = 0x50, // Video source through 3D Comb 271 E_INPUT_SOURCE_THROUGH_3DCOMB_ATV = (E_INPUT_SOURCE_THROUGH_3DCOMB | E_INPUT_SOURCE_ATV), // through 3D Comb ATV 272 E_INPUT_SOURCE_THROUGH_3DCOMB_CVBS1 = (E_INPUT_SOURCE_THROUGH_3DCOMB | E_INPUT_SOURCE_CVBS1),// through 3D Comb CVBS1 273 E_INPUT_SOURCE_THROUGH_3DCOMB_CVBS2 = (E_INPUT_SOURCE_THROUGH_3DCOMB | E_INPUT_SOURCE_CVBS2),// through 3D Comb CVBS2 274 E_INPUT_SOURCE_THROUGH_3DCOMB_SCART1 = (E_INPUT_SOURCE_THROUGH_3DCOMB | E_INPUT_SOURCE_SCART1),// through 3D Comb SCART1 275 E_INPUT_SOURCE_THROUGH_3DCOMB_SCART2 = (E_INPUT_SOURCE_THROUGH_3DCOMB | E_INPUT_SOURCE_SCART2),// through 3D Comb SCART2 276 E_INPUT_SOURCE_MAX = 0x60 277 } AVD_InputSourceType; 278 279 /// Auto AV Source type 280 typedef enum 281 { 282 E_AUTOAV_SOURCE_1 = E_INPUT_SOURCE_SCART1, // Auto AV source SCART 1 283 E_AUTOAV_SOURCE_2 = E_INPUT_SOURCE_SCART2, // Auto AV source SCART 2 284 E_AUTOAV_SOURCE_ALL = 0xFF // Auto AV source ALL 285 } AVD_AutoAVSourceType; 286 287 typedef enum // 0x2580[5:4] 288 { 289 SCART_FB_NONE = 0x00, 290 SCART_FB0, 291 SCART_FB1, 292 SCART_FB2, 293 } AVD_INPUT_SCART_FB; 294 295 typedef enum 296 { 297 E_ATV_CLK_ORIGIN_43P2MHZ = 0x00, 298 E_ATV_CLK_TYPE1_42MHZ = 0x01, 299 E_ATV_CLK_TYPE2_44P4MHZ = 0x02, 300 }AVD_ATV_CLK_TYPE; 301 302 typedef struct 303 { 304 MS_U8 u8DetectWinBeforeLock; 305 MS_U8 u8DetectWinAfterLock; 306 MS_U8 u8CNTRFailBeforeLock; 307 MS_U8 u8CNTRSyncBeforeLock; 308 MS_U8 u8CNTRSyncAfterLock; 309 } VD_HSYNC_SENSITIVITY; 310 311 typedef enum 312 { 313 AVD_DBGLV_NONE, // disable all the debug message 314 AVD_DBGLV_INFO, // information 315 AVD_DBGLV_NOTICE, // normal but significant condition 316 AVD_DBGLV_WARNING, // warning conditions 317 AVD_DBGLV_ERR, // error conditions 318 AVD_DBGLV_CRIT, // critical conditions 319 AVD_DBGLV_ALERT, // action must be taken immediately 320 AVD_DBGLV_EMERG, // system is unusable 321 AVD_DBGLV_DEBUG, // debug-level messages 322 } AVD_DbgLv; 323 324 typedef struct 325 { 326 // register init 327 MS_U8 *u8VdDecInitializeExt; // TODO use system variable type 328 329 MS_U32 u32XTAL_Clock; 330 AVD_LoadCodeType eLoadCodeType; 331 MS_U32 u32VD_DSP_Code_Address; 332 MS_U8 *pu8VD_DSP_Code_Address; 333 MS_U32 u32VD_DSP_Code_Len; 334 // VIF related 335 AVD_DemodType eDemodType; 336 337 // afec related 338 MS_U16 u16VDDSPBinID; 339 MS_U8 bRFGainSel; 340 MS_U8 bAVGainSel; 341 MS_U8 u8RFGain; 342 MS_U8 u8AVGain; 343 MS_U32 u32VDPatchFlag; 344 MS_U8 u8ColorKillHighBound; 345 MS_U8 u8ColorKillLowBound; 346 MS_U8 u8SwingThreshold; 347 VD_HSYNC_SENSITIVITY eVDHsyncSensitivityNormal; 348 VD_HSYNC_SENSITIVITY eVDHsyncSensitivityTuning; 349 350 // comb related 351 MS_U32 u32COMB_3D_ADR; 352 MS_U32 u32COMB_3D_LEN; 353 354 } VD_INITDATA; 355 356 typedef enum 357 { 358 E_AVD_FAIL=0, 359 E_AVD_OK=1 360 } AVD_Result; 361 362 363 typedef struct 364 { 365 AVD_InputSourceType eVDInputSource; 366 AVD_VideoStandardType eVideoSystem; 367 AVD_VideoStandardType eLastStandard; 368 MS_U8 u8AutoDetMode; 369 MS_U16 u16CurVDStatus; 370 MS_U8 u8AutoTuningIsProgress; 371 } AVD_Info; 372 373 typedef struct 374 { 375 MS_U8 u8Threshold1; 376 MS_U8 u8Threshold2; 377 MS_U8 u8Threshold3; 378 MS_U8 u8Threshold4; 379 380 MS_U8 u8Str1_COMB37; 381 MS_U8 u8Str1_COMB38; 382 MS_U8 u8Str1_COMB7C; 383 MS_U8 u8Str1_COMBED; 384 385 MS_U8 u8Str2_COMB37; 386 MS_U8 u8Str2_COMB38; 387 MS_U8 u8Str2_COMB7C; 388 MS_U8 u8Str2_COMBED; 389 390 MS_U8 u8Str3_COMB37; 391 MS_U8 u8Str3_COMB38; 392 MS_U8 u8Str3_COMB7C; 393 MS_U8 u8Str3_COMBED; 394 395 MS_BOOL bMessageOn; 396 } AVD_Still_Image_Param; 397 398 typedef enum 399 { 400 E_FACTORY_PARA_AFEC_D4, 401 E_FACTORY_PARA_AFEC_D8, 402 E_FACTORY_PARA_AFEC_D5_BIT2, 403 E_FACTORY_PARA_AFEC_D9_BIT0, 404 E_FACTORY_PARA_AFEC_A0, 405 E_FACTORY_PARA_AFEC_A1, 406 E_FACTORY_PARA_AFEC_66_BIT67, 407 E_FACTORY_PARA_AFEC_6E_BIT7654, 408 E_FACTORY_PARA_AFEC_6E_BIT3210, 409 E_FACTORY_PARA_AFEC_43, 410 E_FACTORY_PARA_AFEC_44, 411 E_FACTORY_PARA_AFEC_CB, 412 E_FACTORY_PARA_AFEC_CF_BIT2, 413 E_FACTORY_PARA_AFEC_D5_BIT3, 414 E_FACTORY_PARA_AFEC_MAX 415 }AVD_Factory_Para; 416 #endif 417 418 // collect global variable into _AVD_RESOURCE_PRIVATE 201303 weicheng 419 typedef struct DLL_PACKED _AVD_RESOURCE_PRIVATE 420 { 421 MS_BOOL _bShiftClkFlag; 422 MS_BOOL _b2d3dautoflag; 423 MS_BOOL _bSTRFlag; 424 425 MS_U8 _u8HtotalDebounce; 426 MS_U8 _u8AutoDetMode; 427 MS_U8 _u8AfecD4Factory; 428 MS_U8 _u8Comb10Bit3Flag; 429 MS_U8 _u8Comb57; 430 MS_U8 _u8Comb58; 431 MS_U8 _u8Comb5F; 432 MS_U8 _u8SCARTSwitch; // 0: CVBS, 1:Svideo; 433 MS_U8 _u8SCARTPrestandard; 434 MS_U8 _u8AutoTuningIsProgress; 435 436 MS_U16 _u16CurVDStatus; 437 MS_U16 _u16DataH[3]; 438 MS_U16 _u16LatchH; 439 MS_U16 _u16Htt_UserMD; 440 MS_U16 _u16DPL_MSB; 441 MS_U16 _u16DPL_LSB; 442 MS_U32 u32VDPatchFlagStatus; 443 MS_U32 _u32VideoSystemTimer; 444 MS_U32 _u32SCARTWaitTime; 445 MS_S32 _s32AVD_Mutex; 446 447 AVD_VideoStandardType _eVideoSystem; 448 AVD_VideoStandardType _eForceVideoStandard; 449 AVD_VideoStandardType _eLastStandard; 450 AVD_InputSourceType _eVDInputSource; 451 VD_INITDATA g_VD_InitData; 452 AVD_ATV_CLK_TYPE gShiftMode; 453 AVD_Still_Image_Param g_stillImageParam; 454 455 #if AVD_DRV_DEBUG 456 MS_U32 u32PreVDPatchFlagStatus; 457 AVD_DbgLv _u8AVDDbgLevel; 458 #endif 459 #ifndef MSOS_TYPE_LINUX 460 MS_U16 u16PreVtotal; 461 #endif 462 463 }AVD_RESOURCE_PRIVATE; 464 465 typedef enum { 466 MDrv_CMD_AVD_Init, 467 MDrv_CMD_AVD_Exit, 468 MDrv_CMD_AVD_ResetMCU, 469 MDrv_CMD_AVD_FreezeMCU, 470 MDrv_CMD_AVD_Scan_HsyncCheck, 471 MDrv_CMD_AVD_StartAutoStandardDetection, 472 MDrv_CMD_AVD_ForceVideoStandard, 473 MDrv_CMD_AVD_3DCombSpeedup, 474 MDrv_CMD_AVD_LoadDSP, 475 MDrv_CMD_AVD_BackPorchWindowPositon, 476 MDrv_CMD_AVD_MBX_ReadByteByVDMbox, 477 478 MDrv_CMD_AVD_SetFlag, 479 MDrv_CMD_AVD_SetRegValue, 480 MDrv_CMD_AVD_SetRegFromDSP, 481 MDrv_CMD_AVD_SetInput, 482 MDrv_CMD_AVD_SetVideoStandard, 483 MDrv_CMD_AVD_SetChannelChange, 484 MDrv_CMD_AVD_SetHsyncDetectionForTuning, 485 MDrv_CMD_AVD_Set3dComb, 486 MDrv_CMD_AVD_SetShiftClk, 487 MDrv_CMD_AVD_SetFreerunPLL, 488 MDrv_CMD_AVD_SetFreerunFreq, 489 MDrv_CMD_AVD_SetFactoryPara, 490 MDrv_CMD_AVD_Set_Htt_UserMD, 491 MDrv_CMD_AVD_SetDbgLevel, 492 MDrv_CMD_AVD_SetPQFineTune, 493 MDrv_CMD_AVD_Set3dCombSpeed, 494 MDrv_CMD_AVD_SetStillImageParam, 495 MDrv_CMD_AVD_SetAFECD4Factory, 496 MDrv_CMD_AVD_Set2D3DPatchOnOff, 497 MDrv_CMD_AVD_SetAutoFineGainToFixed, 498 499 MDrv_CMD_AVD_GetFlag, 500 MDrv_CMD_AVD_GetRegValue, 501 MDrv_CMD_AVD_GetStatus, 502 MDrv_CMD_AVD_GetNoiseMag, 503 MDrv_CMD_AVD_GetVTotal, 504 MDrv_CMD_AVD_GetStandardDetection, 505 MDrv_CMD_AVD_GetLastDetectedStandard, 506 MDrv_CMD_AVD_GetCaptureWindow, 507 MDrv_CMD_AVD_GetVerticalFreq, 508 MDrv_CMD_AVD_GetHsyncEdge, 509 MDrv_CMD_AVD_GetDSPFineGain, 510 MDrv_CMD_AVD_GetDSPVersion, 511 MDrv_CMD_AVD_GetLibVer, 512 MDrv_CMD_AVD_GetInfo, 513 MDrv_CMD_AVD_IsSyncLocked, 514 MDrv_CMD_AVD_IsSignalInterlaced, 515 MDrv_CMD_AVD_IsColorOn, 516 MDrv_CMD_AVD_SetPowerState, 517 MDrv_CMD_AVD_GetMacroVisionDetect, 518 MDrv_CMD_AVD_GetCGMSDetect, 519 MDrv_CMD_AVD_SetBurstWinStart, 520 MDrv_CMD_AVD_AliveCheck, 521 MDrv_CMD_AVD_IsLockAudioCarrier, 522 } eAvdIoctlOpt; 523 524 typedef struct DLL_PACKED _AVD_INIT 525 { 526 VD_INITDATA pVD_InitData; 527 MS_U32 u32InitDataLen; 528 AVD_Result pVD_Result; 529 }AVD_INIT, *PAVD_INIT; 530 531 typedef struct DLL_PACKED _AVD_LOADDSP 532 { 533 MS_U8 *pu8VD_DSP; 534 MS_U32 len; 535 }AVD_LOADDSP, *PAVD_LOADDSP; 536 537 typedef struct DLL_PACKED _AVD_BACKPORCHWINPOS 538 { 539 MS_BOOL bEnable ; 540 MS_U8 u8Value; 541 }AVD_BACKPORCHWINPOS, *PAVD_BACKPORCHWINPOS; 542 543 typedef struct DLL_PACKED _AVD_SETREGVALUE 544 { 545 MS_U16 u16Addr; 546 MS_U8 u8Value; 547 }AVD_SETREGVALUE, *PAVD_SETREGVALUE; 548 549 typedef struct DLL_PACKED _AVD_SETINPUT 550 { 551 AVD_InputSourceType eSource; 552 MS_U8 u8ScartFB; 553 MS_BOOL bEnable; 554 }AVD_SETINPUT, *PAVD_SETINPUT; 555 556 typedef struct DLL_PACKED _AVD_SETVIDEOSTANDARD 557 { 558 AVD_VideoStandardType eStandard; 559 MS_BOOL bIsInAutoTuning; 560 MS_BOOL bEnable; 561 }AVD_SETVIDEOSTANDARD, *PAVD_SETVIDEOSTANDARD; 562 563 typedef struct DLL_PACKED _AVD_SETSHIFTCLK 564 { 565 MS_BOOL bEnable; 566 AVD_ATV_CLK_TYPE eShiftMode; 567 }AVD_SETSHIFTCLK, *PAVD_SETSHIFTCLK; 568 569 typedef struct DLL_PACKED _AVD_SETFACTORYPARA 570 { 571 AVD_Factory_Para FactoryPara; 572 MS_U8 u8Value; 573 }AVD_SETFACTORYPARA, *PAVD_SETFACTORYPARA; 574 575 typedef struct DLL_PACKED _AVD_SET3DCOMBSPEED 576 { 577 MS_U8 u8COMB57; 578 MS_U8 u8COMB58; 579 }AVD_SET3DCOMBSPEED, *PAVD_SET3DCOMBSPEED; 580 581 typedef struct DLL_PACKED _AVD_GETCAPTUREWINDOW 582 { 583 void *stCapWin; 584 AVD_VideoStandardType eVideoStandardType; 585 }AVD_GETCAPTUREWINDOW, *PAVD_GETCAPTUREWINDOW; 586 587 typedef struct DLL_PACKED _AVD_GETSTANDARDDETECTION 588 { 589 AVD_VideoStandardType VideoStandardType; 590 MS_U16 vdLatchStatus; 591 }AVD_GETSTANDARDDETECTION, *PAVD_GETSTANDARDDETECTION; 592 593 typedef struct DLL_PACKED _AVD_SCANHSYNCCHECK 594 { 595 MS_U8 u8HtotalTolerance; 596 MS_U16 u16ScanHsyncCheck; 597 }AVD_SCANHSYNCCHECK, *PAVD_SCANHSYNCCHECK; 598 599 typedef struct DLL_PACKED _AVD_FORCEVIDEOSTANDARD 600 { 601 AVD_VideoStandardType eVideoStandardType; 602 MS_BOOL bEnable; 603 }AVD_FORCEVIDEOSTANDARD, *PAVD_FORCEVIDEOSTANDARD; 604 605 typedef struct DLL_PACKED _AVD_MBXREADBYTEBYVDMBOX 606 { 607 MS_U8 u8Addr; 608 MS_U8 u8Value; 609 }AVD_MBXREADBYTEBYVDMBOX, *PAVD_MBXREADBYTEBYVDMBOX; 610 611 typedef struct DLL_PACKED _AVD_SETDBGLEVEL 612 { 613 AVD_DbgLv u8DbgLevel; 614 MS_BOOL bEnable; 615 }AVD_SETDBGLEVEL, *PAVD_SETDBGLEVEL; 616 617 typedef struct DLL_PACKED _AVD_GETREGVALUE 618 { 619 MS_U16 u16Addr; 620 MS_U8 u8Value; 621 }AVD_GETREGVALUE, *PAVD_GETREGVALUE; 622 623 typedef struct DLL_PACKED _AVD_SETPOWERSTATE 624 { 625 EN_POWER_MODE u16PowerState; 626 MS_U32 u32Value; 627 }AVD_SETPOWERSTATE, *PAVD_SETPOWERSTATE; 628 629 typedef struct DLL_PACKED _AVD_GETLIBVER 630 { 631 const MSIF_Version **ppVersion; 632 AVD_Result eAVDResult; 633 }AVD_GETLIBVER, *PAVD_GETLIBVER; 634 635 typedef struct DLL_PACKED _AVD_COPYTOUSER 636 { 637 MS_BOOL bEnable; 638 MS_U8 u8Value; 639 MS_U16 u16Value; 640 MS_U32 u32Value; 641 AVD_VideoStandardType eVideoStandardType; 642 AVD_VideoFreq eVideoFreq; 643 AVD_Info eAVDInfo; 644 }AVD_COPYTOUSER, *PAVD_COPYTOUSER; 645 #endif // _DRV_AVD_V2_H_ 646