1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ 4 * Manorit Chawdhry <m-chawdhry@ti.com> 5 */ 6 7 #ifndef TI_SCI_H 8 #define TI_SCI_H 9 10 #include <compiler.h> 11 #include <stdint.h> 12 #include <util.h> 13 14 #include "ti_sci_protocol.h" 15 16 /** 17 * ti_sci_get_revision() - Get the revision of the SCI entity 18 * 19 * Updates the SCI information in the internal data structure. 20 * 21 * Return: 0 if all goes well, else appropriate error message 22 */ 23 int ti_sci_get_revision(struct ti_sci_msg_resp_version *rev_info); 24 25 /** 26 * Device control operations 27 * 28 * - ti_sci_device_get - Get access to device managed by TISCI 29 * - ti_sci_device_put - Release access to device managed by TISCI 30 * 31 * NOTE: for all these functions, the following are generic in nature: 32 * @id: Device Identifier 33 * 34 * Returns 0 for successful request, else returns corresponding error message. 35 * 36 * Request for the device - NOTE: the client MUST maintain integrity of 37 * usage count by balancing get_device with put_device. No refcounting is 38 * managed by driver for that purpose. 39 */ 40 int ti_sci_device_get(uint32_t id); 41 int ti_sci_device_put(uint32_t id); 42 43 /** 44 * ti_sci_set_fwl_region() - Request for configuring a firewall region 45 * 46 * @fwl_id: Firewall ID in question. fwl_id is defined in the TRM. 47 * @region: Region or channel number to set config info. This field 48 * is unused in case of a simple firewall and must be 49 * initialized to zero. In case of a region based 50 * firewall, this field indicates the region in question 51 * (index starting from 0). In case of a channel based 52 * firewall, this field indicates the channel in question 53 * (index starting from 0). 54 * @n_permission_regs: Number of permission registers to set 55 * @control: Contents of the firewall CONTROL register to set 56 * @permissions: Contents of the firewall PERMISSION register to set 57 * @start_address: Contents of the firewall START_ADDRESS register to set 58 * @end_address: Contents of the firewall END_ADDRESS register to set 59 * 60 * Return: 0 if all went well, else returns appropriate error value. 61 */ 62 int ti_sci_set_fwl_region(uint16_t fwl_id, uint16_t region, 63 uint32_t n_permission_regs, uint32_t control, 64 const uint32_t permissions[FWL_MAX_PRIVID_SLOTS], 65 uint64_t start_address, uint64_t end_address); 66 /** 67 * ti_sci_cmd_get_fwl_region() - Request for getting a firewall region 68 * 69 * @fwl_id: Firewall ID in question. fwl_id is defined in the TRM. 70 * @region: Region or channel number to set config info. This field 71 * is unused in case of a simple firewall and must be 72 * initialized to zero. In case of a region based 73 * firewall, this field indicates the region in question 74 * (index starting from 0). In case of a channel based 75 * firewall, this field indicates the channel in question 76 * (index starting from 0). 77 * @n_permission_regs: Region or channel number to set config info 78 * @control: Contents of the firewall CONTROL register 79 * @permissions: Contents of the firewall PERMISSION register 80 * @start_address: Contents of the firewall START_ADDRESS register 81 * @end_address: Contents of the firewall END_ADDRESS register 82 * 83 * Return: 0 if all went well, else returns appropriate error value. 84 */ 85 int ti_sci_get_fwl_region(uint16_t fwl_id, uint16_t region, 86 uint32_t n_permission_regs, uint32_t *control, 87 uint32_t permissions[FWL_MAX_PRIVID_SLOTS], 88 uint64_t *start_address, uint64_t *end_address); 89 /** 90 * ti_sci_change_fwl_owner() - Request for changing a firewall owner 91 * 92 * @fwl_id: Firewall ID in question. fwl_id is defined in the TRM. 93 * @region: Region or channel number to set config info. This field 94 * is unused in case of a simple firewall and must be 95 * initialized to zero. In case of a region based 96 * firewall, this field indicates the region in question 97 * (index starting from 0). In case of a channel based 98 * firewall, this field indicates the channel in question 99 * (index starting from 0). 100 * @owner_index: New owner index to transfer ownership to 101 * @owner_privid: New owner priv-ID returned by DMSC. This field is 102 * currently initialized to zero by DMSC. 103 * @owner_permission_bits: New owner permission bits returned by DMSC. This 104 * field is currently initialized to zero by DMSC. 105 * 106 * Return: 0 if all went well, else returns appropriate error value. 107 */ 108 int ti_sci_change_fwl_owner(uint16_t fwl_id, uint16_t region, 109 uint8_t owner_index, uint8_t *owner_privid, 110 uint16_t *owner_permission_bits); 111 112 /** 113 * ti_sci_get_dkek() - Get the DKEK 114 * @sa2ul_instance: SA2UL instance to get key 115 * @context: Context string input to KDF 116 * @label: Label string input to KDF 117 * @dkek: Returns with DKEK populated 118 * 119 * Updates the DKEK the internal data structure. 120 * 121 * Return: 0 if all goes well, else appropriate error message 122 */ 123 int ti_sci_get_dkek(uint8_t sa2ul_instance, 124 const char *context, const char *label, 125 uint8_t dkek[SA2UL_DKEK_KEY_LEN]); 126 127 /** 128 * ti_sci_read_otp_mmr() - Get the Extended OTP 129 * @mmr_idx: 32-bit MMR index 130 * @val: Value of the 32-bit MMR 131 * 132 * Reads the extended OTP bits from efuse 133 * 134 * Return: 0 if all goes well, else appropriate error message 135 */ 136 int ti_sci_read_otp_mmr(uint8_t mmr_idx, uint32_t *val); 137 138 /** 139 * ti_sci_write_otp_row() - Write the extended OTP row 140 * @row_idx: Index of the OTP row. Zero indexing 141 * @row_val: Value to be written 142 * @row_mask: Mask bits for row_val to be written 143 * 144 * Writes a Row in the extended OTP field 145 * 146 * Return: 0 if all goes well, else appropriate error message 147 */ 148 int ti_sci_write_otp_row(uint8_t row_idx, uint32_t row_val, uint32_t row_mask); 149 150 /** 151 * ti_sci_lock_otp_row - Locking the Extended OTP row 152 * @row_idx: Index of the OTP row. Zero indexing 153 * @hw_write_lock: Hardware write lock 154 * @hw_read_lock: Hardware read lock 155 * @row_soft_lock: Software write lock 156 * 157 * Lockes a Row in the extended OTP field to prevent read/writes 158 * 159 * Return: 0 if all goes well, else appropriate error message 160 */ 161 int ti_sci_lock_otp_row(uint8_t row_idx, uint8_t hw_write_lock, 162 uint8_t hw_read_lock, uint8_t row_soft_lock); 163 164 /** 165 * ti_sci_set_swrev - Write Software Revision 166 * @identifier: One of the entries from enum tisci_otp_revision_identifier 167 * @swrev: Software Revision 168 * 169 * Writes the Software Revision in OTP for the specified identifier 170 * 171 * Return: 0 if all goes well, else appropriate error message 172 */ 173 int ti_sci_set_swrev(uint8_t identifier, uint32_t swrev); 174 175 /** 176 * ti_sci_get_swrev - Read Software Revision 177 * @swrev: Software Revision 178 * 179 * Reads the software revision. The System Firmware currently supports reading 180 * only the software revision from the Secure Board Configuration. 181 * 182 * Return: 0 if all goes well, else appropriate error message 183 */ 184 int ti_sci_get_swrev(uint32_t *swrev); 185 186 /** 187 * ti_sci_get_keycnt_keyrev - Read Key Count and Key Revision values 188 * @key_cnt: Key Count 189 * @key_rev: Key Revision 190 * 191 * Reads the Key Count and Key Revision in OTP 192 * 193 * Return: 0 if all goes well, else appropriate error message 194 */ 195 int ti_sci_get_keycnt_keyrev(uint32_t *key_cnt, uint32_t *key_rev); 196 197 /** 198 * ti_sci_set_keyrev - Write Key Revision 199 * @keyrev: Key Revision 200 * @cert_addr_lo: Lower 32 bit address of the dual signed certificate 201 * @cert_addr_hi: Higher 32 bit address of the dual signed certificate 202 * 203 * Writes the Key Revision in OTP 204 * 205 * Return: 0 if all goes well, else appropriate error message 206 */ 207 int ti_sci_set_keyrev(uint32_t keyrev, 208 uint32_t cert_addr_lo, 209 uint32_t cert_addr_hi); 210 211 /** 212 * ti_sci_init() - Basic initialization 213 * 214 * Return: 0 if all goes well, else appropriate error message 215 */ 216 int ti_sci_init(void); 217 218 #endif 219