1 /* SPDX-License-Identifier: BSD-2-Clause */
2 /*
3 * Copyright (c) 2016, Linaro Limited
4 * Copyright (c) 2014, STMicroelectronics International N.V.
5 * Copyright (c) 2026 Arm Limited
6 */
7
8 #ifndef __DRIVERS_GIC_H
9 #define __DRIVERS_GIC_H
10 #include <types_ext.h>
11 #include <kernel/interrupt.h>
12
13 #ifdef _CFG_ARM_V3_OR_V4
14 #define GICD_FRAME_SIZE (64 * 1024)
15 #define GICC_FRAME_SIZE (64 * 1024)
16 #define GICR_FRAME_SIZE (64 * 1024)
17 #else /* GICv2 and earlier */
18 #define GICD_FRAME_SIZE (4 * 1024)
19 #define GICC_FRAME_SIZE (4 * 1024)
20 #define GICR_FRAME_SIZE 0 /* Unsupported */
21 #endif
22
23 #define GIC_CPU_REG_SIZE GICC_FRAME_SIZE
24 #define GIC_DIST_REG_SIZE GICD_FRAME_SIZE
25 #ifdef _CFG_ARM_V3_OR_V4
26 /*
27 * The frames for each Redistributor are contiguous and are ordered as
28 * follows:
29 * 1. RD_base
30 * 2. SGI_base
31 *
32 * In GICv4, there are two additional 64KB frames:
33 * - A frame to control virtual LPIs. The base address of this frame is
34 * referred to as VLPI_base.
35 * - A reserved frame.
36 *
37 * The frames for each Redistributor are contiguous and are
38 * ordered as follows:
39 * 1. RD_base
40 * 2. SGI_base
41 * 3. VLPI_base
42 * 4. Reserved
43 */
44 #ifdef CFG_ARM_GICV4
45 #define GICR_FRAME_COUNT 4
46 #else /* CFG_ARM_GICV3 */
47 #define GICR_FRAME_COUNT 2
48 #endif
49 #define GIC_REDIST_REG_SIZE (GICR_FRAME_COUNT * GICR_FRAME_SIZE)
50 #else /* GICv2 and earlier */
51 #define GIC_REDIST_REG_SIZE 0 /* Unsupported */
52 #endif
53
54 #define GIC_PPI_BASE U(16)
55 #define GIC_SPI_BASE U(32)
56
57 #define GIC_SGI_TO_ITNUM(x) (x)
58 #define GIC_PPI_TO_ITNUM(x) ((x) + GIC_PPI_BASE)
59 #define GIC_SPI_TO_ITNUM(x) ((x) + GIC_SPI_BASE)
60
61 /*
62 * Default lowest ID for secure SGIs, note that this does not account for
63 * interrupts donated to non-secure world with gic_init_donate_sgi_to_ns().
64 */
65 #define GIC_SGI_SEC_BASE 8
66 /* Max ID for secure SGIs */
67 #define GIC_SGI_SEC_MAX 15
68 /* Default IRQ priority for SPIs in Non-Sec EL1 */
69 #define GIC_SPI_PRI_NS_EL1 0x50
70
71 /*
72 * The two gic_init() and gic_init_v3() functions initializes the struct
73 * gic_data which is then used by the other functions. These two functions
74 * also initializes the GIC and are only supposed to be called from the
75 * primary boot CPU.
76 */
77 void gic_init_v3(paddr_t gicc_base_pa, paddr_t gicd_base_pa,
78 paddr_t gicr_base_pa);
gic_init(paddr_t gicc_base_pa,paddr_t gicd_base_pa)79 static inline void gic_init(paddr_t gicc_base_pa, paddr_t gicd_base_pa)
80 {
81 gic_init_v3(gicc_base_pa, gicd_base_pa, 0);
82 }
83
84 /* Donates one of the secure SGIs to normal world */
85 void gic_init_donate_sgi_to_ns(size_t it);
86
87 /*
88 * Does per-CPU specific GIC initialization, should be called by all
89 * secondary CPUs when booting.
90 */
91 void gic_init_per_cpu(void);
92
93 /* Print GIC state to console */
94 void gic_dump_state(void);
95
96 /*
97 * Reassign one of the SPIs to normal world and set its priority to
98 * GIC_SPI_PRI_NS_EL1. Ensure that the interrupt is currently
99 * assigned to secure world and disabled when this function is called.
100 */
101 TEE_Result gic_spi_release_to_ns(size_t it);
102 #endif /*__DRIVERS_GIC_H*/
103