xref: /rk3399_ARM-atf/plat/mediatek/drivers/spm/common/dbg_ctrl.h (revision cf2df874cd09305ac7282fadb0fef6be597dfffb)
1 /*
2  * Copyright (c) 2025, Mediatek Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef DBG_CTRL_H
8 #define DBG_CTRL_H
9 
10 /* SPM_WAKEUP_MISC */
11 #define WAKE_MISC_TWAM		BIT(18)
12 #define WAKE_MISC_PCM_TIMER	BIT(19)
13 #define WAKE_MISC_CPU_WAKE	BIT(20)
14 
15 struct dbg_ctrl {
16 	uint32_t count;
17 	uint32_t duration;
18 	void *ext;
19 };
20 
21 enum dbg_ctrl_enum {
22 	DBG_CTRL_COUNT,
23 	DBG_CTRL_DURATION,
24 	DBG_CTRL_MAX,
25 };
26 
27 #endif /* DBG_CTRL_H */
28