1 /* 2 * Copyright (c) 2024-2025, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef CORTEX_A720_AE_H 8 #define CORTEX_A720_AE_H 9 10 #define CORTEX_A720_AE_MIDR U(0x410FD890) 11 12 /******************************************************************************* 13 * CPU Extended Control register specific definitions 14 ******************************************************************************/ 15 #define CORTEX_A720_AE_CPUECTLR_EL1 S3_0_C15_C1_4 16 17 /******************************************************************************* 18 * CPU Power Control register specific definitions 19 ******************************************************************************/ 20 #define CORTEX_A720_AE_CPUPWRCTLR_EL1 S3_0_C15_C2_7 21 #define CORTEX_A720_AE_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1) 22 23 #ifndef __ASSEMBLER__ 24 long check_erratum_cortex_a720_ae_3699562(long cpu_rev); 25 #endif /* __ASSEMBLER__ */ 26 27 #endif /* CORTEX_A720_AE_H */ 28