1# 2# Copyright (c) 2025-2026, Arm Limited. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7ifneq ($(AARCH32_INSTRUCTION_SET),$(filter $(AARCH32_INSTRUCTION_SET),A32 T32)) 8 $(error Error: Unknown AArch32 instruction set ${AARCH32_INSTRUCTION_SET}) 9endif 10 11# Check for ENABLE_RME that is replaced by ENABLE_FEAT_RME 12ifeq (${ENABLE_RME},1) 13 $(warning "ENABLE_RME will be deprecated. Use ENABLE_FEAT_RME=1 and ENABLE_RMM=1 instead.") 14endif 15 16# Make sure ENABLE_FEAT_RME configuration is valid 17ifneq (${ENABLE_FEAT_RME},0) 18 ifneq (${SEPARATE_CODE_AND_RODATA},1) 19 $(error ENABLE_FEAT_RME requires SEPARATE_CODE_AND_RODATA) 20 endif 21 22 ifneq (${ARCH},aarch64) 23 $(error ENABLE_FEAT_RME requires AArch64) 24 endif 25 26 ifeq ($(RESET_TO_BL2),0) 27 ifeq ($(ENABLE_FEAT_RME),2) 28 $(warning ENABLE_FEAT_RME=2 forces BL2 to run at EL3 even if FEAT_RME is not present at runtime) 29 endif 30 endif 31 32 ifeq ($(SPMC_AT_EL3),1) 33 $(error SPMC_AT_EL3 and ENABLE_FEAT_RME cannot both be enabled.) 34 endif 35 36 ifneq (${SPD}, none) 37 ifneq (${SPD}, spmd) 38 $(error ENABLE_FEAT_RME is incompatible with SPD=${SPD}. Use SPD=spmd) 39 endif 40 endif 41 42 ifeq ($(SPM_MM),1) 43 $(error SPM_MM and ENABLE_FEAT_RME cannot both be enabled.) 44 endif 45 46 $(warning "FEAT_RME is an experimental feature") 47else 48 ifeq (${ENABLE_FEAT_RME_GDI},1) 49 $(error ENABLE_FEAT_RME_GDI requires ENABLE_FEAT_RME) 50 endif 51endif 52 53# Make sure RMM configuration is valid 54ifeq (${ENABLE_RMM},1) 55 ifneq (${ENABLE_FEAT_RME},1) 56 $(error ENABLE_RMM requires ENABLE_FEAT_RME=1) 57 endif 58 59 $(warning "RMM is an experimental feature") 60endif 61 62ifeq (${CTX_INCLUDE_EL2_REGS}, 1) 63 ifeq (${SPD},none) 64 ifeq (${ENABLE_RMM},0) 65 $(error CTX_INCLUDE_EL2_REGS is available only when SPD \ 66 or RMM is enabled) 67 endif 68 endif 69endif 70 71################################################################################ 72# Verify RMM, FEAT_SCTLR2 and FEAT_TCR2 are enabled if FEAT_MEC is enabled. 73################################################################################ 74 75ifneq (${ENABLE_FEAT_MEC},0) 76 ifeq (${ENABLE_RMM},0) 77 $(error RMM must be enabled when FEAT_MEC is enabled.) 78 endif 79 ifeq (${ENABLE_FEAT_TCR2},0) 80 $(error FEAT_TCR2 must be enabled when FEAT_MEC is enabled.) 81 endif 82 ifeq (${ENABLE_FEAT_SCTLR2},0) 83 $(error FEAT_SCTLR2 must be enabled when FEAT_MEC is enabled.) 84 endif 85endif 86 87# Handle all invalid build configurations with SPMD usage. 88ifeq (${ENABLE_SPMD_LP}, 1) 89ifneq (${SPD},spmd) 90 $(error Error: ENABLE_SPMD_LP requires SPD=spmd.) 91endif 92 93ifeq ($(SPMC_AT_EL3),1) 94 $(error SPMC at EL3 not supported when enabling SPMD Logical partitions.) 95endif 96endif 97 98ifeq (${SUPPORT_SP_LIVE_ACTIVATION}, 1) 99ifeq (${LFA_SUPPORT}, 0) 100 $(error Error: SUPPORT_SP_LIVE_ACTIVATION requires LFA_SUPPORT=1) 101endif #(LFA_SUPPORT) 102ifeq (${ENABLE_SPMD_LP}, 0) 103 $(error Error: SUPPORT_SP_LIVE_ACTIVATION requires ENABLE_SPMD_LP=1) 104endif #(ENABLE_SPMD_LP) 105ifeq (${SPMD_SPM_AT_SEL2},0) 106 $(error Error: SUPPORT_SP_LIVE_ACTIVATION requires SPMD_SPM_AT_SEL2=1) 107endif #(SPMD_SPM_AT_SEL2) 108 $(warning SUPPORT_SP_LIVE_ACTIVATION is an experimental feature) 109endif #(SUPPORT_SP_LIVE_ACTIVATION) 110 111ifneq (${SPD},none) 112ifeq (${ARCH},aarch32) 113 $(error "Error: SPD is incompatible with AArch32.") 114endif 115ifdef EL3_PAYLOAD_BASE 116 $(warning "SPD and EL3_PAYLOAD_BASE are incompatible build options.") 117 $(warning "The SPD and its BL32 companion will be present but ignored.") 118endif 119ifeq (${SPD},spmd) 120ifeq ($(SPMD_SPM_AT_SEL2),1) 121 ifeq ($(SPMC_AT_EL3),1) 122 $(error SPM cannot be enabled in both S-EL2 and EL3.) 123 endif 124 ifeq ($(CTX_INCLUDE_SVE_REGS),1) 125 $(error SVE context management not needed with Hafnium SPMC.) 126 endif 127endif 128 129ifeq ($(SPMC_AT_EL3_SEL0_SP),1) 130 ifneq ($(SPMC_AT_EL3),1) 131 $(error SEL0 SP cannot be enabled without SPMC at EL3) 132 endif 133endif 134endif #(SPD=spmd) 135endif #(SPD!=none) 136 137# USE_DEBUGFS experimental feature recommended only in debug builds 138ifeq (${USE_DEBUGFS},1) 139 ifeq (${DEBUG},1) 140 $(warning DEBUGFS experimental feature is enabled.) 141 else 142 $(warning DEBUGFS experimental, recommended in DEBUG builds ONLY) 143 endif 144endif #(USE_DEBUGFS) 145 146# USE_SPINLOCK_CAS requires AArch64 build 147ifeq (${USE_SPINLOCK_CAS},1) 148 ifneq (${ARCH},aarch64) 149 $(error USE_SPINLOCK_CAS requires AArch64) 150 endif 151endif #(USE_SPINLOCK_CAS) 152 153ifdef EL3_PAYLOAD_BASE 154 ifdef PRELOADED_BL33_BASE 155 $(warning "PRELOADED_BL33_BASE and EL3_PAYLOAD_BASE are \ 156 incompatible build options. EL3_PAYLOAD_BASE has priority.") 157 endif 158 ifneq (${GENERATE_COT},0) 159 $(error "GENERATE_COT and EL3_PAYLOAD_BASE are incompatible \ 160 build options.") 161 endif 162 ifneq (${TRUSTED_BOARD_BOOT},0) 163 $(error "TRUSTED_BOARD_BOOT and EL3_PAYLOAD_BASE are \ 164 incompatible \ build options.") 165 endif 166endif #(EL3_PAYLOAD_BASE) 167 168ifeq (${NEED_BL33},yes) 169 ifdef EL3_PAYLOAD_BASE 170 $(warning "BL33 image is not needed when option \ 171 BL33_PAYLOAD_BASE is used and won't be added to the FIP file.") 172 endif 173 ifdef PRELOADED_BL33_BASE 174 $(warning "BL33 image is not needed when option \ 175 PRELOADED_BL33_BASE is used and won't be added to the FIP file.") 176 endif 177endif #(NEED_BL33) 178 179# When building for systems with hardware-assisted coherency, there's no need to 180# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. 181ifeq ($(HW_ASSISTED_COHERENCY)-$(USE_COHERENT_MEM),1-1) 182 $(error USE_COHERENT_MEM cannot be enabled with HW_ASSISTED_COHERENCY) 183endif 184 185#For now, BL2_IN_XIP_MEM is only supported when RESET_TO_BL2 is 1. 186ifeq ($(RESET_TO_BL2)-$(BL2_IN_XIP_MEM),0-1) 187 $(error "BL2_IN_XIP_MEM is only supported when RESET_TO_BL2 is enabled") 188endif 189 190# RAS_EXTENSION is deprecated, provide alternate build options 191ifeq ($(RAS_EXTENSION),1) 192 $(error "RAS_EXTENSION is now deprecated, please use ENABLE_FEAT_RAS \ 193 and HANDLE_EA_EL3_FIRST_NS instead") 194endif 195 196 197# When FAULT_INJECTION_SUPPORT is used, require that FEAT_RAS is enabled 198ifeq ($(FAULT_INJECTION_SUPPORT),1) 199 ifeq ($(ENABLE_FEAT_RAS),0) 200 $(error For FAULT_INJECTION_SUPPORT, ENABLE_FEAT_RAS must not be 0) 201 endif 202endif #(FAULT_INJECTION_SUPPORT) 203 204# DYN_DISABLE_AUTH can be set only when TRUSTED_BOARD_BOOT=1 205ifeq ($(DYN_DISABLE_AUTH), 1) 206 ifeq (${TRUSTED_BOARD_BOOT}, 0) 207 $(error "TRUSTED_BOARD_BOOT must be enabled for DYN_DISABLE_AUTH \ 208 to be set.") 209 endif 210endif #(DYN_DISABLE_AUTH) 211 212# SDEI_IN_FCONF is only supported when SDEI_SUPPORT is enabled. 213ifeq ($(SDEI_SUPPORT)-$(SDEI_IN_FCONF),0-1) 214 $(error "SDEI_IN_FCONF is only supported when SDEI_SUPPORT is enabled") 215endif 216 217# If pointer authentication is used in the firmware, make sure that all the 218# registers associated to it are also saved and restored. 219# Not doing it would leak the value of the keys used by EL3 to EL1 and S-EL1. 220ifneq ($(ENABLE_PAUTH),0) 221 ifeq ($(CTX_INCLUDE_PAUTH_REGS),0) 222 $(error Pointer Authentication requires CTX_INCLUDE_PAUTH_REGS to be enabled) 223 endif 224endif #(ENABLE_PAUTH) 225 226ifneq ($(CTX_INCLUDE_PAUTH_REGS),0) 227 ifneq (${ARCH},aarch64) 228 $(error CTX_INCLUDE_PAUTH_REGS requires AArch64) 229 endif 230endif #(CTX_INCLUDE_PAUTH_REGS) 231 232# Check ENABLE_FEAT_PAUTH_LR 233ifneq (${ENABLE_FEAT_PAUTH_LR},0) 234 235# Make sure PAUTH is enabled 236ifeq (${ENABLE_PAUTH},0) 237 $(error Error: PAUTH_LR cannot be used without PAUTH (see BRANCH_PROTECTION)) 238endif 239 240# Make sure SCTLR2 is enabled 241ifeq (${ENABLE_FEAT_SCTLR2},0) 242 $(error Error: PAUTH_LR cannot be used without ENABLE_FEAT_SCTLR2) 243endif 244 245ifneq (${ENABLE_FEAT_HACDBS},0) 246 ifeq (${ENABLE_FEAT_HDBSS},0) 247 $(error ENABLE_FEAT_HACDBS requires ENABLE_FEAT_HDBSS) 248 endif 249endif 250 251# FEAT_PAUTH_LR is only supported in aarch64 state 252ifneq (${ARCH},aarch64) 253 $(error ENABLE_FEAT_PAUTH_LR requires AArch64) 254endif 255 256endif # ${ENABLE_FEAT_PAUTH_LR} 257 258ifeq ($(FEATURE_DETECTION),1) 259 $(info FEATURE_DETECTION is an experimental feature) 260endif #(FEATURE_DETECTION) 261 262ifeq ($(FIRME_SUPPORT),1) 263 $(info FIRME_SUPPORT is an experimental feature) 264endif #(FIRME_SUPPORT) 265 266ifneq ($(ENABLE_SME2_FOR_NS), 0) 267 ifeq (${ENABLE_SME_FOR_NS}, 0) 268 $(warning "ENABLE_SME2_FOR_NS requires ENABLE_SME_FOR_NS also \ 269 to be set") 270 $(warning "Forced ENABLE_SME_FOR_NS=1") 271 override ENABLE_SME_FOR_NS := 1 272 endif 273endif #(ENABLE_SME2_FOR_NS) 274 275ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 276 ifeq (${ALLOW_RO_XLAT_TABLES}, 1) 277 $(error "ALLOW_RO_XLAT_TABLES requires translation tables \ 278 library v2") 279 endif 280 281 ifneq (${ENABLE_FEAT_RME},0) 282 $(error "ENABLE_FEAT_RME requires version 2 of the Translation \ 283 Tables Library") 284 endif 285endif #(ARM_XLAT_TABLES_LIB_V1) 286 287ifneq (${DECRYPTION_SUPPORT},none) 288 ifeq (${TRUSTED_BOARD_BOOT}, 0) 289 $(error TRUSTED_BOARD_BOOT must be enabled for DECRYPTION_SUPPORT \ 290 to be set) 291 endif 292endif #(DECRYPTION_SUPPORT) 293 294# Ensure that no Aarch64-only features are enabled in Aarch32 build 295ifeq (${ARCH},aarch32) 296 ifneq (${ENABLE_LTO},0) 297 $(error "ENABLE_LTO is not supported with ARCH=aarch32") 298 endif 299 ifneq (${EL3_EXCEPTION_HANDLING},0) 300 $(error "EL3_EXCEPTION_HANDLING is not supported outside BL31") 301 endif 302 303 ifeq (${CRASH_REPORTING},1) 304 $(error "CRASH_REPORTING is not supported with ARCH=aarch32") 305 endif 306 307 # SME/SVE only supported on AArch64 308 ifneq (${ENABLE_SME_FOR_NS},0) 309 $(error "ENABLE_SME_FOR_NS cannot be used with ARCH=aarch32") 310 endif 311 312 ifneq (${ENABLE_SVE_FOR_NS},0) 313 $(error "ENABLE_SVE_FOR_NS cannot be used with ARCH=aarch32") 314 endif 315 316 ifneq (${ENABLE_SPE_FOR_NS},0) 317 $(error "ENABLE_SPE_FOR_NS cannot be used with ARCH=aarch32") 318 endif 319 320 # BRBE is not supported in AArch32 321 ifneq (${ENABLE_BRBE_FOR_NS},0) 322 $(error "ENABLE_BRBE_FOR_NS cannot be used with ARCH=aarch32") 323 endif 324 325 # FEAT_RNG_TRAP is not supported in AArch32 326 ifneq (${ENABLE_FEAT_RNG_TRAP},0) 327 $(error "ENABLE_FEAT_RNG_TRAP cannot be used with ARCH=aarch32") 328 endif 329 330 ifneq (${ENABLE_FEAT_FPMR},0) 331 $(error "ENABLE_FEAT_FPMR cannot be used with ARCH=aarch32") 332 endif 333 334 ifeq (${ARCH_FEATURE_AVAILABILITY},1) 335 $(error "ARCH_FEATURE_AVAILABILITY cannot be used with ARCH=aarch32") 336 endif 337 # FEAT_MOPS is only supported on AArch64 338 ifneq (${ENABLE_FEAT_MOPS},0) 339 $(error "ENABLE_FEAT_MOPS cannot be used with ARCH=aarch32") 340 endif 341 ifneq (${ENABLE_FEAT_GCIE},0) 342 $(error "ENABLE_FEAT_GCIE cannot be used with ARCH=aarch32") 343 endif 344 ifneq (${ENABLE_FEAT_CPA2},0) 345 $(error "ENABLE_FEAT_CPA2 cannot be used with ARCH=aarch32") 346 endif 347 ifneq (${USE_SPINLOCK_CAS},0) 348 $(error "USE_SPINLOCK_CAS is not supported with ARCH=aarch32") 349 endif 350 ifneq (${PLATFORM_NODE_COUNT},1) 351 $(error "NUMA AWARE PER CPU is not supported with ARCH=aarch32") 352 endif 353 ifeq (${ENABLE_FEAT_CRYPTO},1) 354 $(error "ENABLE_FEAT_CRYPTO cannot be used with ARCH=aarch32") 355 endif 356 ifeq (${ENABLE_FEAT_CRYPTO_SHA3},1) 357 $(error "ENABLE_FEAT_CRYPTO_SHA3 cannot be used with ARCH=aarch32") 358 endif 359 ifneq (${ENABLE_FEAT_MPAM},0) 360 $(error "ENABLE_FEAT_MPAM cannot be used with ARCH=aarch32") 361 endif 362 ifneq (${ENABLE_FEAT_UINJ},0) 363 $(error "ENABLE_FEAT_UINJ cannot be used with ARCH=aarch32") 364 endif 365 ifneq (${ENABLE_FEAT_STEP2},0) 366 $(error "ENABLE_FEAT_STEP2 cannot be used with ARCH=aarch32") 367 endif 368 ifneq (${ENABLE_FEAT_HDBSS},0) 369 $(error "ENABLE_FEAT_HDBSS cannot be used with ARCH=aarch32") 370 endif 371 ifneq (${ENABLE_FEAT_HACDBS},0) 372 $(error "ENABLE_FEAT_HACDBS cannot be used with ARCH=aarch32") 373 endif 374endif #(ARCH=aarch32) 375 376ifneq (${ENABLE_FEAT_FPMR},0) 377 ifeq (${ENABLE_FEAT_FGT},0) 378 $(error "ENABLE_FEAT_FPMR requires ENABLE_FEAT_FGT") 379 endif 380 ifeq (${ENABLE_FEAT_HCX},0) 381 $(error "ENABLE_FEAT_FPMR requires ENABLE_FEAT_HCX") 382 endif 383endif #(ENABLE_FEAT_FPMR) 384 385ifneq (${ENABLE_FEAT_CPA2},0) 386 ifeq (${ENABLE_FEAT_SCTLR2},0) 387 $(error "Error: ENABLE_FEAT_CPA2 cannot be used without ENABLE_FEAT_SCTLR2") 388 endif 389endif #${ENABLE_FEAT_CPA2} 390 391ifneq (${ENABLE_SME_FOR_NS},0) 392 ifeq (${ENABLE_SVE_FOR_NS},0) 393 $(error "ENABLE_SME_FOR_NS requires ENABLE_SVE_FOR_NS") 394 endif 395endif #(ENABLE_SME_FOR_NS) 396 397# Secure SME/SVE requires the non-secure component as well 398ifeq (${ENABLE_SME_FOR_SWD},1) 399 ifeq (${ENABLE_SME_FOR_NS},0) 400 $(error "ENABLE_SME_FOR_SWD requires ENABLE_SME_FOR_NS") 401 endif 402 ifeq (${ENABLE_SVE_FOR_SWD},0) 403 $(error "ENABLE_SME_FOR_SWD requires ENABLE_SVE_FOR_SWD") 404 endif 405endif #(ENABLE_SME_FOR_SWD) 406 407# Enabling SVE for SWD requires enabling SVE for NWD due to ENABLE_FEAT 408# mechanism. 409ifeq (${ENABLE_SVE_FOR_SWD},1) 410 ifeq (${ENABLE_SVE_FOR_NS},0) 411 $(error "ENABLE_SVE_FOR_SWD requires ENABLE_SVE_FOR_NS") 412 endif 413endif 414 415# Enabling FEAT_MOPS requires access to hcrx_el2 registers which is 416# available only when FEAT_HCX is enabled. 417ifneq (${ENABLE_FEAT_MOPS},0) 418 ifeq (${ENABLE_FEAT_HCX},0) 419 $(error "ENABLE_FEAT_MOPS requires ENABLE_FEAT_HCX") 420 endif 421endif 422 423# Enabling SVE for both the worlds typically requires the context 424# management of SVE registers. The only exception being SPMC at S-EL2. 425ifeq (${ENABLE_SVE_FOR_SWD}, 1) 426 ifneq (${ENABLE_SVE_FOR_NS}, 0) 427 ifeq (${CTX_INCLUDE_SVE_REGS}-$(SPMD_SPM_AT_SEL2),0-0) 428 $(warning "ENABLE_SVE_FOR_SWD and ENABLE_SVE_FOR_NS together require CTX_INCLUDE_SVE_REGS") 429 endif 430 endif 431endif 432 433# Enabling SHA3 requires regular Crypto extension to be enabled 434ifeq (${ENABLE_FEAT_CRYPTO_SHA3}, 1) 435 ifeq (${ENABLE_FEAT_CRYPTO}, 0) 436 $(error "ENABLE_FEAT_CRYPTO_SHA3 requires ENABLE_FEAT_CRYPTO") 437 endif 438endif 439 440ifeq (${ENABLE_FEAT_CRYPTO_SHA3}, 2) 441 $(warning "ENABLE_FEAT_CRYPTO_SHA3 does not have any effect when set to 2") 442endif 443 444ifeq (${ENABLE_FEAT_CRYPTO}, 2) 445 $(warning "ENABLE_FEAT_CRYPTO does not have any effect when set to 2") 446endif 447 448# Enabling SVE in either world while enabling CTX_INCLUDE_FPREGS requires 449# CTX_INCLUDE_SVE_REGS to be enabled due to architectural dependency between FP 450# and SVE registers. 451ifeq (${CTX_INCLUDE_FPREGS}, 1) 452 ifneq (${ENABLE_SVE_FOR_NS},0) 453 ifeq (${CTX_INCLUDE_SVE_REGS},0) 454 # Warning instead of error due to CI dependency on this 455 $(warning "CTX_INCLUDE_FPREGS and ENABLE_SVE_FOR_NS together require CTX_INCLUDE_SVE_REGS") 456 $(warning "Forced ENABLE_SVE_FOR_NS=0") 457 override ENABLE_SVE_FOR_NS := 0 458 endif 459 endif 460endif #(CTX_INCLUDE_FPREGS) 461 462# SVE context management is only required if secure world has access to SVE/FP 463# functionality. 464# Enabling CTX_INCLUDE_SVE_REGS requires CTX_INCLUDE_FPREGS to be enabled due 465# to architectural dependency between FP and SVE registers. 466ifeq (${CTX_INCLUDE_SVE_REGS},1) 467 ifeq (${ENABLE_SVE_FOR_SWD},0) 468 $(error "CTX_INCLUDE_SVE_REGS requires ENABLE_SVE_FOR_SWD to also be enabled") 469 endif 470 ifeq (${CTX_INCLUDE_FPREGS},0) 471 $(error "CTX_INCLUDE_SVE_REGS requires CTX_INCLUDE_FPREGS to also be enabled") 472 endif #(CTX_INCLUDE_FPREGS) 473endif #(CTX_INCLUDE_SVE_REGS) 474 475# SME cannot be used with CTX_INCLUDE_FPREGS since SPM does its own context 476# management including FPU registers. 477ifeq (${CTX_INCLUDE_FPREGS},1) 478 ifneq (${ENABLE_SME_FOR_NS},0) 479 $(error "ENABLE_SME_FOR_NS cannot be used with CTX_INCLUDE_FPREGS") 480 endif 481endif #(CTX_INCLUDE_FPREGS) 482 483ifeq ($(DRTM_SUPPORT),1) 484 $(info DRTM_SUPPORT is an experimental feature) 485endif 486 487ifeq (${HOB_LIST},1) 488 $(warning HOB_LIST is an experimental feature) 489endif 490 491ifeq (${TRANSFER_LIST},1) 492 $(info TRANSFER_LIST is an experimental feature) 493endif 494 495ifeq ($(PSA_CRYPTO),1) 496 $(info PSA_CRYPTO is an experimental feature) 497endif 498 499ifeq ($(DICE_PROTECTION_ENVIRONMENT),1) 500 $(info DICE_PROTECTION_ENVIRONMENT is an experimental feature) 501endif 502 503ifeq (${LFA_SUPPORT},1) 504 $(warning LFA_SUPPORT is an experimental feature) 505endif #(LFA_SUPPORT) 506 507ifneq (${ENABLE_FEAT_MPAM_PE_BW_CTRL},0) 508 ifeq (${ENABLE_FEAT_MPAM},0) 509 $(error "ENABLE_FEAT_MPAM_PW_BW_CTRL requires ENABLE_FEAT_MPAM") 510 endif 511endif #(ENABLE_FEAT_MPAM_PE_BW_CTRL) 512 513ifneq (${DYNAMIC_WORKAROUND_CVE_2018_3639},0) 514 ifeq (${WORKAROUND_CVE_2018_3639},0) 515 $(error Error: WORKAROUND_CVE_2018_3639 must be 1 if DYNAMIC_WORKAROUND_CVE_2018_3639 is 1) 516 endif 517endif 518 519ifeq (${WORKAROUND_CVE_2025_0647},1) 520ifeq "8.5" "$(word 1, $(sort 8.5 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 521else 522 $(error Error: WORKAROUND_CVE_2025_0647 can only be used with Arm Arch v8.5+, set ARM_ARCH_MAJOR and ARM_ARCH_MINOR appropriately.) 523endif 524endif 525 526ifneq ($(ENABLE_FEAT_MORELLO),0) 527 ifneq ($($(ARCH)-cc-id),llvm-clang) 528 $(error ENABLE_FEAT_MORELLO requires Clang toolchain) 529 endif 530 $(warning Morello capability is an experimental feature) 531endif 532 533# Handle all deprecated build options. 534ifeq (${ERROR_DEPRECATED}, 1) 535 ifneq (${NS_TIMER_SWITCH},0) 536 $(error "NS_TIMER_SWITCH breaks Linux preemption model, hence deprecated") 537 endif 538 ifneq (${SPM_MM},0) 539 $(error "SPM_MM build option is deprecated") 540 endif 541endif 542 543ifneq (${ENABLE_FEAT_IDTE3},0) 544 $(info FEAT_IDTE3 is an experimental feature) 545endif #(ENABLE_FEAT_IDTE3) 546