1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 3 #ifndef __AWINIC_CALIBRATION_H__ 4 #define __AWINIC_CALIBRATION_H__ 5 6 /*#define AW_CALI_STORE_EXAMPLE*/ 7 8 #define AW_CALI_STORE_EXAMPLE 9 #define AW_ERRO_CALI_RE_VALUE (0) 10 #define AW_ERRO_CALI_F0_VALUE (2600) 11 12 #define AW_CALI_RE_DEFAULT_TIMER (3000) 13 #define MSGS_SIZE (512) 14 #define RESERVED_SIZE (252) 15 16 17 #define AW_CALI_ALL_DEV (0xFFFFFFFF) 18 19 #define AW_CALI_RE_MAX (15000) 20 #define AW_CALI_RE_MIN (4000) 21 #define AW_CALI_CFG_NUM (4) 22 #define AW_CALI_F0_DATA_NUM (4) 23 #define AW_CALI_READ_CNT_MAX (8) 24 #define AW_CALI_DATA_SUM_RM (2) 25 #define AW_DSP_RE_TO_SHOW_RE(re, shift) (((re) * (1000)) >> (shift)) 26 #define AW_SHOW_RE_TO_DSP_RE(re, shift) (((re) << shift) / (1000)) 27 #define AW_CALI_F0_TIME (5 * 1000) 28 #define F0_READ_CNT_MAX (5) 29 #define AW_FS_CFG_MAX (11) 30 #define AW_DEV_CH_MAX (16) 31 #define AW_DEV_RE_RANGE (RE_RANGE_NUM * AW_DEV_CH_MAX) 32 #define AW_TE_CACL_VALUE(te, coil_alpha) ((int32_t)(((int32_t)te << 18) / (coil_alpha))) 33 #define AW_RE_REALTIME_VALUE(re_cacl, te_cacl) ((re_cacl) + (int32_t)((int64_t)((te_cacl) * (re_cacl)) >> 14)) 34 35 enum { 36 CALI_CHECK_DISABLE = 0, 37 CALI_CHECK_ENABLE = 1, 38 }; 39 40 enum { 41 CALI_RESULT_NONE = 0, 42 CALI_RESULT_NORMAL = 1, 43 CALI_RESULT_ERROR = -1, 44 }; 45 46 enum { 47 CALI_OPS_HMUTE = 0X0001, 48 CALI_OPS_NOISE = 0X0002, 49 }; 50 51 enum { 52 CALI_TYPE_RE = 0, 53 CALI_TYPE_F0, 54 }; 55 56 enum{ 57 AW_CALI_MODE_NONE = 0, 58 AW_CALI_MODE_ATTR, 59 AW_CALI_MODE_CLASS, 60 AW_CALI_MODE_MISC, 61 AW_CALI_MODE_MAX 62 }; 63 64 enum { 65 GET_RE_TYPE = 0, 66 GET_F0_TYPE, 67 GET_Q_TYPE, 68 }; 69 70 enum { 71 AW_CALI_CMD_RE = 0, 72 AW_CALI_CMD_F0, 73 AW_CALI_CMD_RE_F0, 74 AW_CALI_CMD_F0_Q, 75 AW_CALI_CMD_RE_F0_Q, 76 }; 77 78 enum { 79 CALI_STR_NONE = 0, 80 CALI_STR_CALI_RE_F0, 81 CALI_STR_CALI_RE, 82 CALI_STR_CALI_F0, 83 CALI_STR_SET_RE, 84 CALI_STR_SHOW_RE, /*show cali_re*/ 85 CALI_STR_SHOW_R0, /*show real r0*/ 86 CALI_STR_SHOW_CALI_F0, /*GET DEV CALI_F0*/ 87 CALI_STR_SHOW_F0, /*SHOW REAL F0*/ 88 CALI_STR_SHOW_TE, 89 CALI_STR_DEV_SEL, /*switch device*/ 90 CALI_STR_VER, 91 CALI_STR_SHOW_RE_RANGE, 92 CALI_STR_MAX, 93 }; 94 95 enum { 96 RE_MIN_FLAG = 0, 97 RE_MAX_FLAG = 1, 98 RE_RANGE_NUM = 2, 99 }; 100 101 struct re_data { 102 uint32_t re_range[2]; 103 }; 104 105 106 #define AW_IOCTL_MAGIC 'a' 107 108 #define AW_IOCTL_GET_F0 _IOWR(AW_IOCTL_MAGIC, 5, int32_t) 109 #define AW_IOCTL_SET_CALI_RE _IOWR(AW_IOCTL_MAGIC, 6, int32_t) 110 111 #define AW_IOCTL_GET_RE _IOWR(AW_IOCTL_MAGIC, 17, int32_t) 112 #define AW_IOCTL_GET_CALI_F0 _IOWR(AW_IOCTL_MAGIC, 18, int32_t) 113 #define AW_IOCTL_GET_REAL_R0 _IOWR(AW_IOCTL_MAGIC, 19, int32_t) 114 #define AW_IOCTL_GET_TE _IOWR(AW_IOCTL_MAGIC, 20, int32_t) 115 #define AW_IOCTL_GET_RE_RANGE _IOWR(AW_IOCTL_MAGIC, 21, struct re_data) 116 117 struct cali_cfg { 118 uint32_t data[AW_CALI_CFG_NUM]; 119 }; 120 121 122 struct aw_cali_desc { 123 bool status; 124 struct cali_cfg cali_cfg; 125 uint16_t store_vol; 126 uint32_t cali_re; /*cali value*/ 127 uint32_t f0; 128 uint32_t q; 129 uint32_t ra; 130 int8_t cali_result; 131 uint8_t cali_check_st; 132 }; 133 134 void aw_cali_init(struct aw_cali_desc *cali_desc); 135 void aw_cali_deinit(struct aw_cali_desc *cali_desc); 136 bool aw_cali_svc_get_cali_status(struct aw_cali_desc *cali_desc); 137 int aw_cali_svc_set_cali_re_to_dsp(struct aw_cali_desc *cali_desc); 138 int aw_cali_svc_get_ra(struct aw_cali_desc *cali_desc); 139 int aw_cali_svc_get_dev_te(struct aw_cali_desc *cali_desc, int32_t *te); 140 int aw_cali_get_cali_re(struct aw_cali_desc *cali_desc); 141 int aw_cali_read_cali_re_from_dsp(struct aw_cali_desc *cali_desc, uint32_t *re); 142 143 144 145 #endif 146 147 148