1 /* 2 * Copyright (c) 2012 The Chromium OS Authors. 3 * (C) Copyright 2002-2010 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __ASM_GENERIC_GBL_DATA_H 10 #define __ASM_GENERIC_GBL_DATA_H 11 /* 12 * The following data structure is placed in some memory which is 13 * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or 14 * some locked parts of the data cache) to allow for a minimum set of 15 * global variables during system initialization (until we have set 16 * up the memory controller so that we can use RAM). 17 * 18 * Keep it *SMALL* and remember to set GENERATED_GBL_DATA_SIZE > sizeof(gd_t) 19 * 20 * Each architecture has its own private fields. For now all are private 21 */ 22 23 #ifndef __ASSEMBLY__ 24 #include <membuff.h> 25 #include <linux/list.h> 26 27 /* Never change the sequence of members !!! */ 28 struct pm_ctx { 29 unsigned long sp; 30 phys_addr_t cpu_resume_addr; 31 unsigned long suspend_regs[15]; 32 }; 33 34 struct pre_serial { 35 u32 using_pre_serial; 36 u32 enable; 37 u32 id; 38 u32 baudrate; 39 ulong addr; 40 }; 41 42 typedef struct global_data { 43 bd_t *bd; 44 unsigned long flags; 45 unsigned int baudrate; 46 unsigned long cpu_clk; /* CPU clock in Hz! */ 47 unsigned long bus_clk; 48 /* We cannot bracket this with CONFIG_PCI due to mpc5xxx */ 49 unsigned long pci_clk; 50 unsigned long mem_clk; 51 #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) 52 unsigned long fb_base; /* Base address of framebuffer mem */ 53 #endif 54 #if defined(CONFIG_POST) 55 unsigned long post_log_word; /* Record POST activities */ 56 unsigned long post_log_res; /* success of POST test */ 57 unsigned long post_init_f_time; /* When post_init_f started */ 58 #endif 59 #ifdef CONFIG_BOARD_TYPES 60 unsigned long board_type; 61 #endif 62 unsigned long have_console; /* serial_init() was called */ 63 #if CONFIG_IS_ENABLED(PRE_CONSOLE_BUFFER) 64 unsigned long precon_buf_idx; /* Pre-Console buffer index */ 65 #endif 66 unsigned long env_addr; /* Address of Environment struct */ 67 unsigned long env_valid; /* Environment valid? enum env_valid */ 68 69 unsigned long ram_top; /* Top address of RAM used by U-Boot */ 70 unsigned long ram_top_ext_size; /* Extend size of RAM top */ 71 unsigned long relocaddr; /* Start address of U-Boot in RAM */ 72 phys_size_t ram_size; /* RAM size */ 73 unsigned long mon_len; /* monitor len */ 74 unsigned long irq_sp; /* irq stack pointer */ 75 unsigned long start_addr_sp; /* start_addr_stackpointer */ 76 unsigned long reloc_off; 77 struct global_data *new_gd; /* relocated global data */ 78 79 #ifdef CONFIG_DM 80 struct udevice *dm_root; /* Root instance for Driver Model */ 81 struct udevice *dm_root_f; /* Pre-relocation root instance */ 82 struct list_head uclass_root; /* Head of core tree */ 83 #endif 84 #ifdef CONFIG_TIMER 85 struct udevice *timer; /* Timer instance for Driver Model */ 86 #endif 87 const void *fdt_blob; /* Our device tree, NULL if none */ 88 void *new_fdt; /* Relocated FDT */ 89 unsigned long fdt_size; /* Space reserved for relocated FDT */ 90 #ifdef CONFIG_OF_LIVE 91 struct device_node *of_root; 92 struct device_node *of_root_f; /* U-Boot of-root instance */ 93 #endif 94 const void *ufdt_blob; /* Our U-Boot device tree, NULL if none */ 95 const void *fdt_blob_kern; /* Kernel dtb at the tail of u-boot.bin */ 96 struct jt_funcs *jt; /* jump table */ 97 char env_buf[32]; /* buffer for env_get() before reloc. */ 98 #ifdef CONFIG_TRACE 99 void *trace_buff; /* The trace buffer */ 100 #endif 101 #if defined(CONFIG_SYS_I2C) 102 int cur_i2c_bus; /* current used i2c bus */ 103 #endif 104 #ifdef CONFIG_SYS_I2C_MXC 105 void *srdata[10]; 106 #endif 107 unsigned int timebase_h; 108 unsigned int timebase_l; 109 #if CONFIG_VAL(SYS_MALLOC_F_LEN) 110 unsigned long malloc_base; /* base address of early malloc() */ 111 unsigned long malloc_limit; /* limit address */ 112 unsigned long malloc_ptr; /* current address */ 113 #endif 114 #ifdef CONFIG_PCI 115 struct pci_controller *hose; /* PCI hose for early use */ 116 phys_addr_t pci_ram_top; /* top of region accessible to PCI */ 117 #endif 118 #ifdef CONFIG_PCI_BOOTDELAY 119 int pcidelay_done; 120 #endif 121 struct udevice *cur_serial_dev; /* current serial device */ 122 struct arch_global_data arch; /* architecture-specific data */ 123 #ifdef CONFIG_CONSOLE_RECORD 124 struct membuff console_out; /* console output */ 125 struct membuff console_in; /* console input */ 126 #endif 127 #ifdef CONFIG_DM_VIDEO 128 ulong video_top; /* Top of video frame buffer area */ 129 ulong video_bottom; /* Bottom of video frame buffer area */ 130 #endif 131 #ifdef CONFIG_BOOTSTAGE 132 struct bootstage_data *bootstage; /* Bootstage information */ 133 struct bootstage_data *new_bootstage; /* Relocated bootstage info */ 134 #endif 135 phys_addr_t pm_ctx_phys; 136 137 #ifdef CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP 138 int new_line; 139 #endif 140 struct pre_serial serial; 141 ulong sys_start_tick; /* For report system start-up time */ 142 int console_evt; /* Console event, maybe some hotkey */ 143 #ifdef CONFIG_LOG 144 int log_drop_count; /* Number of dropped log messages */ 145 int default_log_level; /* For devices with no filters */ 146 struct list_head log_head; /* List of struct log_device */ 147 #endif 148 #if CONFIG_IS_ENABLED(FIT_ROLLBACK_PROTECT) 149 u32 rollback_index; 150 #endif 151 #ifdef CONFIG_PSTORE 152 u64 pstore_addr; 153 u32 pstore_size; 154 #endif 155 } gd_t; 156 #endif 157 158 #ifdef CONFIG_BOARD_TYPES 159 #define gd_board_type() gd->board_type 160 #else 161 #define gd_board_type() 0 162 #endif 163 164 /* 165 * Global Data Flags - the top 16 bits are reserved for arch-specific flags 166 */ 167 #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ 168 #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ 169 #define GD_FLG_SILENT 0x00004 /* Silent mode */ 170 #define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ 171 #define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */ 172 #define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */ 173 #define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */ 174 #define GD_FLG_ENV_READY 0x00080 /* Env. imported into hash table */ 175 #define GD_FLG_SERIAL_READY 0x00100 /* Pre-reloc serial console ready */ 176 #define GD_FLG_FULL_MALLOC_INIT 0x00200 /* Full malloc() is ready */ 177 #define GD_FLG_SPL_INIT 0x00400 /* spl_init() has been called */ 178 #define GD_FLG_SKIP_RELOC 0x00800 /* Don't relocate */ 179 #define GD_FLG_RECORD 0x01000 /* Record console */ 180 #define GD_FLG_ENV_DEFAULT 0x02000 /* Default variable flag */ 181 #define GD_FLG_SPL_EARLY_INIT 0x04000 /* Early SPL init is done */ 182 #define GD_FLG_LOG_READY 0x08000 /* Log system is ready for use */ 183 #define GD_FLG_KDTB_READY 0x10000 /* Kernel dtb is ready for use */ 184 185 #ifdef CONFIG_ARCH_ROCKCHIP 186 /* BL32 is enabled */ 187 #define GD_FLG_BL32_ENABLED 0x20000 188 #endif 189 190 #endif /* __ASM_GENERIC_GBL_DATA_H */ 191