1 /* 2 * Copyright (C) 2018 Rockchip Electronics Co., Ltd 3 * Author: Zhihuan He <huan.he@rock-chips.com> 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #ifndef _ASM_ARCH_PMU_RV1108_H 8 #define _ASM_ARCH_PMU_RV1108_H 9 10 struct rv1108_pmu { 11 u32 wakeup_cfg[3]; 12 u32 reserved0[2]; 13 u32 pwrmode_core_con; 14 u32 pwrmode_common_con; 15 u32 sft_con; 16 u32 reserved1[7]; 17 u32 bus_idle_req; 18 u32 bus_idle_st; 19 u32 reserved2; 20 u32 osc_cnt; 21 u32 plllock_cnt; 22 u32 reserved3; 23 u32 stable_cnt; 24 u32 reserved4; 25 u32 wakeup_rst_clr_cnt; 26 u32 ddr_sref_st; 27 u32 sys_reg[4]; 28 u32 timeout_cnt; 29 }; 30 31 check_member(rv1108_pmu, timeout_cnt, 0x0074); 32 33 enum { /* PMU_SFT_CON */ 34 DDR_IO_RET_SHIFT = 11, 35 DDR_IO_RET_EN = 1 << DDR_IO_RET_SHIFT, 36 }; 37 38 #endif 39 40