xref: /utopia/UTPA2-700.0.x/modules/dmx/api/dmx_tee/apiDMX_tee.c (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5 // All software, firmware and related documentation herein ("MStar Software") are
6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by
7 // law, including, but not limited to, copyright law and international treaties.
8 // Any use, modification, reproduction, retransmission, or republication of all
9 // or part of MStar Software is expressly prohibited, unless prior written
10 // permission has been granted by MStar.
11 //
12 // By accessing, browsing and/or using MStar Software, you acknowledge that you
13 // have read, understood, and agree, to be bound by below terms ("Terms") and to
14 // comply with all applicable laws and regulations:
15 //
16 // 1. MStar shall retain any and all right, ownership and interest to MStar
17 //    Software and any modification/derivatives thereof.
18 //    No right, ownership, or interest to MStar Software and any
19 //    modification/derivatives thereof is transferred to you under Terms.
20 //
21 // 2. You understand that MStar Software might include, incorporate or be
22 //    supplied together with third party`s software and the use of MStar
23 //    Software may require additional licenses from third parties.
24 //    Therefore, you hereby agree it is your sole responsibility to separately
25 //    obtain any and all third party right and license necessary for your use of
26 //    such third party`s software.
27 //
28 // 3. MStar Software and any modification/derivatives thereof shall be deemed as
29 //    MStar`s confidential information and you agree to keep MStar`s
30 //    confidential information in strictest confidence and not disclose to any
31 //    third party.
32 //
33 // 4. MStar Software is provided on an "AS IS" basis without warranties of any
34 //    kind. Any warranties are hereby expressly disclaimed by MStar, including
35 //    without limitation, any warranties of merchantability, non-infringement of
36 //    intellectual property rights, fitness for a particular purpose, error free
37 //    and in conformity with any international standard.  You agree to waive any
38 //    claim against MStar for any loss, damage, cost or expense that you may
39 //    incur related to your use of MStar Software.
40 //    In no event shall MStar be liable for any direct, indirect, incidental or
41 //    consequential damages, including without limitation, lost of profit or
42 //    revenues, lost or damage of data, and unauthorized system use.
43 //    You agree that this Section 4 shall still apply without being affected
44 //    even if MStar Software has been modified by MStar in accordance with your
45 //    request or instruction for your use, except otherwise agreed by both
46 //    parties in writing.
47 //
48 // 5. If requested, MStar may from time to time provide technical supports or
49 //    services in relation with MStar Software to you for your use of
50 //    MStar Software in conjunction with your or your customer`s product
51 //    ("Services").
52 //    You understand and agree that, except otherwise agreed by both parties in
53 //    writing, Services are provided on an "AS IS" basis and the warranty
54 //    disclaimer set forth in Section 4 above shall apply.
55 //
56 // 6. Nothing contained herein shall be construed as by implication, estoppels
57 //    or otherwise:
58 //    (a) conferring any license or right to use MStar name, trademark, service
59 //        mark, symbol or any other identification;
60 //    (b) obligating MStar or any of its affiliates to furnish any person,
61 //        including without limitation, you and your customers, any assistance
62 //        of any kind whatsoever, or any information; or
63 //    (c) conferring any license or right under any intellectual property right.
64 //
65 // 7. These terms shall be governed by and construed in accordance with the laws
66 //    of Taiwan, R.O.C., excluding its conflict of law rules.
67 //    Any and all dispute arising out hereof or related hereto shall be finally
68 //    settled by arbitration referred to the Chinese Arbitration Association,
69 //    Taipei in accordance with the ROC Arbitration Law and the Arbitration
70 //    Rules of the Association by three (3) arbitrators appointed in accordance
71 //    with the said Rules.
72 //    The place of arbitration shall be in Taipei, Taiwan and the language shall
73 //    be English.
74 //    The arbitration award shall be final and binding to both parties.
75 //
76 //******************************************************************************
77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
81 // All rights reserved.
82 //
83 // Unless otherwise stipulated in writing, any and all information contained
84 // herein regardless in any format shall remain the sole proprietary of
85 // MStar Semiconductor Inc. and be kept in strict confidence
86 // ("MStar Confidential Information") by the recipient.
87 // Any unauthorized act including without limitation unauthorized disclosure,
88 // copying, use, reproduction, sale, distribution, modification, disassembling,
89 // reverse engineering and compiling of the contents of MStar Confidential
90 // Information is unlawful and strictly prohibited. MStar hereby reserves the
91 // rights to any and all damages, losses, costs and expenses resulting therefrom.
92 //
93 ////////////////////////////////////////////////////////////////////////////////
94 
95 ////////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// file   apiDMX_tee.c
98 /// @brief  Demux TEE API
99 /// @author MStar Semiconductor,Inc.
100 ////////////////////////////////////////////////////////////////////////////////////////////////////
101 #include <string.h>
102 
103 #include "MsCommon.h"
104 #include "MsVersion.h"
105 #include "MsOS.h"
106 
107 #include "asmCPU.h"
108 
109 #include "drvSEAL.h"
110 #include "drvTSP_tee.h"
111 #include "apiDMX_tee.h"
112 
113 #include "utopia.h"
114 #include "halCHIP.h"
115 
116 #if defined (MSOS_TYPE_NUTTX)
117 #include "../../drv/mbx/apiMBX_St.h"
118 #include "../../drv/mbx/apiMBX.h"
119 #endif  //MSOS_TYPE_NUTTX
120 
121 //------------------------------------------------------------------------------
122 // Compile options
123 //------------------------------------------------------------------------------
124 #define DMX_TEE_DBG                             (0)
125 
126 //------------------------------------------------------------------------------
127 // Debug Macros
128 //------------------------------------------------------------------------------
129 // for debugging test only
130 
131 //-------------------------------------------------------------------------------------------------
132 //  Local Defines
133 //-------------------------------------------------------------------------------------------------
134 #if defined (MSOS_TYPE_NUTTX)
135 #define DMX_STACK_SIZE                                                  (4096)
136 #endif
137 
138 #define PRINTF(x)                                                       //x
139 
140 //------------------------------------------------------------------------------
141 // Constant definition
142 //------------------------------------------------------------------------------
143 #define DMX_MAX_PVR_ENG_NUM                     (4)
144 #define DMX_MAX_FILEIN_ENG_NUM                  (4)
145 #define DMX_MAX_MMFI_ENG_NUM                    (2)
146 
147 //------------------------------------------------------------------------------
148 // Internal data structure
149 //------------------------------------------------------------------------------
150 #if defined (MSOS_TYPE_NUTTX)
151 typedef enum
152 {
153     E_DMX_TEE_TO_REE_MBX_MSG_NULL,
154     E_DMX_TEE_TO_REE_MBX_ACK_MSG_INVALID,
155     E_DMX_TEE_TO_REE_MBX_ACK_MSG_NO_TEE,
156     E_DMX_TEE_TO_REE_MBX_ACK_MSG_ACTION_SUCCESS,
157     E_DMX_TEE_TO_REE_MBX_ACK_MSG_ACTION_FAIL
158 } DMX_TEE_TO_REE_MBX_ACK_TYPE;
159 #endif   //MSOS_TYPE_NUTTX
160 
161 typedef struct _DMX_TEE_PRIV_PARAM
162 {
163     MS_U8   _u8TspFwBufMiuSel;
164     MS_U32  _u32TspFwBufSize;
165     MS_U32  _u32TspFwBufAddr;
166     MS_U32  _u32TspFwBufAddr_H;
167     MS_U32  _u32TspFwBufSerSta;
168 
169     MS_U8   _u8VQBufMiuSel;
170     MS_U32  _u32VQBufSize;
171     MS_U32  _u32VQBufAddr;
172     MS_U32  _u32VQBufAddr_H;
173     MS_U32  _u32VQBufSerSta;
174 
175     MS_U8   _u8PvrBufMiuSel[DMX_MAX_PVR_ENG_NUM];
176     MS_U32  _u32PVR_Buf0_Size[DMX_MAX_PVR_ENG_NUM];
177     MS_U32  _u32PVR_Buf0_Addr[DMX_MAX_PVR_ENG_NUM];
178     MS_U32  _u32PVR_Buf0_Addr_H[DMX_MAX_PVR_ENG_NUM];
179     MS_U32  _u32PVR_Buf1_Size[DMX_MAX_PVR_ENG_NUM];
180     MS_U32  _u32PVR_Buf1_Addr[DMX_MAX_PVR_ENG_NUM];
181     MS_U32  _u32PVR_Buf1_Addr_H[DMX_MAX_PVR_ENG_NUM];
182     MS_U32  _u32PVR_BufSerSta[DMX_MAX_PVR_ENG_NUM];
183 
184     MS_U8   _u8FileinMiuSel[DMX_MAX_FILEIN_ENG_NUM];
185     MS_U32  _u32FileinBufAddr[DMX_MAX_FILEIN_ENG_NUM];
186     MS_U32  _u32FileinBufAddr_H[DMX_MAX_FILEIN_ENG_NUM];
187     MS_U32  _u32FileinBufSize[DMX_MAX_FILEIN_ENG_NUM];
188     MS_U32  _u32FileinBufSerSta[DMX_MAX_FILEIN_ENG_NUM];
189 
190     MS_U8   _u8MMFIMiuSel[DMX_MAX_MMFI_ENG_NUM];
191     MS_U32  _u32MMFIBufAddr[DMX_MAX_MMFI_ENG_NUM];
192     MS_U32  _u32MMFIBufAddr_H[DMX_MAX_MMFI_ENG_NUM];
193     MS_U32  _u32MMFIBufSize[DMX_MAX_MMFI_ENG_NUM];
194     MS_U32  _u32MMFIBufSerSta[DMX_MAX_MMFI_ENG_NUM];
195 
196 }DMX_TEE_PRIV_PARAM;
197 
198 //------------------------------------------------------------------------------
199 // Helper Macros
200 //------------------------------------------------------------------------------
201 
202 //------------------------------------------------------------------------------
203 // Local Variable
204 //------------------------------------------------------------------------------
205 
206 #if defined (MSOS_TYPE_NUTTX)
207 MS_U8   _u8DmxTeeStack[DMX_STACK_SIZE];
208 MS_U8   _u8DmxMbxMsgClass = 0;
209 MS_S32  _s32Dmx_TEE_EventId = -1;
210 MS_S32  _s32Dmx_TEE_TaskId = -1;
211 MBX_Msg _DmxTeeToReeMbxMsg;
212 MBX_Msg _Dmx_TEE_msg;
213 #endif
214 
215 MS_BOOL _bInit = FALSE;
216 
217 static DMX_TEE_PRIV_PARAM stDMX_Tee_Priv_Param =
218 {
219     ._u8TspFwBufMiuSel = 0,
220     ._u32TspFwBufSize = 0,
221     ._u32TspFwBufAddr = 0,
222     ._u32TspFwBufAddr_H = 0,
223     ._u32TspFwBufSerSta = 0,
224 
225     ._u8VQBufMiuSel = 0,
226     ._u32VQBufSize = 0,
227     ._u32VQBufAddr = 0,
228     ._u32VQBufAddr_H = 0,
229     ._u32VQBufSerSta = 0,
230 
231     ._u8PvrBufMiuSel = {0,0},
232     ._u32PVR_Buf0_Size = {0,0},
233     ._u32PVR_Buf0_Addr = {0,0},
234     ._u32PVR_Buf0_Addr_H = {0,0},
235     ._u32PVR_Buf1_Size = {0,0},
236     ._u32PVR_Buf1_Addr = {0,0},
237     ._u32PVR_Buf1_Addr_H = {0,0},
238     ._u32PVR_BufSerSta = {0, 0},
239 
240     ._u8FileinMiuSel = {0,0,0},
241     ._u32FileinBufAddr = {0,0,0},
242     ._u32FileinBufAddr_H = {0,0,0},
243     ._u32FileinBufSize = {0,0,0},
244     ._u32FileinBufSerSta = {0, 0, 0},
245 
246     ._u8MMFIMiuSel = {0,0},
247     ._u32MMFIBufAddr = {0,0},
248     ._u32MMFIBufAddr_H = {0,0},
249     ._u32MMFIBufSize = {0,0},
250     ._u32MMFIBufSerSta = {0, 0},
251 };
252 
253 //------------------------------------------------------------------------------
254 // Internal implementation
255 //------------------------------------------------------------------------------
256 #if 0
257 MS_BOOL _DMX_TEE_RIU_LockInit(void)
258 {
259     if(MDrv_Seal_BufferLock(E_SEAL_TSP0_WP_FW, TRUE) == FALSE)
260         return FALSE;
261     if(MDrv_Seal_BufferLock(E_SEAL_TSP0_RP_FW, TRUE) == FALSE)
262         return FALSE;
263     if(MDrv_Seal_BufferLock(E_SEAL_TSP_WP_VQ, TRUE) == FALSE)
264         return FALSE;
265     if(MDrv_Seal_BufferLock(E_SEAL_TSP_RP_VQ, TRUE) == FALSE)
266         return FALSE;
267     if(MDrv_Seal_BufferLock(E_SEAL_TSP0_WP_PVR, TRUE) == FALSE)
268         return FALSE;
269     if(MDrv_Seal_BufferLock(E_SEAL_TSP0_RP_PVR, TRUE) == FALSE)
270         return FALSE;
271     if(MDrv_Seal_BufferLock(E_SEAL_TSP0_WP_PVR1, TRUE) == FALSE)
272         return FALSE;
273     if(MDrv_Seal_BufferLock(E_SEAL_TSP0_RP_PVR1, TRUE) == FALSE)
274         return FALSE;
275     if(MDrv_Seal_BufferLock(E_SEAL_TSP0_WP_FILEIN, TRUE) == FALSE)
276         return FALSE;
277     if(MDrv_Seal_BufferLock(E_SEAL_TSP0_RP_FILEIN, TRUE) == FALSE)
278         return FALSE;
279     if(MDrv_Seal_BufferLock(E_SEAL_MMFI_WP_MMFI0, TRUE) == FALSE)
280         return FALSE;
281     if(MDrv_Seal_BufferLock(E_SEAL_MMFI_RP_MMFI0, TRUE) == FALSE)
282         return FALSE;
283     if(MDrv_Seal_BufferLock(E_SEAL_MMFI_WP_MMFI1, TRUE) == FALSE)
284         return FALSE;
285     if(MDrv_Seal_BufferLock(E_SEAL_MMFI_RP_MMFI1, TRUE) == FALSE)
286         return FALSE;
287 
288     return TRUE;
289 }
290 #endif
291 
_DMX_TEE_U32AddrToPhyAddr(MS_U32 u32AddrL,MS_U32 u32AddrH)292 static MS_PHY _DMX_TEE_U32AddrToPhyAddr(MS_U32 u32AddrL, MS_U32 u32AddrH)
293 {
294     MS_PHY phyAddr = 0;
295     MS_U32* pu32Temp = (MS_U32*)(&phyAddr);
296 
297     if(sizeof(MS_PHY) == 8)
298     {
299         pu32Temp[0] = u32AddrL;
300         pu32Temp[1] = u32AddrH;
301         return phyAddr;
302     }
303     else
304     {
305         return u32AddrL;
306     }
307 }
308 
_DMX_TEE_PhyAddrToU32Addr(MS_PHY phyAddr,MS_U32 * pu32AddrL,MS_U32 * pu32AddrH)309 static MS_BOOL _DMX_TEE_PhyAddrToU32Addr(MS_PHY phyAddr, MS_U32* pu32AddrL, MS_U32* pu32AddrH)
310 {
311     MS_U32* pu32Temp = NULL;
312 
313     if(sizeof(MS_PHY) == 8)
314     {
315         pu32Temp = (MS_U32*)(&phyAddr);
316         *pu32AddrL = pu32Temp[0];
317         *pu32AddrH = pu32Temp[1];
318     }
319     else
320     {
321         *pu32AddrL = phyAddr;
322         *pu32AddrH = 0;
323     }
324 
325     return TRUE;
326 }
327 
328 #if defined (MSOS_TYPE_NUTTX)
_DMX_TEE_BufParamToMbxParam(MS_U32 u32BufAddr,MS_U32 u32Size,MS_U8 u8MiuSel,MBX_Msg * pMsg)329 MS_BOOL _DMX_TEE_BufParamToMbxParam(MS_U32 u32BufAddr, MS_U32 u32Size, MS_U8 u8MiuSel, MBX_Msg *pMsg)
330 {
331     pMsg->u8Parameters[0] = (MS_U8)(u32Size & 0xFFUL);
332     pMsg->u8Parameters[1] = (MS_U8)((u32Size >> 8UL) & 0xFFUL);
333     pMsg->u8Parameters[2] = (MS_U8)((u32Size >> 16UL) & 0xFFUL);
334     pMsg->u8Parameters[3] = (MS_U8)((u32Size >> 24UL) & 0xFFUL);
335 
336     pMsg->u8Parameters[4] = (MS_U8)(u32BufAddr & 0xFFUL);
337     pMsg->u8Parameters[5] = (MS_U8)((u32BufAddr >> 8UL) & 0xFFUL);
338     pMsg->u8Parameters[6] = (MS_U8)((u32BufAddr >> 16UL) & 0xFFUL);
339     pMsg->u8Parameters[7] = (MS_U8)((u32BufAddr >> 24UL) & 0xFFUL);
340     pMsg->u8Parameters[8] = u8MiuSel;
341 
342     pMsg->u8ParameterCount = 9;
343 
344     return TRUE;
345 }
346 
_DMX_TEE_MbxParamToBufParam(MBX_Msg * pMsg,MS_U32 * pu32BufAddr,MS_U32 * pu32Size,MS_U8 * pu8MiuSel)347 MS_BOOL _DMX_TEE_MbxParamToBufParam(MBX_Msg *pMsg, MS_U32 *pu32BufAddr, MS_U32 *pu32Size, MS_U8* pu8MiuSel)
348 {
349     if(pMsg->u8ParameterCount < 9)
350     {
351         return FALSE;
352     }
353 
354     PRINTF(printf("[%s][%d] %02x %02x %02x %02x %02x %02x %02x %02x\n", __FUNCTION__, __LINE__,
355         pMsg->u8Parameters[0], pMsg->u8Parameters[1], pMsg->u8Parameters[2], pMsg->u8Parameters[3],
356         pMsg->u8Parameters[4], pMsg->u8Parameters[5], pMsg->u8Parameters[6], pMsg->u8Parameters[7]));
357 
358     *pu32Size = ((MS_U32)(pMsg->u8Parameters[0])) & 0xFFUL;
359     *pu32Size += ((((MS_U32)(pMsg->u8Parameters[1])) << 8UL) & 0xFF00UL);
360     *pu32Size += ((((MS_U32)(pMsg->u8Parameters[2])) << 16UL) & 0xFF0000UL);
361     *pu32Size += ((((MS_U32)(pMsg->u8Parameters[3])) << 24UL) & 0xFF000000UL);
362 
363     *pu32BufAddr = ((MS_U32)(pMsg->u8Parameters[4])) & 0xFFUL;
364     *pu32BufAddr += ((((MS_U32)(pMsg->u8Parameters[5])) << 8UL) & 0xFF00UL);
365     *pu32BufAddr += ((((MS_U32)(pMsg->u8Parameters[6])) << 16UL) & 0xFF0000UL);
366     *pu32BufAddr += ((((MS_U32)(pMsg->u8Parameters[7])) << 24UL) & 0xFF000000UL);
367 
368     *pu8MiuSel = pMsg->u8Parameters[8];
369 
370     return TRUE;
371 }
372 
_DMX_TEE_HandleDynamicMBX(MBX_Msg * pMsg,MS_BOOL * pbAddToQueue)373 void _DMX_TEE_HandleDynamicMBX(MBX_Msg *pMsg, MS_BOOL *pbAddToQueue)
374 {
375     if(pMsg==NULL)
376     {
377         PRINTF(printf("[DMX]%s,pMsg is a null pointer\n",__FUNCTION__));
378         return;
379     }
380 
381     if (_s32Dmx_TEE_EventId < 0)
382     {
383         PRINTF(printf("[DMX]%s,DMX TEE event group is not created\n",__FUNCTION__));
384         return;
385     }
386     memcpy(&_Dmx_TEE_msg, pMsg, sizeof(MBX_Msg));
387     MsOS_SetEvent(_s32Dmx_TEE_EventId, 1);
388     *pbAddToQueue = FALSE;
389     return;
390 }
391 
_DMX_TEE_Proc(void)392 void _DMX_TEE_Proc(void)
393 {
394     MS_U32 u32Events;
395     MS_U8  u8Index = 0, u8Opt = 0;
396     DMX_TEE_BUF_Param stTeeBuf = {0, 0, 0, 0, 0};
397     //MBX_Result result;
398 
399     PRINTF(printf("DMX TEE_Proc\n"));
400 
401     while(1)
402     {
403         MsOS_WaitEvent(_s32Dmx_TEE_EventId, 1, &u32Events, E_OR_CLEAR, MSOS_WAIT_FOREVER);
404 
405         u8Index = _Dmx_TEE_msg.u8Index;
406 
407         memset(&_DmxTeeToReeMbxMsg,0,sizeof(MBX_Msg));
408         _DmxTeeToReeMbxMsg.eRoleID = E_MBX_CPU_MIPS;
409         _DmxTeeToReeMbxMsg.u8Ctrl = 0;
410         _DmxTeeToReeMbxMsg.eMsgType = E_MBX_MSG_TYPE_INSTANT;
411         _DmxTeeToReeMbxMsg.u8MsgClass = _Dmx_TEE_msg.u8MsgClass;
412         _DmxTeeToReeMbxMsg.u8Index = E_DMX_TEE_TO_REE_MBX_ACK_MSG_ACTION_SUCCESS;
413         _DmxTeeToReeMbxMsg.u8Parameters[0] = 0;
414         _DmxTeeToReeMbxMsg.u8ParameterCount = 0;
415 
416         switch(u8Index)
417         {
418             case E_DMX_REE_TO_TEE_CMD_FW_LoadCode:
419                 PRINTF(printf("DMX receive load f/w code in R2\n"));
420                 stTeeBuf.u32EngId = ((MS_U32)_Dmx_TEE_msg.u8Parameters[0]) & 0xFF;
421                 stTeeBuf.u32BufAddr = stDMX_Tee_Priv_Param._u32TspFwBufAddr;
422                 stTeeBuf.u32BufAddr_H = stDMX_Tee_Priv_Param._u32TspFwBufAddr_H;
423                 stTeeBuf.u32BufSize = stDMX_Tee_Priv_Param._u32TspFwBufSize;
424                 if(MApi_DMX_TEE_ProcReeCmd(u8Index, (void*)(&stTeeBuf)) != 0)
425                 {
426                     _DmxTeeToReeMbxMsg.u8Index = E_DMX_TEE_TO_REE_MBX_ACK_MSG_ACTION_FAIL;
427                 }
428                 break;
429             case E_DMX_REE_TO_TEE_CMD_SET_VqBuf:
430                 stTeeBuf.u32BufAddr = stDMX_Tee_Priv_Param._u32VQBufAddr;
431                 stTeeBuf.u32BufAddr_H = stDMX_Tee_Priv_Param._u32VQBufAddr_H;
432                 stTeeBuf.u32BufSize = stDMX_Tee_Priv_Param._u32VQBufSize;
433                 if(MApi_DMX_TEE_ProcReeCmd(u8Index, (void*)(&stTeeBuf)) != 0)
434                 {
435                     _DmxTeeToReeMbxMsg.u8Index = E_DMX_TEE_TO_REE_MBX_ACK_MSG_ACTION_FAIL;
436                 }
437                 break;
438             case E_DMX_REE_TO_TEE_CMD_SET_PvrBuf:
439                 stTeeBuf.u32EngId = ((MS_U32)_Dmx_TEE_msg.u8Parameters[0]) & 0xFF;
440                 u8Opt = _Dmx_TEE_msg.u8Parameters[1];
441                 if(u8Opt == 0)
442                 {
443                     stTeeBuf.u32BufSize = 0xFFFFFFFF;
444                 }
445                 if(MApi_DMX_TEE_ProcReeCmd(u8Index, (void*)(&stTeeBuf)) != 0)
446                 {
447                     stTeeBuf.u32BufSize = 0;
448                     _DmxTeeToReeMbxMsg.u8Index = E_DMX_TEE_TO_REE_MBX_ACK_MSG_ACTION_FAIL;
449                     break;
450                 }
451                 if(u8Opt == 0)
452                 {
453                     _DMX_TEE_BufParamToMbxParam(stTeeBuf.u32BufAddr, stTeeBuf.u32BufSize, (MS_U8)stTeeBuf.u32Opt, &_DmxTeeToReeMbxMsg);
454                 }
455                 break;
456             case E_DMX_REE_TO_TEE_CMD_SET_FileinBuf:
457             case E_DMX_REE_TO_TEE_CMD_SET_MMFIBuf:
458                 stTeeBuf.u32EngId = ((MS_U32)_Dmx_TEE_msg.u8Parameters[9]) & 0xFF;
459                 if(_DmxTeeToReeMbxMsg.u8ParameterCount != 10)
460                 {
461                     _DmxTeeToReeMbxMsg.u8Index = E_DMX_TEE_TO_REE_MBX_ACK_MSG_ACTION_FAIL;
462                     break;
463                 }
464                 if(_DMX_TEE_MbxParamToBufParam(&_Dmx_TEE_msg, &stTeeBuf.u32BufAddr, &stTeeBuf.u32BufSize, &u8Index) == FALSE)
465                 {
466                     _DmxTeeToReeMbxMsg.u8Index = E_DMX_TEE_TO_REE_MBX_ACK_MSG_ACTION_FAIL;
467                     break;
468                 }
469                 stTeeBuf.u32Opt = ((MS_U32)u8Index) & 0xFF;
470                 if(MApi_DMX_TEE_ProcReeCmd(u8Index, (void*)(&stTeeBuf)) != 0)
471                 {
472                     _DmxTeeToReeMbxMsg.u8Index = E_DMX_TEE_TO_REE_MBX_ACK_MSG_ACTION_FAIL;
473                 }
474                 break;
475             case E_DMX_REE_TO_TEE_CMD_GET_PvrWPtr:
476                 stTeeBuf.u32EngId = ((MS_U32)_Dmx_TEE_msg.u8Parameters[0]) & 0xFF;
477                 if(MApi_DMX_TEE_ProcReeCmd(u8Index, (void*)(&stTeeBuf)) != 0)
478                 {
479                     _DmxTeeToReeMbxMsg.u8Index = E_DMX_TEE_TO_REE_MBX_ACK_MSG_ACTION_FAIL;
480                 }
481                 else
482                 {
483                     _DmxTeeToReeMbxMsg.u8ParameterCount = 5;
484                     _DmxTeeToReeMbxMsg.u8Parameters[0] = stDMX_Tee_Priv_Param._u8PvrBufMiuSel[stTeeBuf.u32EngId];
485                     _DmxTeeToReeMbxMsg.u8Parameters[1] = (MS_U8)(stTeeBuf.u32BufAddr & 0xFFUL);
486                     _DmxTeeToReeMbxMsg.u8Parameters[2] = (MS_U8)((stTeeBuf.u32BufAddr >> 8UL) & 0xFFUL);
487                     _DmxTeeToReeMbxMsg.u8Parameters[3] = (MS_U8)((stTeeBuf.u32BufAddr >> 16UL) & 0xFFUL);
488                     _DmxTeeToReeMbxMsg.u8Parameters[4] = (MS_U8)((stTeeBuf.u32BufAddr >> 24UL) & 0xFFUL);
489                 }
490                 break;
491             default:
492                 _DmxTeeToReeMbxMsg.u8Index = E_DMX_TEE_TO_REE_MBX_ACK_MSG_ACTION_FAIL;
493                 PRINTF(printf("[DMX]%s,wrong command %d sent from HK\n",__FUNCTION__,(unsigned int)u8Index));
494                 break;
495         }
496 
497         MApi_MBX_SendMsg(&_DmxTeeToReeMbxMsg);
498 
499 #if 0
500         if (E_MBX_SUCCESS != result)
501         {
502             PRINTF(printf("[DMX]Ack fail,classid:%x,cmd:%x\n",_DmxTeeToReeMbxMsg.u8MsgClass, _DmxTeeToReeMbxMsg.u8Index));
503         }
504         else
505         {
506             PRINTF(printf("[DMX]Ack ok,classid:%x\n",_DmxTeeToReeMbxMsg.u8MsgClass));
507         }
508 #endif
509     }
510 }
511 
512 #endif   //MSOS_TYPE_NUTTX
513 
514 //-------------------------------------------------------------------------------------------------
515 /// Create DMX Tee service task
516 /// @return TRUE or FALSE for Pass or Fail
517 /// @note Please call this API when Tee system init, and must create this task before DMX init is called
518 //-------------------------------------------------------------------------------------------------
MApi_DMX_TEE_Create_Tee_System(void)519 MS_BOOL MApi_DMX_TEE_Create_Tee_System(void)
520 {
521 
522 #if defined (MSOS_TYPE_NUTTX)
523     if(_u8DmxMbxMsgClass == 0)
524     {
525         if(MApi_MBX_GenerateDynamicClass(E_MBX_CPU_MIPS, "DMX_TEE",&_u8DmxMbxMsgClass) != E_MBX_SUCCESS)
526         {
527             PRINTF(printf("[DMX]DMX GenerateDynamicClass error\n"));
528             _u8DmxMbxMsgClass = 0;
529             return FALSE;
530         }
531 
532         if (E_MBX_SUCCESS != MApi_MBX_RegisterMSGWithCallBack(_u8DmxMbxMsgClass,10,_DMX_TEE_HandleDynamicMBX))
533         {
534             PRINTF(printf("[DMX]TEE Register MBX MSG error\n"));
535             _u8DmxMbxMsgClass = 0;
536             return FALSE;
537         }
538     }
539 
540     if(_s32Dmx_TEE_EventId == -1)
541     {
542         _s32Dmx_TEE_EventId = MsOS_CreateEventGroup("DMX_TEE_Event");
543         if (_s32Dmx_TEE_EventId < 0)
544         {
545             PRINTF(printf("[DMX]TEE CreateEventGroup error....\n"));
546             return FALSE;
547         }
548     }
549 #endif  //MSOS_TYPE_NUTTX
550 
551         _bInit = MDrv_TSP_Tee_Init();
552 
553 #if defined (MSOS_TYPE_NUTTX)
554     if(_s32Dmx_TEE_TaskId == -1)
555     {
556         _s32Dmx_TEE_TaskId = MsOS_CreateTask((TaskEntry)_DMX_TEE_Proc,
557                                               NULL,
558                                               E_TASK_PRI_MEDIUM,
559                                               TRUE,
560                                               (void*)_u8DmxTeeStack,
561                                               DMX_STACK_SIZE,
562                                               "DMX_TEE_Task");
563         if (_s32Dmx_TEE_TaskId < 0)
564         {
565             MsOS_DeleteEventGroup(_s32Dmx_TEE_EventId);
566             PRINTF(printf("[DMX]TEE CreateTask error....\n"));
567             return FALSE;
568         }
569     }
570 #endif //MSOS_TYPE_NUTTX
571 
572     return TRUE;
573 }
574 
575 //------------------------------------------------------------------------------
576 /// SetControl for TEE
577 /// @param cmd \b IN : TEE user cmd
578 /// @param param \b IN : TEE control parameters
579 /// @return MS_BOOL
580 /// @note For buffer control commend, the input parameters should be DMX_TEE_BUF_Param
581 //------------------------------------------------------------------------------
MApi_DMX_TEE_SetControl(DMX_TEE_USER_CMD cmd,void * param)582 MS_BOOL MApi_DMX_TEE_SetControl(DMX_TEE_USER_CMD cmd, void* param)
583 {
584     MS_BOOL ret = TRUE;
585     MS_PHY phyAddr = 0;
586     DMX_TEE_BUF_Param *pTeeBuf = (DMX_TEE_BUF_Param*)param;
587 
588     if(param == NULL)
589     {
590         PRINTF(printf("[DMX_TEE]Invalid param \n"));
591     }
592 
593     switch(cmd)
594     {
595         case E_DMX_TEECMD_SET_TSPFW_BUF:
596             stDMX_Tee_Priv_Param._u32TspFwBufAddr = pTeeBuf->u32BufAddr;
597             stDMX_Tee_Priv_Param._u32TspFwBufAddr_H = pTeeBuf->u32BufAddr_H;
598             stDMX_Tee_Priv_Param._u32TspFwBufSize = pTeeBuf->u32BufSize;
599             stDMX_Tee_Priv_Param._u8TspFwBufMiuSel = (MS_U8)pTeeBuf->u32Opt;
600             PRINTF(printf("DMX_TEE cmd %x, buf %x %x %d\n", (int)cmd,
601                 (int)stDMX_Tee_Priv_Param._u32TspFwBufAddr, (int)stDMX_Tee_Priv_Param._u32TspFwBufSize, (int)stDMX_Tee_Priv_Param._u8TspFwBufMiuSel));
602             break;
603 
604         case E_DMX_TEECMD_SET_TSPVQ_BUF:
605             stDMX_Tee_Priv_Param._u32VQBufAddr = pTeeBuf->u32BufAddr;
606             stDMX_Tee_Priv_Param._u32VQBufAddr_H = pTeeBuf->u32BufAddr_H;
607             stDMX_Tee_Priv_Param._u32VQBufSize = pTeeBuf->u32BufSize;
608             stDMX_Tee_Priv_Param._u8VQBufMiuSel = (MS_U8)(pTeeBuf->u32Opt);
609             PRINTF(printf("[DMX_TEE] cmd %x, buf %x %x %d\n", (int)cmd,
610                 (int)stDMX_Tee_Priv_Param._u32VQBufAddr, (int)stDMX_Tee_Priv_Param._u32VQBufSize, (int)stDMX_Tee_Priv_Param._u8VQBufMiuSel));
611             break;
612 
613         case E_DMX_TEECMD_SET_PVR_BUF:
614             if(pTeeBuf->u32EngId >= DMX_MAX_PVR_ENG_NUM)
615             {
616                 return FALSE;
617             }
618 
619             stDMX_Tee_Priv_Param._u8PvrBufMiuSel[pTeeBuf->u32EngId] = ((MS_U8)pTeeBuf->u32Opt);
620             stDMX_Tee_Priv_Param._u32PVR_Buf0_Addr[pTeeBuf->u32EngId] = pTeeBuf->u32BufAddr;
621             stDMX_Tee_Priv_Param._u32PVR_Buf0_Addr_H[pTeeBuf->u32EngId] = pTeeBuf->u32BufAddr_H;
622             stDMX_Tee_Priv_Param._u32PVR_Buf0_Size[pTeeBuf->u32EngId] = pTeeBuf->u32BufSize >> 1;
623 
624             PRINTF(printf("[DMX_TEE] cmd %x, eng %d , buf %x %x \n", (int)cmd, (int)pTeeBuf->u32EngId,
625                 (int)stDMX_Tee_Priv_Param._u32PVR_Buf0_Addr[pTeeBuf->u32EngId], (int)stDMX_Tee_Priv_Param._u32PVR_Buf0_Size[pTeeBuf->u32EngId]));
626             phyAddr = _DMX_TEE_U32AddrToPhyAddr(pTeeBuf->u32BufAddr, pTeeBuf->u32BufAddr_H);
627             phyAddr += stDMX_Tee_Priv_Param._u32PVR_Buf0_Size[pTeeBuf->u32EngId];
628             _DMX_TEE_PhyAddrToU32Addr(phyAddr, &stDMX_Tee_Priv_Param._u32PVR_Buf1_Addr[pTeeBuf->u32EngId], &stDMX_Tee_Priv_Param._u32PVR_Buf1_Addr_H[pTeeBuf->u32EngId]);
629             stDMX_Tee_Priv_Param._u32PVR_Buf1_Size[pTeeBuf->u32EngId] = stDMX_Tee_Priv_Param._u32PVR_Buf0_Size[pTeeBuf->u32EngId];
630             break;
631 
632         case E_DMX_TEECMD_SET_FILEIN_BUF:
633             if(pTeeBuf->u32EngId >= DMX_MAX_FILEIN_ENG_NUM)
634             {
635                 return FALSE;
636             }
637             stDMX_Tee_Priv_Param._u8FileinMiuSel[pTeeBuf->u32EngId] = (MS_U8)(pTeeBuf->u32Opt);
638             stDMX_Tee_Priv_Param._u32FileinBufAddr[pTeeBuf->u32EngId] = pTeeBuf->u32BufAddr;
639             stDMX_Tee_Priv_Param._u32FileinBufAddr_H[pTeeBuf->u32EngId] = pTeeBuf->u32BufAddr_H;
640             stDMX_Tee_Priv_Param._u32FileinBufSize[pTeeBuf->u32EngId] = pTeeBuf->u32BufSize;
641 
642             PRINTF(printf("[DMX_TEE] cmd %x, eng %d, buf %x %x %d\n", (int)cmd, (int)pTeeBuf->u32EngId,
643                 (int)stDMX_Tee_Priv_Param._u32FileinBufAddr[pTeeBuf->u32EngId], (int)stDMX_Tee_Priv_Param._u32FileinBufSize[pTeeBuf->u32EngId], (int)stDMX_Tee_Priv_Param._u8FileinMiuSel[pTeeBuf->u32EngId]));
644             break;
645 
646         case E_DMX_TEECMD_SET_MMFI_BUF:
647             if(pTeeBuf->u32EngId >= DMX_MAX_MMFI_ENG_NUM)
648             {
649                 return FALSE;
650             }
651             stDMX_Tee_Priv_Param._u8MMFIMiuSel[pTeeBuf->u32EngId] = ((MS_U8)pTeeBuf->u32Opt);
652             stDMX_Tee_Priv_Param._u32MMFIBufAddr[pTeeBuf->u32EngId] = pTeeBuf->u32BufAddr;
653             stDMX_Tee_Priv_Param._u32MMFIBufAddr_H[pTeeBuf->u32EngId] = pTeeBuf->u32BufAddr_H;
654             stDMX_Tee_Priv_Param._u32MMFIBufSize[pTeeBuf->u32EngId] = pTeeBuf->u32BufSize;
655             break;
656 
657         default:
658             PRINTF(printf("[DMX_TEE] Not support cmd,%d\n", (unsigned int)cmd));
659             break;
660     }
661 
662     return ret;
663 }
664 
665 //------------------------------------------------------------------------------
666 /// Process REE commend
667 /// @param cmd \b IN : Ree Commend
668 /// @param param \b IN : TEE control parameters
669 /// @return MS_U32 Error code
670 /// @note For buffer control commend, the input parameters should be DMX_TEE_BUF_Param
671 //------------------------------------------------------------------------------
MApi_DMX_TEE_ProcReeCmd(DMX_REE_TO_TEE_CMD_TYPE cmd,void * param)672 MS_U32 MApi_DMX_TEE_ProcReeCmd(DMX_REE_TO_TEE_CMD_TYPE cmd, void* param)
673 {
674     DMX_TEE_BUF_Param *pTeeBuf = (DMX_TEE_BUF_Param*)param;
675     MS_PHY phyAddr = 0 ,phyAddr1 = 0;
676     MS_U32 u32Res = 0xFFFFFFFF;
677 
678     PRINTF(printf("[DMX_TEE] cmd %d, eng %d , opt %d, buf %x, buf_h %x,, size %d\n", (int)cmd, (int)pTeeBuf->u32EngId, (int)pTeeBuf->u32Opt,
679         (int)pTeeBuf->u32BufAddr , (int)pTeeBuf->u32BufAddr_H, (int)pTeeBuf->u32BufSize));
680 
681     if(_bInit == FALSE)
682     {
683         if((_bInit = MDrv_TSP_Tee_Init()) == FALSE)
684             return u32Res;
685     }
686 
687     switch(cmd)
688     {
689         case E_DMX_REE_TO_TEE_CMD_FW_LoadCode:
690             #if DMX_TEE_DBG
691             stDMX_Tee_Priv_Param._u32TspFwBufAddr = pTeeBuf->u32BufAddr;
692             stDMX_Tee_Priv_Param._u32TspFwBufAddr_H = pTeeBuf->u32BufAddr_H;
693             stDMX_Tee_Priv_Param._u32TspFwBufSize = pTeeBuf->u32BufSize;
694             stDMX_Tee_Priv_Param._u8TspFwBufMiuSel = (MS_U8)pTeeBuf->u32Opt;
695             #endif
696 
697             if(stDMX_Tee_Priv_Param._u32TspFwBufSize == 0)
698             {
699                 break;
700             }
701             phyAddr = _DMX_TEE_U32AddrToPhyAddr(stDMX_Tee_Priv_Param._u32TspFwBufAddr, stDMX_Tee_Priv_Param._u32TspFwBufAddr_H);
702 
703             if(pTeeBuf->u32EngId == 0)
704             {
705                 #if (defined(MSOS_TYPE_OPTEE) && (DMX_TEE_DBG == 0))
706                 MApi_DMX_ConfigPipe(DMX_PIPE_TSPFW, 1, 0); //lock fw buffer first, for oneway
707                 #endif
708                 if(MDrv_TSP_Tee_CopyFw(MsOS_PA2KSEG1(phyAddr), phyAddr, stDMX_Tee_Priv_Param._u32TspFwBufSize) == TRUE)
709                 {
710                     u32Res = 0;
711                 }
712             }
713             else
714             {
715                 memset((void*)MsOS_PA2KSEG1(phyAddr), 0, stDMX_Tee_Priv_Param._u32TspFwBufSize);
716                 MAsm_CPU_Sync();
717                 MsOS_FlushMemory();
718                 #if (defined(MSOS_TYPE_OPTEE) && (DMX_TEE_DBG == 0))
719                 MApi_DMX_ConfigPipe(DMX_PIPE_TSPFW, 0, 0); //unlock fw buffer first, for oneway
720                 #endif
721                 u32Res = 0;
722             }
723             break;
724 
725         case E_DMX_REE_TO_TEE_CMD_SET_VqBuf:
726             #if DMX_TEE_DBG
727             stDMX_Tee_Priv_Param._u32VQBufAddr = pTeeBuf->u32BufAddr;
728             stDMX_Tee_Priv_Param._u32VQBufAddr_H = pTeeBuf->u32BufAddr_H;
729             stDMX_Tee_Priv_Param._u32VQBufSize = pTeeBuf->u32BufSize;
730             stDMX_Tee_Priv_Param._u8VQBufMiuSel = (MS_U8)(pTeeBuf->u32Opt);
731             #endif
732             if(stDMX_Tee_Priv_Param._u32VQBufSize == 0)
733             {
734                 break;
735             }
736 
737             #if (defined(MSOS_TYPE_OPTEE) && (DMX_TEE_DBG == 0))
738             //MApi_DMX_ConfigPipe(DMX_PIPE_TSPVQ, 1, 1); //lock vq buffer first
739             #endif
740 
741             phyAddr = _DMX_TEE_U32AddrToPhyAddr(stDMX_Tee_Priv_Param._u32VQBufAddr, stDMX_Tee_Priv_Param._u32VQBufAddr_H);
742             if(MDrv_TSP_Tee_Set_VQBuffer(phyAddr, stDMX_Tee_Priv_Param._u32VQBufSize) == TRUE)
743             {
744                 u32Res = 0;
745             }
746             break;
747 
748         case E_DMX_REE_TO_TEE_CMD_SET_PvrBuf:
749             #if DMX_TEE_DBG
750             stDMX_Tee_Priv_Param._u8PvrBufMiuSel[pTeeBuf->u32EngId] = ((MS_U8)pTeeBuf->u32Opt);
751             stDMX_Tee_Priv_Param._u32PVR_Buf0_Addr[pTeeBuf->u32EngId] = pTeeBuf->u32BufAddr;
752             stDMX_Tee_Priv_Param._u32PVR_Buf0_Addr_H[pTeeBuf->u32EngId] = pTeeBuf->u32BufAddr_H;
753             stDMX_Tee_Priv_Param._u32PVR_Buf0_Size[pTeeBuf->u32EngId] = pTeeBuf->u32BufSize >> 1;
754             stDMX_Tee_Priv_Param._u32PVR_Buf1_Addr[pTeeBuf->u32EngId] = pTeeBuf->u32BufAddr+stDMX_Tee_Priv_Param._u32PVR_Buf0_Addr[pTeeBuf->u32EngId];
755             stDMX_Tee_Priv_Param._u32PVR_Buf1_Addr_H[pTeeBuf->u32EngId] = pTeeBuf->u32BufAddr_H;
756             stDMX_Tee_Priv_Param._u32PVR_Buf1_Size[pTeeBuf->u32EngId] = pTeeBuf->u32BufSize >> 1;
757             #endif
758             if(pTeeBuf->u32BufSize != 0)
759             {
760                 if((stDMX_Tee_Priv_Param._u32PVR_Buf0_Addr[pTeeBuf->u32EngId] == 0) || (stDMX_Tee_Priv_Param._u32PVR_Buf0_Size[pTeeBuf->u32EngId] == 0))
761                 {
762                     break;
763                 }
764                 phyAddr = _DMX_TEE_U32AddrToPhyAddr(stDMX_Tee_Priv_Param._u32PVR_Buf0_Addr[pTeeBuf->u32EngId], stDMX_Tee_Priv_Param._u32PVR_Buf0_Addr_H[pTeeBuf->u32EngId]);
765                 phyAddr1 = _DMX_TEE_U32AddrToPhyAddr(stDMX_Tee_Priv_Param._u32PVR_Buf1_Addr[pTeeBuf->u32EngId], stDMX_Tee_Priv_Param._u32PVR_Buf1_Addr_H[pTeeBuf->u32EngId]);
766                 if(MDrv_TSP_Tee_Set_PVRBuffer((MS_U8)pTeeBuf->u32EngId, phyAddr, stDMX_Tee_Priv_Param._u32PVR_Buf0_Size[pTeeBuf->u32EngId], phyAddr1,
767                     stDMX_Tee_Priv_Param._u32PVR_Buf1_Size[pTeeBuf->u32EngId]) == TRUE)
768                 {
769                     pTeeBuf->u32BufAddr = stDMX_Tee_Priv_Param._u32PVR_Buf0_Addr[pTeeBuf->u32EngId];
770                     pTeeBuf->u32BufAddr_H = stDMX_Tee_Priv_Param._u32PVR_Buf0_Addr_H[pTeeBuf->u32EngId];
771                     pTeeBuf->u32BufSize = stDMX_Tee_Priv_Param._u32PVR_Buf0_Size[pTeeBuf->u32EngId] + stDMX_Tee_Priv_Param._u32PVR_Buf1_Size[pTeeBuf->u32EngId];
772                     pTeeBuf->u32Opt = ((MS_U32)(stDMX_Tee_Priv_Param._u8PvrBufMiuSel[pTeeBuf->u32EngId])) & 0xFF;
773                     u32Res = 0;
774                 }
775             }
776             else //reset buffer to 0
777             {
778                 if(MDrv_TSP_Tee_Set_PVRBuffer((MS_U8)pTeeBuf->u32EngId, 0, 0, 0, 0) == TRUE)
779                 {
780                     stDMX_Tee_Priv_Param._u32PVR_Buf0_Addr[pTeeBuf->u32EngId] = 0;
781                     stDMX_Tee_Priv_Param._u32PVR_Buf0_Addr_H[pTeeBuf->u32EngId] = 0;
782                     stDMX_Tee_Priv_Param._u32PVR_Buf0_Size[pTeeBuf->u32EngId] = 0;
783                     stDMX_Tee_Priv_Param._u32PVR_Buf1_Addr[pTeeBuf->u32EngId] = 0;
784                     stDMX_Tee_Priv_Param._u32PVR_Buf1_Addr_H[pTeeBuf->u32EngId] = 0;
785                     stDMX_Tee_Priv_Param._u32PVR_Buf1_Size[pTeeBuf->u32EngId] = 0;
786                     stDMX_Tee_Priv_Param._u8PvrBufMiuSel[pTeeBuf->u32EngId] = 0;
787                     u32Res = 0;
788                 }
789             }
790             break;
791 
792         case E_DMX_REE_TO_TEE_CMD_SET_FileinBuf:
793             #if DMX_TEE_DBG
794             stDMX_Tee_Priv_Param._u8FileinMiuSel[pTeeBuf->u32EngId] = (MS_U8)(pTeeBuf->u32Opt);
795             stDMX_Tee_Priv_Param._u32FileinBufAddr[pTeeBuf->u32EngId] = pTeeBuf->u32BufAddr;
796             stDMX_Tee_Priv_Param._u32FileinBufAddr_H[pTeeBuf->u32EngId] = pTeeBuf->u32BufAddr_H;
797             stDMX_Tee_Priv_Param._u32FileinBufSize[pTeeBuf->u32EngId] = pTeeBuf->u32BufSize;
798             #endif
799 
800             phyAddr = _DMX_TEE_U32AddrToPhyAddr(pTeeBuf->u32BufAddr, pTeeBuf->u32BufAddr_H);
801             phyAddr1 = _DMX_TEE_U32AddrToPhyAddr(stDMX_Tee_Priv_Param._u32FileinBufAddr[pTeeBuf->u32EngId], stDMX_Tee_Priv_Param._u32FileinBufAddr_H[pTeeBuf->u32EngId]);
802 
803             PRINTF(printf("[DMX_TEE] cmd %x, eng %d, phyAddr %x phyAddr1 %x \n", (int)cmd, (int)pTeeBuf->u32EngId, (int)phyAddr, (int)phyAddr1));
804             if((((MS_U8)pTeeBuf->u32Opt) == stDMX_Tee_Priv_Param._u8FileinMiuSel[pTeeBuf->u32EngId]) &&
805                     (phyAddr >= phyAddr1) &&
806                     ((phyAddr + pTeeBuf->u32BufSize) <= (phyAddr1 + stDMX_Tee_Priv_Param._u32FileinBufSize[pTeeBuf->u32EngId])))
807             {
808                 if(MDrv_TSP_Tee_Set_FileinBuffer((MS_U8)pTeeBuf->u32EngId, phyAddr, pTeeBuf->u32BufSize) == TRUE)
809                 {
810                     u32Res = 0;
811                 }
812             }
813             else
814             {
815                 MDrv_TSP_Tee_Set_FileinBuffer((MS_U8)pTeeBuf->u32EngId, 0, 0);
816             }
817             break;
818 
819         case E_DMX_REE_TO_TEE_CMD_SET_MMFIBuf:
820             phyAddr = _DMX_TEE_U32AddrToPhyAddr(pTeeBuf->u32BufAddr, pTeeBuf->u32BufAddr_H);
821             phyAddr1 = _DMX_TEE_U32AddrToPhyAddr(stDMX_Tee_Priv_Param._u32MMFIBufAddr[pTeeBuf->u32EngId], stDMX_Tee_Priv_Param._u32MMFIBufAddr_H[pTeeBuf->u32EngId]);
822             if((((MS_U8)pTeeBuf->u32Opt) == stDMX_Tee_Priv_Param._u8MMFIMiuSel[pTeeBuf->u32EngId]) &&
823                     (phyAddr >= phyAddr1) &&
824                     ((phyAddr + pTeeBuf->u32BufSize) <= (phyAddr1 + stDMX_Tee_Priv_Param._u32MMFIBufSize[pTeeBuf->u32EngId])))
825             {
826                 if(MDrv_TSP_Tee_Set_MMFIBuffer((MS_U8)pTeeBuf->u32EngId, phyAddr, pTeeBuf->u32BufSize) == TRUE)
827                 {
828                     u32Res = 0;
829                 }
830             }
831             else
832             {
833                 MDrv_TSP_Tee_Set_MMFIBuffer((MS_U8)pTeeBuf->u32EngId, 0, 0);
834             }
835             break;
836 
837         case E_DMX_REE_TO_TEE_CMD_GET_PvrWPtr:
838             if(MDrv_TSP_Tee_Get_PVRWriteAddr((MS_U8)pTeeBuf->u32EngId, &phyAddr) == TRUE)
839             {
840                 _DMX_TEE_PhyAddrToU32Addr(phyAddr, &pTeeBuf->u32BufAddr, &pTeeBuf->u32BufAddr_H);
841                 PRINTF(printf("[DMX_TEE] W 0x%x\n", (int)phyAddr));
842                 u32Res = 0;
843             }
844             else
845             {
846                 pTeeBuf->u32BufAddr = 0;
847                 pTeeBuf->u32BufAddr_H = 0;
848             }
849             break;
850 
851         default:
852             break;
853     }
854 
855     return u32Res;
856 }
857 
858 #ifdef MSOS_TYPE_OPTEE
859 //------------------------------------------------------------------------------
860 /// Get secure resource by Pipe ID
861 /// @param u32PipeID \b IN : Pipe ID
862 /// @param pu32MaxNRetRes \b IN : Pointer to store max request resource number
863 /// @param pResource \b OUT : Pointer to store resource data
864 /// @return MS_U32 Error code
865 //------------------------------------------------------------------------------
MApi_DMX_GetResourceByPipeID(MS_U32 u32PipeID,MS_U32 * pu32MaxNRetRes,DMX_TEE_RESOURCE * pResource)866 MS_U32 MApi_DMX_GetResourceByPipeID(MS_U32 u32PipeID, MS_U32* pu32MaxNRetRes, DMX_TEE_RESOURCE* pResource)
867 {
868     PRINTF(printf("[DMX_TEE] u32PipeID %x \n", (int)u32PipeID));
869 
870     if(u32PipeID == DMX_PIPE_NULL)
871         return UTOPIA_STATUS_FAIL;
872 
873     pResource->ID[0] = u32PipeID;
874     pResource->ID[1] = 0; pResource->ID[2] = 0; pResource->ID[3] = 0;
875 
876     switch(u32PipeID)
877     {
878         case DMX_PIPE_TSPFW:
879             pResource->ID[0] = stDMX_Tee_Priv_Param._u32TspFwBufSize;;
880             pResource->ID[1] = stDMX_Tee_Priv_Param._u32TspFwBufAddr;
881             pResource->ID[2] = stDMX_Tee_Priv_Param._u32TspFwBufAddr_H;
882             break;
883 
884         case DMX_PIPE_TSPVQ:
885             pResource->ID[0] = stDMX_Tee_Priv_Param._u32VQBufSize;
886             pResource->ID[1] = stDMX_Tee_Priv_Param._u32VQBufAddr;
887             pResource->ID[2] = stDMX_Tee_Priv_Param._u32VQBufAddr_H;
888             break;
889 
890         case DMX_PIPE_PVR_0:
891         case DMX_PIPE_PVR_1:
892         case DMX_PIPE_PVR_2:
893         case DMX_PIPE_PVR_3:
894             pResource->ID[0] = stDMX_Tee_Priv_Param._u32PVR_Buf0_Size[u32PipeID & 0xFF] + stDMX_Tee_Priv_Param._u32PVR_Buf1_Size[u32PipeID & 0xFF];
895             pResource->ID[1] = stDMX_Tee_Priv_Param._u32PVR_Buf0_Addr[u32PipeID & 0xFF];
896             pResource->ID[2] = stDMX_Tee_Priv_Param._u32PVR_Buf0_Addr_H[u32PipeID & 0xFF];
897             break;
898 
899         case DMX_PIPE_FILE_0:
900         case DMX_PIPE_FILE_1:
901         case DMX_PIPE_FILE_2:
902         case DMX_PIPE_FILE_3:
903             pResource->ID[0] = stDMX_Tee_Priv_Param._u32FileinBufSize[u32PipeID & 0xFF];
904             pResource->ID[1] = stDMX_Tee_Priv_Param._u32FileinBufAddr[u32PipeID & 0xFF];
905             pResource->ID[2] = stDMX_Tee_Priv_Param._u32FileinBufAddr_H[u32PipeID & 0xFF];
906             break;
907 
908         case DMX_PIPE_MMFI_0:
909         case DMX_PIPE_MMFI_1:
910             pResource->ID[0] = stDMX_Tee_Priv_Param._u32MMFIBufSize[u32PipeID & 0xFF];
911             pResource->ID[1] = stDMX_Tee_Priv_Param._u32MMFIBufAddr[u32PipeID & 0xFF];
912             pResource->ID[2] = stDMX_Tee_Priv_Param._u32MMFIBufAddr_H[u32PipeID & 0xFF];
913             break;
914 
915         default:
916             return UTOPIA_STATUS_NOT_SUPPORTED;
917     }
918 
919     *pu32MaxNRetRes = 1;
920 
921     PRINTF(printf("[DMX_TEE] pu32MaxNRetRes %x, pResource %x %x %x %x \n",(int)pu32MaxNRetRes, (int)pResource->ID[0], (int)pResource->ID[1], (int)pResource->ID[2], (int)pResource->ID[3]));
922 
923     return UTOPIA_STATUS_SUCCESS;
924 }
925 
926 //------------------------------------------------------------------------------
927 /// Configure secure resource by pipe ID
928 /// @param u32PipeID \b IN : Pipe ID
929 /// @param u32SecureDMA \b IN : 0 -> non-secure dma mode; 1 -> secure dma mode
930 /// @param u32OperationMode \b IN : 0 -> unlock output; 1 -> lock output
931 /// @return MS_U32 Error code
932 //------------------------------------------------------------------------------
MApi_DMX_ConfigPipe(MS_U32 u32PipeID,MS_U32 u32SecureDMA,MS_U32 u32OperationMode)933 MS_U32 MApi_DMX_ConfigPipe(MS_U32 u32PipeID, MS_U32 u32SecureDMA, MS_U32 u32OperationMode)
934 {
935     MS_PHY phyAddr = 0;
936     MS_U32 u32Size = 0;
937     MS_U32 u32EngId = u32PipeID;
938 
939     PRINTF(printf("[DMX_TEE] u32PipeID %x , u32SecureDMA %x, u32OperationMode %x\n", (int)u32PipeID, (int)u32SecureDMA, (int)u32OperationMode));
940 
941     if(u32PipeID == DMX_PIPE_NULL)
942         return UTOPIA_STATUS_FAIL;
943 
944 
945     if(MDrv_Seal_ChangeIPSecureDMAAbillity(MODULE_DMX, 0 , u32SecureDMA) == FALSE)
946     {
947         PRINTF(printf("[DMX_TEE] MDrv_Seal_ChangeIPSecureDMAAbillity fail\n"));
948         return UTOPIA_STATUS_FAIL;
949     }
950 
951 
952     switch(u32PipeID)
953     {
954         case DMX_PIPE_TSPFW:
955             phyAddr = _DMX_TEE_U32AddrToPhyAddr(stDMX_Tee_Priv_Param._u32TspFwBufAddr, stDMX_Tee_Priv_Param._u32TspFwBufAddr_H);
956             u32Size = stDMX_Tee_Priv_Param._u32TspFwBufSize;
957             stDMX_Tee_Priv_Param._u32TspFwBufSerSta = u32SecureDMA;
958             break;
959 
960         case DMX_PIPE_TSPVQ:
961             phyAddr = _DMX_TEE_U32AddrToPhyAddr(stDMX_Tee_Priv_Param._u32VQBufAddr, stDMX_Tee_Priv_Param._u32VQBufAddr_H);
962             u32Size = stDMX_Tee_Priv_Param._u32VQBufSize;
963             stDMX_Tee_Priv_Param._u32VQBufSerSta = u32SecureDMA;
964             break;
965 
966         case DMX_PIPE_PVR_0:
967         case DMX_PIPE_PVR_1:
968         case DMX_PIPE_PVR_2:
969         case DMX_PIPE_PVR_3:
970             phyAddr = _DMX_TEE_U32AddrToPhyAddr(stDMX_Tee_Priv_Param._u32PVR_Buf0_Addr[u32PipeID & 0xFF], stDMX_Tee_Priv_Param._u32PVR_Buf0_Addr_H[u32PipeID & 0xFF]);
971             u32Size = stDMX_Tee_Priv_Param._u32PVR_Buf0_Size[u32PipeID & 0xFF] + stDMX_Tee_Priv_Param._u32PVR_Buf1_Size[u32PipeID & 0xFF];
972             stDMX_Tee_Priv_Param._u32PVR_BufSerSta[u32PipeID & 0xFF] = u32SecureDMA;
973             break;
974 
975         case DMX_PIPE_FILE_0:
976         case DMX_PIPE_FILE_1:
977         case DMX_PIPE_FILE_2:
978         case DMX_PIPE_FILE_3:
979             phyAddr = _DMX_TEE_U32AddrToPhyAddr(stDMX_Tee_Priv_Param._u32FileinBufAddr[u32PipeID & 0xFF], stDMX_Tee_Priv_Param._u32FileinBufAddr_H[u32PipeID & 0xFF]);
980             u32Size = stDMX_Tee_Priv_Param._u32FileinBufSize[u32PipeID & 0xFF];
981             stDMX_Tee_Priv_Param._u32FileinBufSerSta[u32PipeID & 0xFF] = u32SecureDMA;
982             break;
983 
984         case DMX_PIPE_MMFI_0:
985         case DMX_PIPE_MMFI_1:
986             phyAddr = _DMX_TEE_U32AddrToPhyAddr(stDMX_Tee_Priv_Param._u32MMFIBufAddr[u32PipeID & 0xFF], stDMX_Tee_Priv_Param._u32MMFIBufAddr_H[u32PipeID & 0xFF]);
987             u32Size = stDMX_Tee_Priv_Param._u32MMFIBufSize[u32PipeID & 0xFF];
988             stDMX_Tee_Priv_Param._u32MMFIBufSerSta[u32PipeID & 0xFF] = u32SecureDMA;
989             break;
990 
991         default:
992             return UTOPIA_STATUS_NOT_SUPPORTED;
993     }
994 
995     if(MDrv_Seal_SetSecureRange(phyAddr, u32Size, u32OperationMode) == FALSE)
996     {
997         PRINTF(printf("[DMX_TEE] MDrv_Seal_SetSecureRange fail\n"));
998         return UTOPIA_STATUS_FAIL;
999     }
1000 
1001 
1002     if((u32PipeID & DMX_PIPE_FILE_0) == DMX_PIPE_FILE_0)
1003     {
1004         if((u32PipeID != DMX_PIPE_MMFI_0) && (u32PipeID != DMX_PIPE_MMFI_1))
1005         {
1006             u32EngId = DMX_PIPE_FILE_0 | MDrv_TSP_Tee_FileEngId_Vir2Phy((MS_U8)u32PipeID);
1007         }
1008     }
1009 
1010     switch(u32EngId)
1011     {
1012         case DMX_PIPE_TSPFW:
1013             MDrv_Seal_BufferLock(E_SEAL_TSP0_WP_FW, (MS_BOOL)u32OperationMode);
1014             MDrv_Seal_BufferLock(E_SEAL_TSP0_RP_FW, (MS_BOOL)u32OperationMode);
1015             break;
1016 
1017         case DMX_PIPE_TSPVQ:
1018             MDrv_Seal_BufferLock(E_SEAL_TSP_WP_VQ, (MS_BOOL)u32OperationMode);
1019             MDrv_Seal_BufferLock(E_SEAL_TSP_RP_VQ, (MS_BOOL)u32OperationMode);
1020             break;
1021 
1022         case DMX_PIPE_PVR_0:
1023             MDrv_Seal_BufferLock(E_SEAL_TSP0_WP_PVR, (MS_BOOL)u32OperationMode);
1024             MDrv_Seal_BufferLock(E_SEAL_TSP0_RP_PVR, (MS_BOOL)u32OperationMode);
1025             break;
1026 
1027         case DMX_PIPE_PVR_1:
1028             MDrv_Seal_BufferLock(E_SEAL_TSP0_WP_PVR1, (MS_BOOL)u32OperationMode);
1029             MDrv_Seal_BufferLock(E_SEAL_TSP0_RP_PVR1, (MS_BOOL)u32OperationMode);
1030             break;
1031 
1032         case DMX_PIPE_PVR_2:
1033             MDrv_Seal_BufferLock(E_SEAL_TSP0_WP_PVR2, (MS_BOOL)u32OperationMode);
1034             MDrv_Seal_BufferLock(E_SEAL_TSP0_RP_PVR2, (MS_BOOL)u32OperationMode);
1035             break;
1036 
1037         case DMX_PIPE_PVR_3:
1038             MDrv_Seal_BufferLock(E_SEAL_TSP_WP_PVR3, (MS_BOOL)u32OperationMode);
1039             MDrv_Seal_BufferLock(E_SEAL_TSP_RP_PVR3, (MS_BOOL)u32OperationMode);
1040             break;
1041 
1042         case DMX_PIPE_FILE_0:
1043             MDrv_Seal_BufferLock(E_SEAL_TSP0_WP_FILEIN, (MS_BOOL)u32OperationMode);
1044             MDrv_Seal_BufferLock(E_SEAL_TSP0_RP_FILEIN, (MS_BOOL)u32OperationMode);
1045             break;
1046 
1047         case DMX_PIPE_FILE_1:
1048             MDrv_Seal_BufferLock(E_SEAL_TSP0_WP_FILEIN1, (MS_BOOL)u32OperationMode);
1049             MDrv_Seal_BufferLock(E_SEAL_TSP0_RP_FILEIN1, (MS_BOOL)u32OperationMode);
1050             break;
1051 
1052         case DMX_PIPE_FILE_2:
1053             MDrv_Seal_BufferLock(E_SEAL_TSP_WP_FILEIN2, (MS_BOOL)u32OperationMode);
1054             MDrv_Seal_BufferLock(E_SEAL_TSP_RP_FILEIN2, (MS_BOOL)u32OperationMode);
1055             break;
1056 
1057         case DMX_PIPE_FILE_3:
1058             MDrv_Seal_BufferLock(E_SEAL_TSP_WP_FILEIN3, (MS_BOOL)u32OperationMode);
1059             MDrv_Seal_BufferLock(E_SEAL_TSP_WP_FILEIN3, (MS_BOOL)u32OperationMode);
1060             break;
1061 
1062         case DMX_PIPE_MMFI_0:
1063             MDrv_Seal_BufferLock(E_SEAL_MMFI_WP_MMFI0, (MS_BOOL)u32OperationMode);
1064             MDrv_Seal_BufferLock(E_SEAL_MMFI_RP_MMFI0, (MS_BOOL)u32OperationMode);
1065             break;
1066 
1067         case DMX_PIPE_MMFI_1:
1068             MDrv_Seal_BufferLock(E_SEAL_MMFI_WP_MMFI1, (MS_BOOL)u32OperationMode);
1069             MDrv_Seal_BufferLock(E_SEAL_MMFI_RP_MMFI1, (MS_BOOL)u32OperationMode);
1070             break;
1071 
1072         default:
1073             return UTOPIA_STATUS_NOT_SUPPORTED;
1074     }
1075 
1076     PRINTF(printf("[DMX_TEE] MApi_DMX_ConfigPipe OK\n"));
1077 
1078     return UTOPIA_STATUS_SUCCESS;
1079 }
1080 
1081 //------------------------------------------------------------------------------
1082 /// Check secure resource status by pipe ID
1083 /// @param u32PipeID \b IN : Pipe ID
1084 /// @param u32SecureDMA \b IN : 0 -> non-secure dma mode; 1 -> secure dma mode
1085 /// @param u32OperationMode \b IN : 0 -> unlock output; 1 -> lock output
1086 /// @return MS_U32 Status: 0 -> Configure failed; 1 -> Configure OK
1087 //------------------------------------------------------------------------------
MApi_DMX_CheckPipe(MS_U32 u32PipeID,MS_U32 u32SecureDMA,MS_U32 u32OperationMode)1088 MS_U32 MApi_DMX_CheckPipe(MS_U32 u32PipeID, MS_U32 u32SecureDMA, MS_U32 u32OperationMode)
1089 {
1090     PRINTF(printf("[DMX_TEE] u32PipeID %x , u32SecureDMA %x, u32OperationMode %x\n", (int)u32PipeID, (int)u32SecureDMA, (int)u32OperationMode));
1091 
1092     if(u32PipeID == DMX_PIPE_NULL)
1093         return UTOPIA_STATUS_FAIL;
1094 
1095     switch(u32PipeID)
1096     {
1097         case DMX_PIPE_TSPFW:
1098             if(stDMX_Tee_Priv_Param._u32TspFwBufSerSta == 0)
1099                 return UTOPIA_STATUS_FAIL;
1100 
1101         case DMX_PIPE_TSPVQ:
1102             if(stDMX_Tee_Priv_Param._u32VQBufSerSta == 0)
1103                 return UTOPIA_STATUS_FAIL;
1104 
1105         case DMX_PIPE_PVR_0:
1106         case DMX_PIPE_PVR_1:
1107         case DMX_PIPE_PVR_2:
1108         case DMX_PIPE_PVR_3:
1109             if(stDMX_Tee_Priv_Param._u32PVR_BufSerSta[u32PipeID & 0xFF] == 0)
1110                 return UTOPIA_STATUS_FAIL;
1111 
1112         case DMX_PIPE_FILE_0:
1113         case DMX_PIPE_FILE_1:
1114         case DMX_PIPE_FILE_2:
1115         case DMX_PIPE_FILE_3:
1116             if(stDMX_Tee_Priv_Param._u32FileinBufSerSta[u32PipeID & 0xFF] == 0)
1117                 return UTOPIA_STATUS_FAIL;
1118 
1119         case DMX_PIPE_MMFI_0:
1120         case DMX_PIPE_MMFI_1:
1121             if(stDMX_Tee_Priv_Param._u32MMFIBufSerSta[u32PipeID & 0xFF] == 0)
1122                 return UTOPIA_STATUS_FAIL;
1123 
1124         default:
1125             return UTOPIA_STATUS_FAIL;
1126     }
1127 
1128     return UTOPIA_STATUS_SUCCESS;
1129 }
1130 #endif //MSOS_TYPE_OPTEE
1131