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93 ////////////////////////////////////////////////////////////////////////////////
94
95 ////////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// file apiDMX.c
98 /// @brief Demux API
99 /// @author MStar Semiconductor,Inc.
100 ////////////////////////////////////////////////////////////////////////////////////////////////////
101
102 #ifdef MSOS_TYPE_LINUX_KERNEL
103 #include <linux/string.h>
104 #include <linux/uaccess.h>
105 #include <linux/compat.h>
106 #else
107 #include <string.h>
108 #endif
109 #include "MsCommon.h"
110 #include "MsVersion.h"
111 #include "MsOS.h"
112 #include "ULog.h"
113
114 #ifdef MMFILEIN
115 #include "drvMMFilein.h"
116 #endif
117
118 #include "drvTSP.h"
119 #include "apiDMX.h"
120 #include "apiDMX_tsio.h"
121 #include "apiDMX_private.h"
122
123 #ifdef TSO_ENABLE
124 #include "drvTSO.h"
125 #endif
126
127 #ifdef TSIO_ENABLE
128 #include "drvTSIO.h"
129 #endif
130
131 #ifdef FQ_ENABLE
132 #include "drvFQ.h"
133 #endif
134
135 #include "utopia.h"
136
137 //#include "drvMIU.h"
138
139 #if DMX_DEBUG
140 #include "Internal_DMX_debug.h"
141 #endif
142
143 #ifdef DMX_RESET_FI_TIMESTAMP
144 #include "halCHIP.h"
145 #endif
146
147 // reserved functions, internal use only
148 TSP_Result MDrv_TSP_Suspend(void);
149 TSP_Result MDrv_TSP_Resume(MS_PHY phyFWAddr, MS_U32 u32FWSize);
150 TSP_Result MDrv_TSP_Alive(MS_U32 u32EngId);
151 TSP_Result MDrv_TSP_Reset(void);
152
153 #ifdef MSOS_TYPE_LINUX_KERNEL
154 extern void SerPrintf(char *fmt,...);
155 #endif
156
157 // Preprocessor warning notification
158 #if (DMX_SECT_FLT_DEPTH != DRVTSP_FILTER_DEPTH)
159 #error "DMX_SECT_FLT_DEPTH is inconsistent with DRVTSP_FILTER_DEPTH";
160 #endif
161
162 //------------------------------------------------------------------------------
163 // Compile options
164 //------------------------------------------------------------------------------
165 #define DMX_DBG_LINUX FALSE
166
167 #define DMX_MUTEX
168
169 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
170 #define DMX_FLT_DS_SIZE 160UL
171 #else
172 #define DMX_FLT_DS_SIZE 768UL
173 #endif
174
175 #define DMX_MAX_IF_NUM DMX_PVR_ENG_NUM
176
177 // Pocily Mamager Pipie id definitation
178 #define DMX_PIPE_NULL 0xFFFFFFFF
179 #define DMX_PIPE_TSPFW 0x00000001
180 #define DMX_PIPE_TSPVQ 0x00000002
181 #define DMX_PIPE_PVR_0 0x80000000
182 #define DMX_PIPE_PVR_1 0x80000001
183 #define DMX_PIPE_FILE_0 0x40000000
184 #define DMX_PIPE_FILE_1 0x40000001
185 #define DMX_PIPE_FILE_2 0x40000002
186 #define DMX_PIPE_MMFI_0 0x41000000
187 #define DMX_PIPE_MMFI_1 0x41000001
188
189 //------------------------------------------------------------------------------
190 // Debug Macros
191 //------------------------------------------------------------------------------
192 // for debugging test only
193 #define DMX_DBG_LINE() ULOGD("DMX", "[%s]-[%d]\n", __FUNCTION__, __LINE__);
194
195 //-------------------------------------------------------------------------------------------------
196 // Local Defines
197 //-------------------------------------------------------------------------------------------------
198 #ifdef MSOS_TYPE_LINUX_KERNEL
199 #define CPY_FROM_USER copy_from_user
200 #define CPY_to_USER copy_to_user
201 #else
202 #define CPY_FROM_USER memcpy
203 #define CPY_to_USER memcpy
204 #endif //MSOS_TYPE_LINUX_KERNEL
205
206 #if (defined(MSOS_TYPE_LINUX_KERNEL) && defined(CONFIG_COMPAT))
207 #define CMP_CPY_FROM_USER(a,b,c) (is_compat_task()? copy_from_user(a, compat_ptr((unsigned long)b), c) : copy_from_user(a, b, c))
208 #define CMP_CPY_TO_USER(a,b,c) (is_compat_task()? copy_to_user(compat_ptr((unsigned long)a), b, c) : copy_to_user(a, b, c))
209
210 #else
211 #define CMP_CPY_FROM_USER CPY_FROM_USER
212 #define CMP_CPY_TO_USER CPY_to_USER
213 #endif //CONFIG_COMPAT
214
215 //------------------------------------------------------------------------------
216 // Constant definition
217 //------------------------------------------------------------------------------
218 #define DMX_MAX_FLTID _pdmx_res->_u32TspFltNum
219 #define _DMX_MUTEX_TIMEOUT 10000UL //MSOS_WAIT_FOREVER
220
221 //------------------------------------------------------------------------------
222 // Internal data structure
223 //------------------------------------------------------------------------------
224 typedef struct
225 {
226 MS_U32 FltId;
227 MS_U32 SecBufId;
228 MS_U16 u16Pid;
229 DMX_Flt_info FltInfo;
230 DMX_FILTER_TYPE DmxFltType;
231 DMX_Type2NotifyCb_Ex pType2Notify_Ex;// section callback (tpye2)
232 #if !defined (__aarch64__)
233 MS_U32 u32AlignDummy0; //align size for MI init share mem size check fail
234 #endif
235 void * pType2NotifyParamEx;
236 #if !defined (__aarch64__)
237 MS_U32 u32AlignDummy1; //align size for MI init share mem size check fail
238 #endif
239 } _DMX_Flt;
240
241 typedef struct _DMX_RESOURCE_PRIVATE
242 {
243 MS_BOOL bResoureInit;
244
245 _DMX_Flt _FltList[DMX_FLT_DS_SIZE];
246 DMX_NotifyCb _PvrNotify[DMX_MAX_IF_NUM];
247 #if !defined (__aarch64__)
248 MS_U32 u32AlignDummy[DMX_MAX_IF_NUM]; //align size for MI init share mem size check fail
249 #endif
250
251 #ifdef DMX_MUTEX
252 MS_S32 _Dmx_Mutex;
253 MS_S32 _Dmx_Pvr_Mutex;
254 MS_S32 _Dmx_MMFI_Mutex;
255 MS_S32 _Dmx_TSO_Mutex;
256 #endif // #ifdef DMX_MUTEX
257
258 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
259 MS_BOOL _bPVRCA_RecAll[DMX_MAX_IF_NUM];
260 MS_U32 _u32PVREngSrc[DMX_MAX_IF_NUM];
261 #endif
262
263 MS_BOOL _bFWInit;
264
265 #if(defined(VQ_ENABLE) && defined(TS2_IF_SUPPORT) && (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0)))
266 MS_BOOL _bVQEnabled;
267 #endif
268 MS_U32 _u32TspFltNum;
269
270 MS_PHY _phyTspFwAddr;
271 MS_U32 _u32TspFwSize;
272 MS_PHY _phyVQAddr;
273 MS_U32 _u32VQSize;
274 MS_U32 _u32IsHK;
275
276 #ifdef DMX_RESET_FI_TIMESTAMP
277 MS_BOOL _bPlayTimestampEnable[DMX_FILEIN_INVALID];
278 MS_PHY _phyFI192DummyBufAddr;
279 MS_U32 _u32FI192DummyBufSize;
280 #endif
281
282 MS_U32 _u32LibMode;
283
284 MS_BOOL _bEnableInitRefCnt;
285 MS_U8 _u8InitRefCnt;
286
287 #ifdef FQ_ENABLE
288 DrvFQ_SrcIf _eFqSrc;
289 #endif
290
291 #ifdef SECURE_PVR_ENABLE
292 DrvTSP_SecureBuf _stSecBuf;
293 #endif
294
295 MS_BOOL _bIsDMXOpenCalled; //MApi_DMX_Open is called
296 MS_BOOL _bIsDMXOpenExCalled; //MApi_DMX_Open_Ex is called
297
298 }DMX_RESOURCE_PRIVATE;
299
300 typedef struct
301 {
302 char strCap[32];
303 MS_S32 OutputSize;
304 DMX_QUERY_TYPE eCapType;
305 }_DMX_CAP_STRTBL;
306
307 //------------------------------------------------------------------------------
308 // Helper Macros
309 //------------------------------------------------------------------------------
310 // Filter management
311 #define _FLT_LIST_RESET() \
312 { \
313 MS_U32 i; \
314 for (i= 0; i< DMX_FLT_DS_SIZE; i++) \
315 { \
316 _FLT_LIST_REMOVE(i); \
317 } \
318 }
319
320 //For TV series, Section Filer ID is the same as section buffer ID, DMXId = FltId
321 //For Box series, PID filter ID is the same as Section Filter ID, FltId = SecBufId
322 #define _FLT_LIST_SECFLT_TYPE_SET(DMXId, inFltId, inSecBufId, inDmxFltType) \
323 do{ \
324 _pdmx_res->_FltList[(DMXId)].FltId = (inFltId); \
325 _pdmx_res->_FltList[(DMXId)].SecBufId = (inSecBufId); \
326 _pdmx_res->_FltList[(DMXId)].DmxFltType = (inDmxFltType); \
327 }while(0);
328
329 #define _FLT_LIST_SECFLT_BUFID_GET(DMXId) _pdmx_res->_FltList[(DMXId)].SecBufId
330
331 #define _FLT_LIST_TYPE_GET(DMXId, pDmxFltType) \
332 *(pDmxFltType) = _pdmx_res->_FltList[(DMXId)].DmxFltType; \
333
334 #define _FLT_LIST_INFO_SET(DMXId, pFltInfo) \
335 do{ \
336 memcpy(&(_pdmx_res->_FltList[(DMXId)].FltInfo), (pFltInfo), sizeof(DMX_Flt_info)); \
337 _pdmx_res->_FltList[(DMXId)].pType2Notify_Ex = NULL; \
338 _pdmx_res->_FltList[(DMXId)].pType2NotifyParamEx = NULL; \
339 }while(0);
340
341 #define _FLT_LIST_INFO_SET_Ex(DMXId, pFltInfoEx) \
342 do{ \
343 if(pFltInfoEx->bEx == FALSE) \
344 { \
345 memcpy(&(_pdmx_res->_FltList[(DMXId)].FltInfo.Info.SectInfo), &(pFltInfoEx->DmxInfo.SectInfo), sizeof(DMX_Sect_info)); \
346 _pdmx_res->_FltList[(DMXId)].pType2Notify_Ex = NULL; \
347 _pdmx_res->_FltList[(DMXId)].pType2NotifyParamEx = NULL; \
348 } \
349 else \
350 { \
351 _pdmx_res->_FltList[(DMXId)].FltInfo.Info.SectInfo.SectBufAddr = pFltInfoEx->DmxInfo.SectInfoEx.SectBufAddr ; \
352 _pdmx_res->_FltList[(DMXId)].FltInfo.Info.SectInfo.SectBufSize = pFltInfoEx->DmxInfo.SectInfoEx.SectBufSize ; \
353 _pdmx_res->_FltList[(DMXId)].FltInfo.Info.SectInfo.SectMode = pFltInfoEx->DmxInfo.SectInfoEx.SectMode; \
354 _pdmx_res->_FltList[(DMXId)].FltInfo.Info.SectInfo.Event = pFltInfoEx->DmxInfo.SectInfoEx.Event; \
355 _pdmx_res->_FltList[(DMXId)].pType2Notify_Ex = pFltInfoEx->DmxInfo.SectInfoEx.pType2Notify_Ex; \
356 _pdmx_res->_FltList[(DMXId)].pType2NotifyParamEx = pFltInfoEx->DmxInfo.SectInfoEx.pType2NotifyParamEx; \
357 } \
358 }while(0);
359
360
361
362 #define _FLT_LIST_INFO_GET(DMXId, pFltInfo) \
363 memcpy((pFltInfo), &(_pdmx_res->_FltList[(DMXId)].FltInfo), sizeof(DMX_Flt_info)); \
364
365 #define _FLT_LIST_INFO_GET_Ex(DMXId, pFltInfoEx) \
366 do{ \
367 pFltInfoEx->SectInfoEx.SectBufAddr = _pdmx_res->_FltList[(DMXId)].FltInfo.Info.SectInfo.SectBufAddr; \
368 pFltInfoEx->SectInfoEx.SectBufSize = _pdmx_res->_FltList[(DMXId)].FltInfo.Info.SectInfo.SectBufSize; \
369 pFltInfoEx->SectInfoEx.SectMode = _pdmx_res->_FltList[(DMXId)].FltInfo.Info.SectInfo.SectMode; \
370 pFltInfoEx->SectInfoEx.Event = _pdmx_res->_FltList[(DMXId)].FltInfo.Info.SectInfo.Event; \
371 pFltInfoEx->SectInfoEx.pType2Notify_Ex = _pdmx_res->_FltList[(DMXId)].pType2Notify_Ex; \
372 pFltInfoEx->SectInfoEx.pType2NotifyParamEx = _pdmx_res->_FltList[(DMXId)].pType2NotifyParamEx; \
373 }while(0);
374
375 #define _FLT_LIST_INFO_GET_P(DMXId) (&(_pdmx_res->_FltList[(DMXId)].FltInfo))
376
377 #define _FLT_LIST_PID_SET(DMXId, u16Pid_In) _pdmx_res->_FltList[(DMXId)].u16Pid = (u16Pid_In)
378 #define _FLT_LIST_PID_GET(DMXId, u16Pid_In) (u16Pid_In) = _pdmx_res->_FltList[(DMXId)].u16Pid
379
380 #define _FLT_LIST_REMOVE(DMXId) \
381 do{ \
382 _pdmx_res->_FltList[(DMXId)].FltId= 0xFFFFFFFF; \
383 _pdmx_res->_FltList[(DMXId)].SecBufId= 0xFFFFFFFF; \
384 _pdmx_res->_FltList[(DMXId)].DmxFltType = (DMX_FILTER_TYPE)0xFF; \
385 _pdmx_res->_FltList[(DMXId)].pType2Notify_Ex = NULL; \
386 _pdmx_res->_FltList[(DMXId)].pType2NotifyParamEx = NULL; \
387 memset(&(_pdmx_res->_FltList[(DMXId)].FltInfo), 0, sizeof(DMX_Flt_info)); \
388 }while(0);
389
390 #define _MAX(A, B) (((A) > (B))?(A):(B))
391 #define _MIN(A, B) (((A) < (B))?(A):(B))
392 #define _DMX_OPEN_MIX_USED_CHECK() { \
393 if ( (_pdmx_res->_bIsDMXOpenCalled) && (_pdmx_res->_bIsDMXOpenExCalled) ) \
394 { \
395 ULOGE("TSP", "[%s][%d]: Mix old & new API !!\n", __FUNCTION__, __LINE__); \
396 return DMX_FILTER_STATUS_ERROR; \
397 } \
398 }
399
400 #define _DMX_INFO_MIX_USED_CHECK(_IsEx) { \
401 if( (_IsEx && (_pdmx_res->_bIsDMXOpenCalled)) || (!_IsEx && (_pdmx_res->_bIsDMXOpenExCalled))) \
402 { \
403 ULOGE("TSP", "[%s][%d]: Mix old & new DMX_OPEN & DMX_INFO !!\n", __FUNCTION__, __LINE__); \
404 return DMX_FILTER_STATUS_ERROR; \
405 } \
406 }
407 // Mutex function
408 #ifdef DMX_MUTEX
409
410 // For kernel STR callback function, should not use mutex
411 #define _DMX_ENTRY() while(MsOS_ObtainMutex(_pdmx_res->_Dmx_Mutex, _DMX_MUTEX_TIMEOUT) == FALSE) \
412 { \
413 DMX_DBGMSG(DMX_DBG_ERR, printf("[MAPI DMX][%s][%06d] DMX Mutex taking timeout\n", __FUNCTION__, __LINE__)); \
414 MsOS_DelayTask(1); \
415 }
416
417 #define _DMX_RETURN(_ret) do{ \
418 if(MsOS_ReleaseMutex(_pdmx_res->_Dmx_Mutex) == FALSE) \
419 { \
420 DMX_DBGMSG(DMX_DBG_ERR, printf("[MAPI DMX][%s][%06d] DMX Mutex Free fail\n", __FUNCTION__, __LINE__)); \
421 return DMX_FILTER_STATUS_ERROR; \
422 } \
423 return _ret; \
424 } while(0);
425
426
427 // For kernel STR callback function, should not use mutex
428 #ifdef MSOS_TYPE_LINUX_KERNEL
429 #define _DMX_STR_ENTRY()
430
431 #define _DMX_STR_RETURN(_ret) return _ret;
432
433 #else
434 #define _DMX_STR_ENTRY _DMX_ENTRY
435 #define _DMX_STR_RETURN(_ret) _DMX_RETURN(_ret)
436
437 #endif
438
439 #define _DMX_PVR_ENTRY() while (MsOS_ObtainMutex(_pdmx_res->_Dmx_Pvr_Mutex, _DMX_MUTEX_TIMEOUT) == FALSE) \
440 { \
441 DMX_DBGMSG(DMX_DBG_ERR, printf("[MAPI DMX][%s][%06d] PVR mutex taking timeout\n", __FUNCTION__, __LINE__)); \
442 MsOS_DelayTask(1); \
443 } \
444
445 #define _DMX_PVR_RETURN(_ret) do{ \
446 if(MsOS_ReleaseMutex(_pdmx_res->_Dmx_Pvr_Mutex) == FALSE) \
447 { \
448 DMX_DBGMSG(DMX_DBG_ERR, printf("[MAPI DMX][%s][%06d] PVR Mutex Free fail\n", __FUNCTION__, __LINE__)); \
449 return DMX_FILTER_STATUS_ERROR; \
450 } \
451 return _ret; \
452 }while(0);
453
454 #define _DMX_MMFI_ENTRY() while(MsOS_ObtainMutex(_pdmx_res->_Dmx_MMFI_Mutex, _DMX_MUTEX_TIMEOUT) == FALSE) \
455 { \
456 DMX_DBGMSG(DMX_DBG_ERR, printf("[MAPI DMX][%06d] MMFI Mutex taking timeout\n", __LINE__)); \
457 MsOS_DelayTask(1); \
458 }
459
460 #define _DMX_MMFI_RETURN(_ret) do{ \
461 if(MsOS_ReleaseMutex(_pdmx_res->_Dmx_MMFI_Mutex) == FALSE) \
462 { \
463 DMX_DBGMSG(DMX_DBG_ERR, printf("[MAPI DMX][%s][%06d] MMFI Mutex Free fail\n", __FUNCTION__, __LINE__)); \
464 return DMX_FILTER_STATUS_ERROR; \
465 } \
466 return _ret; \
467 }while(0);
468
469 #ifdef TSO_ENABLE
470 #define _DMX_TSO_ENTRY() while (MsOS_ObtainMutex(_pdmx_res->_Dmx_TSO_Mutex, _DMX_MUTEX_TIMEOUT) == FALSE) \
471 { \
472 DMX_DBGMSG(DMX_DBG_ERR, printf("[MAPI DMX][%06d] TSO Mutex taking timeout\n", __LINE__)); \
473 MsOS_DelayTask(1); \
474 }
475
476 #define _DMX_TSO_RETURN(_ret) do{ \
477 if(MsOS_ReleaseMutex(_pdmx_res->_Dmx_TSO_Mutex) == FALSE) \
478 { \
479 DMX_DBGMSG(DMX_DBG_ERR, printf("[MAPI DMX][%s][%06d] TSO Mutex Free fail\n", __FUNCTION__, __LINE__)); \
480 return DMX_FILTER_STATUS_ERROR; \
481 } \
482 return _ret; \
483 }while(0);
484 #endif
485
486 #else // #ifdef DMX_MUTEX
487 #define _DMX_ENTRY() while (0)
488 #define _DMX_RETURN(_ret) return _ret
489 #define _DMX_PVR_ENTRY() while (0)
490 #define _DMX_PVR_RETURN(_ret) return _ret
491 #define _DMX_MMFI_ENTRY() while (0)
492 #define _DMX_MMFI_RETURN(_ret) return _ret
493 #define _DMX_TSO_ENTRY() while (0)
494 #define _DMX_TSO_RETURN(_ret) return _ret
495
496 #endif // #ifdef DMX_MUTEX
497
498 #define DMX_ASSERT(_bool, _f) if (!(_bool)) { (_f); return DMX_FILTER_STATUS_ERROR;}
499 #define DMX_ASSERT2(_bool, _f) if (!(_bool)) { (_f); _DMX_RETURN(DMX_FILTER_STATUS_ERROR);}
500
501 #define DMX_PVR_ASSERT(_bool, _f) if (!(_bool)) { (_f); return DMX_FILTER_STATUS_ERROR;}
502 #define DMX_PVR_ASSERT2(_bool, _f) if (!(_bool)) { (_f); _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);}
503
504 #define DMX_MMFI_ASSERT(_bool, _f) if (!(_bool)) { (_f); return DMX_FILTER_STATUS_ERROR;}
505 #define DMX_MMFI_ASSERT2(_bool, _f) if (!(_bool)) { (_f); _DMX_MMFI_RETURN(DMX_FILTER_STATUS_ERROR);}
506
507 #define DMX_DBGMSG(_level,_f) {if(_u32DMXDbgLevel >= (_level)) (_f);}
508 #define DMX_PVRDBGMSG(_level,_f) {if(DMX_DBG_ERR == (_level)) (_f);}
509 #define DMX_TSOMSG(_level,_f) {if(DMX_DBG_ERR >= (_level)) (_f);}
510 //------------------------------------------------------------------------------
511 // Local Variable
512 //------------------------------------------------------------------------------
513 static _DMX_CAP_STRTBL _tblDmxCapStr[] =
514 {
515 {"PID_FILTER_NUM", 4, DMX_CAP_PID_FILTER_NUM},
516 {"SEC_FILTER_NUM", 4, DMX_CAP_SEC_FILTER_NUM},
517 {"SEC_BUF_NUM", 4, DMX_CAP_SEC_BUF_NUM},
518
519 {"PVR_ENG_NUM", 4, DMX_CAP_PVR_ENG_NUM},
520 {"PVR_FILTER_NUM", 4, DMX_CAP_PVR_FILTER_NUM},
521 {"PVR1_FILTER_NUM", 4, DMX_CAP_PVR1_FILTER_NUM},
522
523 {"MMFI_AUDIO_FILTER_NUM", 4, DMX_CAP_MMFI_AUDIO_FILTER_NUM},
524 {"MMFI_V3D_FILTER_NUM", 4, DMX_CAP_MMFI_V3D_FILTER_NUM},
525
526 {"MMFI0_FILTER_NUM", 4, DMX_CAP_MMFI0_FILTER_NUM},
527 {"MMFI1_FILTER_NUM", 4, DMX_CAP_MMFI1_FILTER_NUM},
528
529 {"TSIF_NUM", 4, DMX_CAP_TSIF_NUM},
530 {"DEMOD_NUM", 4, DMX_CAP_DEMOD_NUM},
531 {"TS_PAD_NUM", 4, DMX_CAP_TS_PAD_NUM},
532 {"VQ_NUM", 4, DMX_CAP_VQ_NUM},
533
534 {"CA_FLT_NUM", 4, DMX_CAP_CA_FLT_NUM},
535 {"CA_KEY_NUM", 4, DMX_CAP_CA_KEY_NUM},
536
537 {"FW_ALIGN", 4, DMX_CAP_FW_ALIGN},
538 {"VQ_ALIGN", 4, DMX_CAP_VQ_ALIGN},
539 {"VQ_PITCH", 4, DMX_CAP_VQ_PITCH},
540 {"SEC_BUF_ALIGN", 4, DMX_CAP_SEC_BUF_ALIGN},
541 {"PVR_ALIGN", 4, DMX_CAP_PVR_ALIGN},
542
543 {"PVRCA_PATH_NUM", 4, DMX_CAP_PVRCA_PATH_NUM},
544
545 {"SHAREKEY_FLT_RANGE", 8, DMX_CAP_SHAREKEY_FLT_RANGE},
546 {"PVRCA0_FLT_RANGE", 8, DMX_CAP_PVRCA0_FLT_RANGE},
547 {"PVRCA1_FLT_RANGE", 8, DMX_CAP_PVRCA1_FLT_RANGE},
548 {"PVRCA2_FLT_RANGE", 8, DMX_CAP_PVRCA2_FLT_RANGE},
549 {"SHAREKEY_FLT1_RANGE", 8, DMX_CAP_SHAREKEY_FLT1_RANGE},
550 {"SHAREKEY_FLT2_RANGE", 8, DMX_CAP_SHAREKEY_FLT2_RANGE},
551
552 {"HW_TYPE", 4, DMX_CAP_HW_TYPE},
553
554 {"RESOURCE_SIZE", 4, DMX_CAP_RESOURCE_SIZE},
555
556 {"VFIFO_NUM", 4, DMX_CAP_VFIFO_NUM},
557 {"AFIFO_NUM", 4, DMX_CAP_AFIFO_NUM},
558
559 {"HWPCR_SUPPORT", 4, DMX_CAP_HWPCR_SUPPORT},
560 {"PCRFLT_START_IDX", 4, DMX_CAP_PCRFLT_START_IDX},
561 {"TSP_HWWP_SET_NUM", 4, DMX_CAP_TSP_HWWP_SET_NUM},
562
563 {"DSCMB_ENG_NUM", 4, DMX_CAP_DSCMB_ENG_NUM},
564
565 {"MAX_MERGESTR_NUM", 4, DMX_CAP_MAX_MERGESTR_NUM},
566
567 {"MAX_SEC_FLT_DEPTH", 4, DMX_CAP_MAX_SEC_FLT_DEPTH},
568 {"FW_BUF_SIZE", 4, DMX_CAP_FW_BUF_SIZE},
569 {"FW_BUF_RANGE", 4, DMX_CAP_FW_BUF_RANGE},
570 {"VQ_BUF_RANGE", 4, DMX_CAP_VQ_BUF_RANGE},
571 {"SEC_BUF_RANGE", 4, DMX_CAP_SEC_BUF_RANGE},
572 {"FIQ_NUM", 4, DMX_CAP_FIQ_NUM},
573 };
574
575
576 static MSIF_Version _api_dmx_version = {
577 .DDI = { DMX_API_VERSION },
578 };
579
580 #ifndef DMX_UTOPIA_20
581 static DMX_RESOURCE_PRIVATE _dmx_res = {
582 .bResoureInit = FALSE,
583
584 ._PvrNotify = {[0 ... (DMX_MAX_IF_NUM-1)] = NULL},
585 ._Dmx_Mutex = -1,
586 ._Dmx_Pvr_Mutex = -1,
587 ._Dmx_MMFI_Mutex = -1,
588 ._Dmx_TSO_Mutex = -1,
589
590 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
591 ._bPVRCA_RecAll = {[0 ... (DMX_MAX_IF_NUM-1)] = FALSE},
592 ._u32PVREngSrc = {0},
593 #endif
594
595 ._bFWInit = FALSE,
596
597 #if(defined(VQ_ENABLE) && defined(TS2_IF_SUPPORT) && (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0)))
598 ._bVQEnabled = FALSE,
599 #endif
600
601 ._u32TspFltNum = 0UL,
602
603 ._phyTspFwAddr = 0UL,
604 ._u32TspFwSize = 0UL,
605 ._phyVQAddr = 0UL,
606 ._u32VQSize = 0UL,
607 ._u32IsHK = 0,
608
609 #ifdef DMX_RESET_FI_TIMESTAMP
610 ._bPlayTimestampEnable = {[0 ... (DMX_FILEIN_INVALID-1)] = FALSE},
611 ._phyFI192DummyBufAddr = 0UL,
612 ._u32FI192DummyBufSize = 0UL,
613 #endif
614
615 ._u32LibMode = 0,
616
617 ._bEnableInitRefCnt = FALSE,
618 ._u8InitRefCnt = 0,
619 #ifdef FQ_ENABLE
620 #if((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0))
621 ._eFqSrc = E_DRVFQ_SRC_TSIF0,
622 #else
623 ._eFqSrc = E_DRVFQ_SRC_DEFAULT,
624 #endif
625 #endif
626
627 #ifdef SECURE_PVR_ENABLE
628 ._stSecBuf = {0, 0, 0, 0},
629 #endif
630 };
631
632 static DMX_RESOURCE_PRIVATE* _pdmx_res = &_dmx_res;
633 #else
634 static DMX_RESOURCE_PRIVATE* _pdmx_res = NULL;
635 #endif
636
637 MS_U32 _Owner = 0UL;
638
639 static MS_U32 _u32DMXDbgLevel = DMX_DBG_ERR;
640 static MS_U32 _u32PESCpy_ContMode = 0;
641
642 #if DMX_DEBUG
643 extern MS_U32 u32DbgLogFlag;
644 extern MS_U32 u32DmxDbgFltId;
645 extern DMX_AV_FIFO_STR stDmxType[];
646 extern DMX_FLT_DBG_INFO stDmxDbgInfo[];
647 extern FILE* pfSEC;
648 #endif
649
650 //------------------------------------------------------------------------------
651 // Internal implementation
652 //------------------------------------------------------------------------------
653
654 #if 0
655 static const unsigned long drv_crc32_table[256] =
656 {
657 0x00000000L, 0x04C11DB7L, 0x09823B6EL, 0x0D4326D9L, 0x130476DCL, 0x17C56B6BL, 0x1A864DB2L, 0x1E475005L,
658 0x2608EDB8L, 0x22C9F00FL, 0x2F8AD6D6L, 0x2B4BCB61L, 0x350C9B64L, 0x31CD86D3L, 0x3C8EA00AL, 0x384FBDBDL,
659 0x4C11DB70L, 0x48D0C6C7L, 0x4593E01EL, 0x4152FDA9L, 0x5F15ADACL, 0x5BD4B01BL, 0x569796C2L, 0x52568B75L,
660 0x6A1936C8L, 0x6ED82B7FL, 0x639B0DA6L, 0x675A1011L, 0x791D4014L, 0x7DDC5DA3L, 0x709F7B7AL, 0x745E66CDL,
661 0x9823B6E0L, 0x9CE2AB57L, 0x91A18D8EL, 0x95609039L, 0x8B27C03CL, 0x8FE6DD8BL, 0x82A5FB52L, 0x8664E6E5L,
662 0xBE2B5B58L, 0xBAEA46EFL, 0xB7A96036L, 0xB3687D81L, 0xAD2F2D84L, 0xA9EE3033L, 0xA4AD16EAL, 0xA06C0B5DL,
663 0xD4326D90L, 0xD0F37027L, 0xDDB056FEL, 0xD9714B49L, 0xC7361B4CL, 0xC3F706FBL, 0xCEB42022L, 0xCA753D95L,
664 0xF23A8028L, 0xF6FB9D9FL, 0xFBB8BB46L, 0xFF79A6F1L, 0xE13EF6F4L, 0xE5FFEB43L, 0xE8BCCD9AL, 0xEC7DD02DL,
665 0x34867077L, 0x30476DC0L, 0x3D044B19L, 0x39C556AEL, 0x278206ABL, 0x23431B1CL, 0x2E003DC5L, 0x2AC12072L,
666 0x128E9DCFL, 0x164F8078L, 0x1B0CA6A1L, 0x1FCDBB16L, 0x018AEB13L, 0x054BF6A4L, 0x0808D07DL, 0x0CC9CDCAL,
667 0x7897AB07L, 0x7C56B6B0L, 0x71159069L, 0x75D48DDEL, 0x6B93DDDBL, 0x6F52C06CL, 0x6211E6B5L, 0x66D0FB02L,
668 0x5E9F46BFL, 0x5A5E5B08L, 0x571D7DD1L, 0x53DC6066L, 0x4D9B3063L, 0x495A2DD4L, 0x44190B0DL, 0x40D816BAL,
669 0xACA5C697L, 0xA864DB20L, 0xA527FDF9L, 0xA1E6E04EL, 0xBFA1B04BL, 0xBB60ADFCL, 0xB6238B25L, 0xB2E29692L,
670 0x8AAD2B2FL, 0x8E6C3698L, 0x832F1041L, 0x87EE0DF6L, 0x99A95DF3L, 0x9D684044L, 0x902B669DL, 0x94EA7B2AL,
671 0xE0B41DE7L, 0xE4750050L, 0xE9362689L, 0xEDF73B3EL, 0xF3B06B3BL, 0xF771768CL, 0xFA325055L, 0xFEF34DE2L,
672 0xC6BCF05FL, 0xC27DEDE8L, 0xCF3ECB31L, 0xCBFFD686L, 0xD5B88683L, 0xD1799B34L, 0xDC3ABDEDL, 0xD8FBA05AL,
673 0x690CE0EEL, 0x6DCDFD59L, 0x608EDB80L, 0x644FC637L, 0x7A089632L, 0x7EC98B85L, 0x738AAD5CL, 0x774BB0EBL,
674 0x4F040D56L, 0x4BC510E1L, 0x46863638L, 0x42472B8FL, 0x5C007B8AL, 0x58C1663DL, 0x558240E4L, 0x51435D53L,
675 0x251D3B9EL, 0x21DC2629L, 0x2C9F00F0L, 0x285E1D47L, 0x36194D42L, 0x32D850F5L, 0x3F9B762CL, 0x3B5A6B9BL,
676 0x0315D626L, 0x07D4CB91L, 0x0A97ED48L, 0x0E56F0FFL, 0x1011A0FAL, 0x14D0BD4DL, 0x19939B94L, 0x1D528623L,
677 0xF12F560EL, 0xF5EE4BB9L, 0xF8AD6D60L, 0xFC6C70D7L, 0xE22B20D2L, 0xE6EA3D65L, 0xEBA91BBCL, 0xEF68060BL,
678 0xD727BBB6L, 0xD3E6A601L, 0xDEA580D8L, 0xDA649D6FL, 0xC423CD6AL, 0xC0E2D0DDL, 0xCDA1F604L, 0xC960EBB3L,
679 0xBD3E8D7EL, 0xB9FF90C9L, 0xB4BCB610L, 0xB07DABA7L, 0xAE3AFBA2L, 0xAAFBE615L, 0xA7B8C0CCL, 0xA379DD7BL,
680 0x9B3660C6L, 0x9FF77D71L, 0x92B45BA8L, 0x9675461FL, 0x8832161AL, 0x8CF30BADL, 0x81B02D74L, 0x857130C3L,
681 0x5D8A9099L, 0x594B8D2EL, 0x5408ABF7L, 0x50C9B640L, 0x4E8EE645L, 0x4A4FFBF2L, 0x470CDD2BL, 0x43CDC09CL,
682 0x7B827D21L, 0x7F436096L, 0x7200464FL, 0x76C15BF8L, 0x68860BFDL, 0x6C47164AL, 0x61043093L, 0x65C52D24L,
683 0x119B4BE9L, 0x155A565EL, 0x18197087L, 0x1CD86D30L, 0x029F3D35L, 0x065E2082L, 0x0B1D065BL, 0x0FDC1BECL,
684 0x3793A651L, 0x3352BBE6L, 0x3E119D3FL, 0x3AD08088L, 0x2497D08DL, 0x2056CD3AL, 0x2D15EBE3L, 0x29D4F654L,
685 0xC5A92679L, 0xC1683BCEL, 0xCC2B1D17L, 0xC8EA00A0L, 0xD6AD50A5L, 0xD26C4D12L, 0xDF2F6BCBL, 0xDBEE767CL,
686 0xE3A1CBC1L, 0xE760D676L, 0xEA23F0AFL, 0xEEE2ED18L, 0xF0A5BD1DL, 0xF464A0AAL, 0xF9278673L, 0xFDE69BC4L,
687 0x89B8FD09L, 0x8D79E0BEL, 0x803AC667L, 0x84FBDBD0L, 0x9ABC8BD5L, 0x9E7D9662L, 0x933EB0BBL, 0x97FFAD0CL,
688 0xAFB010B1L, 0xAB710D06L, 0xA6322BDFL, 0xA2F33668L, 0xBCB4666DL, 0xB8757BDAL, 0xB5365D03L, 0xB1F740B4L
689 };
690
_TSP_GetCrc32(unsigned char * buffer,unsigned long length)691 static int _TSP_GetCrc32(unsigned char *buffer, unsigned long length)
692 {
693 unsigned long ulCRC = 0xFFFFFFFF;
694
695 while (length--)
696 {
697 ulCRC = (ulCRC << 8) ^ drv_crc32_table[((ulCRC >> 24) & 0xFF) ^ *buffer++];
698 }
699
700 return (ulCRC);
701 }
702 #endif
703
704 #ifdef DMX_RESET_FI_TIMESTAMP
_DMX_PA2KSEG1(MS_PHY phyAddr,MS_U32 u32Size)705 static MS_VIRT _DMX_PA2KSEG1(MS_PHY phyAddr, MS_U32 u32Size)
706 {
707 MS_VIRT pdummy = 0;
708 MS_U32 u32MiuOffset = 0;
709 MS_U8 u8MiuSel = 0;
710
711 pdummy = MsOS_PA2KSEG1(phyAddr);
712 if(pdummy == 0)
713 {
714 printf("[%s][%d] PA2VA is 0, do MPool Mapping...\n", __FUNCTION__, __LINE__);
715
716 _phy_to_miu_offset(u8MiuSel, u32MiuOffset, phyAddr);
717
718 if(MsOS_MPool_Mapping(u8MiuSel, (phyAddr - u32MiuOffset), u32Size, TRUE) == TRUE)
719 {
720 pdummy = MsOS_PA2KSEG1(phyAddr);
721 }
722 }
723
724 return pdummy;
725 }
726 #endif
727
_DMX_InitResource(DMX_RESOURCE_PRIVATE * presource)728 static MS_BOOL _DMX_InitResource(DMX_RESOURCE_PRIVATE* presource)
729 {
730 MS_U32 u32ii;
731
732 #ifdef DMX_MUTEX
733 presource->_Dmx_Mutex = -1;
734 presource->_Dmx_Pvr_Mutex = -1;
735 presource->_Dmx_MMFI_Mutex = -1;
736 presource->_Dmx_TSO_Mutex = -1;
737 #endif
738
739 for(u32ii = 0; u32ii < DMX_MAX_IF_NUM; u32ii++)
740 {
741 presource->_PvrNotify[u32ii] = NULL;
742 }
743
744 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
745 for(u32ii = 0; u32ii < DMX_MAX_IF_NUM; u32ii++)
746 {
747 presource->_bPVRCA_RecAll[u32ii] = FALSE;
748 presource->_u32PVREngSrc[u32ii] = 0;
749 }
750 #endif
751
752 presource->_bFWInit = FALSE;
753
754 #if(defined(VQ_ENABLE) && defined(TS2_IF_SUPPORT) && (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0)))
755 presource->_bVQEnabled = FALSE;
756 #endif
757
758 presource->_u32TspFltNum = 0UL;
759
760 presource->_phyTspFwAddr = 0UL;
761 presource->_u32TspFwSize = 0UL;
762 presource->_phyVQAddr = 0UL;
763 presource->_u32VQSize = 0UL;
764 presource->_u32IsHK = 0;
765
766 #ifdef DMX_RESET_FI_TIMESTAMP
767 for(u32ii = 0; u32ii < DMX_FILEIN_INVALID; u32ii++)
768 {
769 presource->_bPlayTimestampEnable[u32ii] = FALSE;
770 }
771 presource->_phyFI192DummyBufAddr = 0;
772 presource->_u32FI192DummyBufSize = 0;
773 #endif
774
775 presource->_u32LibMode = 0;
776
777
778 presource->_bEnableInitRefCnt = FALSE;
779 presource->_u8InitRefCnt = 0;
780
781 #ifdef FQ_ENABLE
782 #if ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0))
783 presource->_eFqSrc = E_DRVFQ_SRC_TSIF0;
784 #else
785 presource->_eFqSrc = E_DRVFQ_SRC_DEFAULT;
786 #endif
787 #endif
788
789 #ifdef SECURE_PVR_ENABLE
790 presource->_stSecBuf.u32BufId = 0;
791 presource->_stSecBuf.u32BufOpt = 0;
792 presource->_stSecBuf.u32BufSize = 0;
793 presource->_stSecBuf.phyBufAddr = 0;
794 #endif
795
796 return TRUE;
797 }
798
_DMX_NotifyPvr(DrvTSP_Event eEvent,DrvTSP_Msg * pMsg)799 static void _DMX_NotifyPvr(DrvTSP_Event eEvent, DrvTSP_Msg *pMsg)
800 {
801 MS_U32 u32PVRID = 0;
802
803 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
804 #ifdef TS3_IF_SUPPORT
805 if(eEvent & (E_DRVTSP_EVENT_PVR2BUF_FULL|E_DRVTSP_EVENT_PVR2BUF_OVERFLOW))
806 {
807 u32PVRID = 1;
808 }
809 #endif
810
811 #ifdef TS2_IF_SUPPORT
812 if(eEvent & (E_DRVTSP_EVENT_CBBUF_FULL|E_DRVTSP_EVENT_CBBUF_OVERFLOW))
813 {
814 if (DRVTSP_OK != MDrv_TSP_GetCap(E_DRVTSP_CAP_PVR_FILTER_NUM, (void*)&u32PVRID))
815 {
816 u32PVRID = 1;
817 }
818 else
819 {
820 u32PVRID--;
821 }
822 }
823 #endif
824 #endif
825
826 if(_pdmx_res->_PvrNotify[u32PVRID] == NULL)
827 {
828 MS_CRITICAL_MSG(DMX_DBGMSG(DMX_DBG_WARN, ULOGW("DMX", "Warning: [MAPI DMX][%06d] NULL callback function\n", __LINE__)));
829 }
830 else
831 {
832 _pdmx_res->_PvrNotify[u32PVRID]((pMsg->PvrBufId)>> MSG_PVRBUF_ID_SHFT, (DMX_EVENT)eEvent);
833 }
834 }
835
836 //Only for section now
_DMX_Notify(DrvTSP_Event eEvent,DrvTSP_Msg * pMsg)837 static void _DMX_Notify(DrvTSP_Event eEvent, DrvTSP_Msg *pMsg)
838 {
839 MS_U32 u32SecFltId = (pMsg->FltInfo & MSG_FLTINFO_SEC_ID_MASK);
840 MS_U32 u32DMXId = u32SecFltId;
841
842 //ULOGD("DMX", "[%s] FltID [%x]\n",__FUNCTION__, (int)u32SecFltId);
843 //ULOGD("DMX", "[%s] Event [%d]\n",__FUNCTION__, eEvent);
844
845 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
846 //searching mapping PID filter id
847 if(u32SecFltId != _pdmx_res->_FltList[u32DMXId].SecBufId)
848 {
849 MS_U32 u32FltNum = 0;
850 if(MDrv_TSP_GetCap(E_DRVTSP_CAP_PID_FILTER_NUM, (void*)&u32FltNum) != DRVTSP_OK)
851 {
852 return;
853 }
854 for(u32DMXId = 0; u32DMXId < u32FltNum; u32DMXId++)
855 {
856 if(_pdmx_res->_FltList[u32DMXId].SecBufId == 0xFFFFFFFF)
857 continue;
858
859 if(u32SecFltId == _pdmx_res->_FltList[u32DMXId].SecBufId)
860 {
861 break;
862 }
863 }
864 if(u32DMXId == u32FltNum)
865 {
866 return;
867 }
868 }
869 #endif
870
871 #if DMX_DEBUG
872 {
873 MS_U32 u32TimeCB = 0;
874 MS_BOOL bMonitorCB = FALSE;
875 MS_BOOL bMonitorEvent = FALSE;
876 dmx_dbg_IsFltMonitor(u32DMXId, bMonitorCB);
877 bMonitorCB = bMonitorCB && (u32DbgLogFlag & DMX_DBG_LOG_FLT_CB);
878
879 if(bMonitorCB)
880 u32TimeCB = MsOS_GetSystemTime();
881
882 dmx_dbg_IsFltMonitor(u32DMXId, bMonitorEvent);
883 if(bMonitorEvent && (u32DbgLogFlag & DMX_DBG_LOG_FLT_SEC_OVF) && (eEvent == E_DRVTSP_EVENT_BUF_OVERFLOW))
884 dmx_dbg_print("[DMX OVF]\tFlt[%03d]\n", (MS_S32)u32DMXId);
885
886 if(bMonitorEvent && (u32DbgLogFlag & DMX_DBG_LOG_FLT_SEC_RDY) && (eEvent == E_DRVTSP_EVENT_DATA_READY))
887 dmx_dbg_print("[DMX RDY]\tFlt[%03d]\n", (MS_S32)u32DMXId);
888
889 if(eEvent == E_DRVTSP_EVENT_DATA_READY)
890 {
891 stDmxDbgInfo[u32SecFltId].u32CB_rdy ++;
892 }
893 else if(eEvent == E_DRVTSP_EVENT_BUF_OVERFLOW)
894 {
895 stDmxDbgInfo[u32SecFltId].u32CB_ovf ++;
896 }
897
898 #endif
899
900 if((_pdmx_res->_FltList[u32DMXId].FltInfo.Info.SectInfo.Event&DMX_EVENT_CB_SELF_TYPE2) == DMX_EVENT_CB_SELF_TYPE2)
901 {
902
903 if((_pdmx_res->_FltList[u32DMXId].FltInfo.Info.SectInfo.pType2Notify) && (_pdmx_res->_FltList[u32DMXId].pType2Notify_Ex))
904 {
905 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Mixed usage of SecRdy Callback function\n", __LINE__));
906 }
907 else if((_pdmx_res->_FltList[u32DMXId].FltInfo.Info.SectInfo.pType2Notify) && !(_pdmx_res->_FltList[u32DMXId].pType2Notify_Ex))
908 {
909 _pdmx_res->_FltList[u32DMXId].FltInfo.Info.SectInfo.pType2Notify((MS_U8)u32DMXId, (DMX_EVENT)eEvent, _pdmx_res->_FltList[u32DMXId].FltInfo.Info.SectInfo.Type2NotifyParam1);
910 }
911 else if(!(_pdmx_res->_FltList[u32DMXId].FltInfo.Info.SectInfo.pType2Notify) && (_pdmx_res->_FltList[u32DMXId].pType2Notify_Ex))
912 {
913 _pdmx_res->_FltList[u32DMXId].pType2Notify_Ex(u32DMXId, (DMX_EVENT)eEvent, (_pdmx_res->_FltList[u32DMXId].pType2NotifyParamEx));
914 }
915 else
916 {
917 DMX_DBGMSG(DMX_DBG_ERR, ULOGW("DMX", "Warning: [MAPI DMX][%06d] NULL callback function\n", __LINE__));
918 }
919 }
920 else
921 {
922 if(_pdmx_res->_FltList[u32DMXId].FltInfo.Info.SectInfo.pNotify)
923 {
924 _pdmx_res->_FltList[u32DMXId].FltInfo.Info.SectInfo.pNotify((MS_U8)u32DMXId, (DMX_EVENT)eEvent);
925 }
926 else
927 {
928 DMX_DBGMSG(DMX_DBG_WARN, ULOGW("DMX", "Warning: [MAPI DMX][%06d] NULL callback function\n", __LINE__));
929 }
930 }
931
932 #if DMX_DEBUG
933 if(bMonitorCB)
934 {
935 dmx_dbg_print("[DMX CB]\tFlt[%03d] PID[0x%x] time[%d ms]\n",
936 (MS_S32)u32DMXId,
937 (MS_U32)_pdmx_res->_FltList[(u32DMXId)].u16Pid,
938 (MS_S32)(MsOS_GetSystemTime() - u32TimeCB));
939
940 }
941 }
942 #endif
943
944 }
945
946 // check if buffer range is already used by other filter
947 #if 1
_DMX_ChkBufOverlap(MS_U32 u32DmxId,MS_PHY phyAddr,MS_U32 u32Size)948 static MS_BOOL _DMX_ChkBufOverlap(MS_U32 u32DmxId, MS_PHY phyAddr, MS_U32 u32Size)
949 {
950 MS_S32 idx;
951
952 for(idx = _pdmx_res->_u32TspFltNum - 1; idx >= 0 ; idx--)
953 {
954 DMX_FILTER_TYPE type;
955
956 _FLT_LIST_TYPE_GET(idx, &type);
957 if((type == DMX_FILTER_TYPE_SECTION) ||
958 (type == DMX_FILTER_TYPE_TELETEXT) ||
959 (type == DMX_FILTER_TYPE_PES) ||
960 (type == DMX_FILTER_TYPE_PACKET) ||
961 (type == DMX_FILTER_TYPE_SECTION_VER) ||
962 (type == DMX_FILTER_TYPE_SECTION_NO_PUSI))
963 { // filter is opened
964 DMX_Sect_info* pInfo = &(_FLT_LIST_INFO_GET_P(idx)->Info.SectInfo);
965 if(idx != (MS_S32)u32DmxId)
966 {
967 MS_U32 max = (MS_U32)_MAX(pInfo->SectBufAddr, phyAddr);
968 MS_U32 min = (MS_U32)_MIN(pInfo->SectBufAddr, phyAddr);
969 MS_U32 size = (min == pInfo->SectBufAddr)? pInfo->SectBufSize : u32Size;
970
971 if((pInfo->SectBufAddr == phyAddr) || ((min + size) > (max)))
972 {
973 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
974 if (_FLT_LIST_SECFLT_BUFID_GET(idx) == _FLT_LIST_SECFLT_BUFID_GET(u32DmxId))
975 { // multi filter to one buffer case
976 continue;
977 }
978 #endif
979
980 printf("[DMX ERROR]: [MAPI DMX][%06d][%d:%d] Buffer overlap, 0x%x (0x%x)<==> 0x%x (0x%x)\n",
981 __LINE__,
982 (int)u32DmxId,
983 (int)idx,
984 (int)pInfo->SectBufAddr,
985 (int)pInfo->SectBufSize,
986 (int)phyAddr,
987 (int)u32Size
988 );
989
990 return TRUE;
991 }
992 }
993 }
994 } // for loop
995
996 return FALSE;
997 }
998 #endif
999
_DMX_InfoSet_Stream(MS_U32 u32DmxId,DMX_Flt_info * pDmxFltInfo)1000 static MS_BOOL _DMX_InfoSet_Stream(MS_U32 u32DmxId, DMX_Flt_info* pDmxFltInfo)
1001 {
1002 _FLT_LIST_INFO_SET(u32DmxId, pDmxFltInfo);
1003 return TRUE;
1004 }
1005
_DMX_InfoSet_Sect(MS_U32 u32DmxId,DMX_InfoSet * pDmxInfo)1006 static MS_BOOL _DMX_InfoSet_Sect(MS_U32 u32DmxId, DMX_InfoSet* pDmxInfo)
1007 {
1008 DMX_FILTER_TYPE DmxFltType;
1009 MS_PHY SectBufAddr;
1010 MS_U32 SectBufSize;
1011 DMX_SECT_MODE DmxSectMode;
1012 DMX_EVENT Event;
1013
1014 if(pDmxInfo->bEx == FALSE)
1015 {
1016 SectBufAddr = pDmxInfo->DmxInfo.SectInfo.SectBufAddr;
1017 SectBufSize = pDmxInfo->DmxInfo.SectInfo.SectBufSize;
1018 DmxSectMode = pDmxInfo->DmxInfo.SectInfo.SectMode;
1019 Event = pDmxInfo->DmxInfo.SectInfo.Event;
1020 }
1021 else
1022 {
1023 SectBufAddr = pDmxInfo->DmxInfo.SectInfoEx.SectBufAddr;
1024 SectBufSize = pDmxInfo->DmxInfo.SectInfoEx.SectBufSize;
1025 DmxSectMode = pDmxInfo->DmxInfo.SectInfoEx.SectMode;
1026 Event = pDmxInfo->DmxInfo.SectInfoEx.Event;
1027 }
1028
1029
1030 _FLT_LIST_TYPE_GET(u32DmxId, &DmxFltType);
1031 if (DMX_FILTER_TYPE_PCR == DmxFltType)
1032 {
1033 return TRUE;
1034 }
1035 if (0 == SectBufSize)
1036 {
1037 DMX_DBGMSG(DMX_DBG_WARN, ULOGW("DMX", "warning: [MAPI DMX][%06d] buffer size = 0, buffer address = 0x%08x\n", __LINE__, (unsigned int)SectBufAddr));
1038 }
1039
1040 MDrv_TSP_SecFlt_SetMode(0, _pdmx_res->_FltList[u32DmxId].SecBufId/*u8DmxId*/, (DrvTSP_FltMode)DmxSectMode);
1041
1042
1043 if(_DMX_ChkBufOverlap(u32DmxId, SectBufAddr, SectBufSize))
1044 {
1045 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
1046 ULOGE("DMX", "FATAL ERROR: [MAPI DMX][%06d]Section buffer overlap!!!!!!!!!\n", __LINE__);
1047 MS_ASSERT(0);
1048 return FALSE;
1049 #endif
1050 }
1051 MDrv_TSP_SecFlt_SetBuffer(0, _pdmx_res->_FltList[u32DmxId].SecBufId, SectBufAddr, SectBufSize);
1052
1053 if(pDmxInfo->bEx == FALSE)
1054 {
1055 if (pDmxInfo->DmxInfo.SectInfo.pNotify || (((Event&DMX_EVENT_CB_SELF_TYPE2) == DMX_EVENT_CB_SELF_TYPE2) && pDmxInfo->DmxInfo.SectInfo.pType2Notify))
1056 {
1057 MDrv_TSP_SecFlt_Notify(0, _pdmx_res->_FltList[u32DmxId].SecBufId, (DrvTSP_Event)Event, _DMX_Notify);
1058 }
1059 else
1060 {
1061 DMX_DBGMSG(DMX_DBG_WARN, ULOGW("DMX", "Warning: [MAPI DMX][%06d] NULL callback function\n", __LINE__));
1062 }
1063 }
1064 else
1065 {
1066 if (((Event&DMX_EVENT_CB_SELF_TYPE2) == DMX_EVENT_CB_SELF_TYPE2) && pDmxInfo->DmxInfo.SectInfoEx.pType2Notify_Ex)
1067 {
1068 MDrv_TSP_SecFlt_Notify(0, _pdmx_res->_FltList[u32DmxId].SecBufId, (DrvTSP_Event)Event, _DMX_Notify);
1069 }
1070 else
1071 {
1072 DMX_DBGMSG(DMX_DBG_WARN, ULOGW("DMX", "Warning: [MAPI DMX][%06d] NULL callback function\n", __LINE__));
1073 }
1074 }
1075
1076 _FLT_LIST_INFO_SET_Ex(u32DmxId, pDmxInfo);
1077 return TRUE;
1078 }
1079
_DMX_ApiDrv_FltTypeMapping(DMX_FILTER_TYPE DmxFltType,DrvTSP_FltType * TspFltType)1080 static MS_BOOL _DMX_ApiDrv_FltTypeMapping(DMX_FILTER_TYPE DmxFltType, DrvTSP_FltType *TspFltType)
1081 {
1082 switch (DmxFltType)
1083 {
1084 case DMX_FILTER_TYPE_VIDEO:
1085 *TspFltType = E_DRVTSP_FLT_TYPE_VIDEO;
1086 break;
1087 #ifdef MMFI_VD3D
1088 case DMX_FILTER_TYPE_VIDEO3D:
1089 *TspFltType = E_DRVTSP_FLT_TYPE_VIDEO3D;
1090 break;
1091 #endif
1092 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
1093 case DMX_FILTER_TYPE_VIDEO3:
1094 *TspFltType = E_DRVTSP_FLT_TYPE_VIDEO3;
1095 break;
1096 case DMX_FILTER_TYPE_VIDEO4:
1097 *TspFltType = E_DRVTSP_FLT_TYPE_VIDEO4;
1098 break;
1099 case DMX_FILTER_TYPE_VIDEO5:
1100 *TspFltType = E_DRVTSP_FLT_TYPE_VIDEO5;
1101 break;
1102 case DMX_FILTER_TYPE_VIDEO6:
1103 *TspFltType = E_DRVTSP_FLT_TYPE_VIDEO6;
1104 break;
1105 case DMX_FILTER_TYPE_VIDEO7:
1106 *TspFltType = E_DRVTSP_FLT_TYPE_VIDEO7;
1107 break;
1108 case DMX_FILTER_TYPE_VIDEO8:
1109 *TspFltType = E_DRVTSP_FLT_TYPE_VIDEO8;
1110 break;
1111 #endif
1112 case DMX_FILTER_TYPE_AUDIO:
1113 *TspFltType = E_DRVTSP_FLT_TYPE_AUDIO;
1114 break;
1115 case DMX_FILTER_TYPE_AUDIO2:
1116 *TspFltType = E_DRVTSP_FLT_TYPE_AUDIO2;
1117 break;
1118 #if (!(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))) // For TSP_VER_3_0 and TSP_VER_4_0
1119 case DMX_FILTER_TYPE_AUDIO3:
1120 *TspFltType = E_DRVTSP_FLT_TYPE_AUDIO3;
1121 break;
1122 case DMX_FILTER_TYPE_AUDIO4:
1123 *TspFltType = E_DRVTSP_FLT_TYPE_AUDIO4;
1124 break;
1125 #endif
1126 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
1127 case DMX_FILTER_TYPE_AUDIO5:
1128 *TspFltType = E_DRVTSP_FLT_TYPE_AUDIO5;
1129 break;
1130 case DMX_FILTER_TYPE_AUDIO6:
1131 *TspFltType = E_DRVTSP_FLT_TYPE_AUDIO6;
1132 break;
1133 #endif
1134 default:
1135 *TspFltType = 0;
1136 return FALSE;
1137 }
1138
1139 return TRUE;
1140 }
1141
1142 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
1143
_DMX_ApiDrv_FltSrcMapping(MS_U32 u32TSPFltSource)1144 static MS_U32 _DMX_ApiDrv_FltSrcMapping(MS_U32 u32TSPFltSource)
1145 {
1146 switch (u32TSPFltSource & DMX_FILTER_SOURCE_TYPE_MASK)
1147 {
1148 case DMX_FILTER_SOURCE_TYPE_LIVE:
1149 return E_TSP_FLT_SRC_LIVE0;
1150 case DMX_FILTER_SOURCE_TYPE_TS1:
1151 return E_TSP_FLT_SRC_LIVE1;
1152 case DMX_FILTER_SOURCE_TYPE_TS2:
1153 return E_TSP_FLT_SRC_LIVE2;
1154 case DMX_FILTER_SOURCE_TYPE_TS3:
1155 return E_TSP_FLT_SRC_LIVE3;
1156 case DMX_FILTER_SOURCE_TYPE_TS4:
1157 return E_TSP_FLT_SRC_LIVE4;
1158 case DMX_FILTER_SOURCE_TYPE_TS5:
1159 return E_TSP_FLT_SRC_LIVE5;
1160 case DMX_FILTER_SOURCE_TYPE_TS6:
1161 return E_TSP_FLT_SRC_LIVE6;
1162 case DMX_FILTER_SOURCE_TYPE_FILE:
1163 return E_TSP_FLT_SRC_FILE0;
1164 case DMX_FILTER_SOURCE_TYPE_FILE1:
1165 return E_TSP_FLT_SRC_FILE1;
1166 case DMX_FILTER_SOURCE_TYPE_FILE2:
1167 return E_TSP_FLT_SRC_FILE2;
1168 case DMX_FILTER_SOURCE_TYPE_FILE3:
1169 return E_TSP_FLT_SRC_FILE3;
1170 case DMX_FILTER_SOURCE_TYPE_FILE4:
1171 return E_TSP_FLT_SRC_FILE4;
1172 case DMX_FILTER_SOURCE_TYPE_FILE5:
1173 return E_TSP_FLT_SRC_FILE5;
1174 case DMX_FILTER_SOURCE_TYPE_FILE6:
1175 return E_TSP_FLT_SRC_FILE6;
1176 // for backward compatible start
1177 case DMX_FILTER_SOURCE_TYPE_PVR0:
1178 return E_TSP_FLT_SRC_LIVE2;
1179 case DMX_FILTER_SOURCE_TYPE_PVR1:
1180 return E_TSP_FLT_SRC_LIVE3;
1181 // for backward compatible end
1182
1183 default:
1184 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad filter src %u\n", __LINE__, (unsigned int)u32TSPFltSource));
1185 return E_TSP_FLT_SRC_LIVE0;
1186 }
1187 }
1188
_DMX_ApiDrv_FltSrcIdMapping(MS_U32 u32TSPFltSource)1189 static MS_U32 _DMX_ApiDrv_FltSrcIdMapping(MS_U32 u32TSPFltSource)
1190 {
1191 const MS_U32 u32ShiftNum = __builtin_ctz(E_TSP_FLT_SRCID_1 / DMX_FILTER_SOURCEID_1); // 12
1192 MS_U32 u32ApiSrcId = u32TSPFltSource & DMX_FILTER_SOURCEID_MASK;
1193
1194 if(u32ApiSrcId < DMX_FILTER_SOURCEID_16)
1195 {
1196 return (E_TSP_FLT_SRCID_0 + (u32ApiSrcId << u32ShiftNum));
1197 }
1198 else
1199 {
1200 return (E_TSP_FLT_SRCID_16 + ((u32ApiSrcId & ~DMX_FILTER_SOURCEID_16) << u32ShiftNum));
1201 }
1202 }
1203
_DMX_ApiDrv_FileinEngMapping(DMX_FILEIN_PATH eFileinEng)1204 static TSP_FILE_ENG _DMX_ApiDrv_FileinEngMapping(DMX_FILEIN_PATH eFileinEng)
1205 {
1206 switch (eFileinEng)
1207 {
1208 case DMX_FILEIN_TSIF0:
1209 return E_TSP_FILE_ENG_TSIF0;
1210 case DMX_FILEIN_TSIF1:
1211 return E_TSP_FILE_ENG_TSIF1;
1212 case DMX_FILEIN_TSIF2:
1213 return E_TSP_FILE_ENG_TSIF2;
1214 case DMX_FILEIN_TSIF3:
1215 return E_TSP_FILE_ENG_TSIF3;
1216 case DMX_FILEIN_TSIF4:
1217 return E_TSP_FILE_ENG_TSIF4;
1218 case DMX_FILEIN_TSIF5:
1219 return E_TSP_FILE_ENG_TSIF5;
1220 case DMX_FILEIN_TSIF6:
1221 return E_TSP_FILE_ENG_TSIF6;
1222 default:
1223 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad DMX_FILEIN_ENG %u\n", __LINE__, (unsigned int)eFileinEng));
1224 return E_TSP_FILE_ENG_INVALID;
1225 }
1226 }
1227
_DMX_ApiDrv_DmxFlowMapping(DMX_FLOW eDmxFlow,MS_U32 * pu32TSIf)1228 static MS_BOOL _DMX_ApiDrv_DmxFlowMapping(DMX_FLOW eDmxFlow,MS_U32 *pu32TSIf)
1229 {
1230 *pu32TSIf = 0;
1231
1232 switch (eDmxFlow)
1233 {
1234 case DMX_FLOW_PLAYBACK:
1235 *pu32TSIf = E_TSP_TSIF_0;
1236 break;
1237 case DMX_FLOW_PLAYBACK1:
1238 *pu32TSIf = E_TSP_TSIF_1;
1239 break;
1240 case DMX_FLOW_PLAYBACK2:
1241 *pu32TSIf = E_TSP_TSIF_2;
1242 break;
1243 case DMX_FLOW_PLAYBACK3:
1244 *pu32TSIf = E_TSP_TSIF_3;
1245 break;
1246 case DMX_FLOW_PLAYBACK4:
1247 *pu32TSIf = E_TSP_TSIF_4;
1248 break;
1249 case DMX_FLOW_PLAYBACK5:
1250 *pu32TSIf = E_TSP_TSIF_5;
1251 break;
1252 case DMX_FLOW_PLAYBACK6:
1253 *pu32TSIf = E_TSP_TSIF_6;
1254 break;
1255 case DMX_FLOW_PVR:
1256 *pu32TSIf = E_TSP_TSIF_PVR0;
1257 break;
1258 case DMX_FLOW_PVR1:
1259 *pu32TSIf = E_TSP_TSIF_PVR1;
1260 break;
1261 case DMX_FLOW_PVR2:
1262 *pu32TSIf = E_TSP_TSIF_PVR2;
1263 break;
1264 case DMX_FLOW_PVR3:
1265 *pu32TSIf = E_TSP_TSIF_PVR3;
1266 break;
1267 default:
1268 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Unsupported DMX_FLOW_INPUT type error!\n", __LINE__));
1269 return FALSE;
1270 }
1271
1272 return TRUE;
1273 }
1274
_DMX_ApiDrv_DmxFlowReverseMapping(TSP_TSIF eTSIf,MS_U32 * pu32DmxFlow)1275 static MS_BOOL _DMX_ApiDrv_DmxFlowReverseMapping(TSP_TSIF eTSIf, MS_U32 *pu32DmxFlow)
1276 {
1277 *pu32DmxFlow = 0;
1278
1279 switch (eTSIf)
1280 {
1281 case E_TSP_TSIF_0:
1282 *pu32DmxFlow = DMX_FLOW_PLAYBACK;
1283 break;
1284 case E_TSP_TSIF_1:
1285 *pu32DmxFlow = DMX_FLOW_PLAYBACK1;
1286 break;
1287 case E_TSP_TSIF_2:
1288 *pu32DmxFlow = DMX_FLOW_PLAYBACK2;
1289 break;
1290 case E_TSP_TSIF_3:
1291 *pu32DmxFlow = DMX_FLOW_PLAYBACK3;
1292 break;
1293 case E_TSP_TSIF_4:
1294 *pu32DmxFlow = DMX_FLOW_PLAYBACK4;
1295 break;
1296 case E_TSP_TSIF_5:
1297 *pu32DmxFlow = DMX_FLOW_PLAYBACK5;
1298 break;
1299 case E_TSP_TSIF_6:
1300 *pu32DmxFlow = DMX_FLOW_PLAYBACK6;
1301 break;
1302 default:
1303 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Unsupported TSP_TSIF type error!\n", __LINE__));
1304 return FALSE;
1305 }
1306
1307 return TRUE;
1308 }
1309
_DMX_ApiDrv_PvrEngMapping(DMX_PVR_ENG eEng,MS_U32 * u32Eng)1310 static MS_BOOL _DMX_ApiDrv_PvrEngMapping(DMX_PVR_ENG eEng, MS_U32 *u32Eng)
1311 {
1312 switch(eEng)
1313 {
1314 case DMX_PVR_EGN0 ... DMX_PVR_EGN5:
1315 *u32Eng = eEng;
1316 break;
1317 case DMX_PVR_EGN6 ... DMX_PVR_EGN9:
1318 *u32Eng = eEng - 1;
1319 break;
1320 default:
1321 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Unsupported Pvr Eng type error!\n", __LINE__));
1322 *u32Eng = 0;
1323 return FALSE;
1324 }
1325
1326 return TRUE;
1327 }
1328
1329 #endif // End of TSP_VER_4_0
1330
1331 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
_DMX_Open_Stream(MS_U32 * pu32DmxId,DMX_FILTER_TYPE DmxFltType)1332 static DMX_FILTER_STATUS _DMX_Open_Stream(MS_U32* pu32DmxId, DMX_FILTER_TYPE DmxFltType)
1333 {
1334 MS_U32 FltId = 0;
1335 MS_U32 u32TSPFltSource;
1336 DrvTSP_FltType eTspFltType = (DrvTSP_FltType)DMX_FILTER_TYPE_VIDEO;
1337
1338 u32TSPFltSource = DmxFltType & ((MS_U32)DMX_FILTER_FLT_MASK);
1339 DmxFltType = DmxFltType & (DMX_FILTER_TYPE)(~DMX_FILTER_FLT_MASK);
1340
1341 if ((DMX_FILTER_TYPE_VIDEO!= DmxFltType) && (DMX_FILTER_TYPE_AUDIO!= DmxFltType) &&
1342 (DMX_FILTER_TYPE_AUDIO2!= DmxFltType) && (DMX_FILTER_TYPE_VIDEO3D!= DmxFltType)
1343 #if(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0))
1344 && (DMX_FILTER_TYPE_AUDIO3!= DmxFltType) && (DMX_FILTER_TYPE_AUDIO4!= DmxFltType)
1345 && (DMX_FILTER_TYPE_SCMBCHK!= DmxFltType) && (DMX_FILTER_TYPE_REC!= DmxFltType)
1346 #endif
1347 )
1348 {
1349 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Unknown error. Should NOT happen\n", __LINE__));
1350 return DMX_FILTER_STATUS_ERROR;
1351 }
1352
1353 if (DMX_FILTER_TYPE_VIDEO== DmxFltType)
1354 {
1355 eTspFltType= E_DRVTSP_FLT_TYPE_VIDEO | (DrvTSP_FltType)u32TSPFltSource;
1356 }
1357 else if (DMX_FILTER_TYPE_AUDIO== DmxFltType)
1358 {
1359 eTspFltType= E_DRVTSP_FLT_TYPE_AUDIO | (DrvTSP_FltType)u32TSPFltSource;
1360 }
1361 else if (DMX_FILTER_TYPE_AUDIO2== DmxFltType)
1362 {
1363 eTspFltType= E_DRVTSP_FLT_TYPE_AUDIO2 | (DrvTSP_FltType)u32TSPFltSource;
1364 }
1365 #if(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0))
1366 else if (DMX_FILTER_TYPE_AUDIO3== DmxFltType)
1367 {
1368 eTspFltType= E_DRVTSP_FLT_TYPE_AUDIO3 | (DrvTSP_FltType)u32TSPFltSource;
1369 }
1370 else if (DMX_FILTER_TYPE_AUDIO4== DmxFltType)
1371 {
1372 eTspFltType= E_DRVTSP_FLT_TYPE_AUDIO4 | (DrvTSP_FltType)u32TSPFltSource;
1373 }
1374 else if (DMX_FILTER_TYPE_SCMBCHK== DmxFltType)
1375 {
1376 eTspFltType = E_DRVTSP_FLT_TYPE_PVR | (DrvTSP_FltType)u32TSPFltSource; //allocate filter from 127 to 0
1377 }
1378 #endif
1379 else if (DMX_FILTER_TYPE_VIDEO3D== DmxFltType)
1380 {
1381 eTspFltType= E_DRVTSP_FLT_TYPE_VIDEO3D | (DrvTSP_FltType)u32TSPFltSource;
1382 }
1383 else if (DMX_FILTER_TYPE_REC== DmxFltType)
1384 {
1385 eTspFltType= E_DRVTSP_FLT_TYPE_PVR | (DrvTSP_FltType)u32TSPFltSource;
1386 }
1387
1388 if (DRVTSP_OK!= MDrv_TSP_PidFlt_Alloc(_Owner, eTspFltType, &FltId))
1389 {
1390 return DMX_FILTER_STATUS_ERROR;
1391 }
1392
1393 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0))
1394 //For getting PID filter scrambled status only
1395 if (DMX_FILTER_TYPE_SCMBCHK== DmxFltType)
1396 {
1397 if(MDrv_TSP_PidFlt_SetInputSrc(_Owner, FltId, (DrvTSP_FltType)(u32TSPFltSource & (E_DRVTSP_FLT_SOURCE_TYPE_MASK|E_DRVTSP_FLT_SOURCEID_MASK))) != DRVTSP_OK)
1398 {
1399 return DMX_FILTER_STATUS_ERROR;
1400 }
1401 }
1402 #endif
1403
1404 DMX_ASSERT(FltId< DMX_MAX_FLTID, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad FltId %u\n", __LINE__, (unsigned int)FltId)));
1405 _FLT_LIST_SECFLT_TYPE_SET(FltId, FltId, 0xFFFFFFFF, DmxFltType);
1406 *pu32DmxId = FltId;
1407
1408 return DMX_FILTER_STATUS_OK;
1409
1410 } // End of TSP_VER_1_0 and TSP_VER_3_0
1411
1412 #else // For TSP_VER_4_0
1413
_DMX_Open_Stream(MS_U32 * pu32DmxId,DMX_FILTER_TYPE DmxFltType)1414 static DMX_FILTER_STATUS _DMX_Open_Stream(MS_U32* pu32DmxId, DMX_FILTER_TYPE DmxFltType)
1415 {
1416 MS_U32 FltId = 0xFFFFFFFF;
1417 MS_U32 u32TSPFltSource, u32tmpTSPFltSource;
1418 MS_U32 u32IFrameLUTEn = 0x0;
1419 DrvTSP_FltType eTspFltType = (DrvTSP_FltType)DMX_FILTER_TYPE_VIDEO;
1420
1421 if(DmxFltType & ((DMX_FILTER_TYPE)DMX_FILTER_TYPE_EX_I_FRAME_PVR))
1422 {
1423 u32IFrameLUTEn = E_TSP_DST_IFRAME_LUT;
1424 }
1425
1426 u32TSPFltSource = DmxFltType & ((MS_U32)DMX_FILTER_FLT_MASK);
1427 DmxFltType = DmxFltType & (DMX_FILTER_TYPE)(~DMX_FILTER_FLT_MASK);
1428
1429 u32tmpTSPFltSource = _DMX_ApiDrv_FltSrcMapping(u32TSPFltSource);
1430 u32tmpTSPFltSource |= _DMX_ApiDrv_FltSrcIdMapping(u32TSPFltSource);
1431 u32TSPFltSource = u32tmpTSPFltSource;
1432
1433 switch(DmxFltType)
1434 {
1435 case DMX_FILTER_TYPE_VIDEO:
1436 eTspFltType= E_DRVTSP_FLT_TYPE_VIDEO | (DrvTSP_FltType)u32TSPFltSource;
1437 break;
1438 case DMX_FILTER_TYPE_VIDEO3D:
1439 eTspFltType= E_DRVTSP_FLT_TYPE_VIDEO3D | (DrvTSP_FltType)u32TSPFltSource;
1440 break;
1441 case DMX_FILTER_TYPE_VIDEO3:
1442 eTspFltType= E_DRVTSP_FLT_TYPE_VIDEO3 | (DrvTSP_FltType)u32TSPFltSource;
1443 break;
1444 case DMX_FILTER_TYPE_VIDEO4:
1445 eTspFltType= E_DRVTSP_FLT_TYPE_VIDEO4 | (DrvTSP_FltType)u32TSPFltSource;
1446 break;
1447 case DMX_FILTER_TYPE_VIDEO5:
1448 eTspFltType= E_DRVTSP_FLT_TYPE_VIDEO5 | (DrvTSP_FltType)u32TSPFltSource;
1449 break;
1450 case DMX_FILTER_TYPE_VIDEO6:
1451 eTspFltType= E_DRVTSP_FLT_TYPE_VIDEO6 | (DrvTSP_FltType)u32TSPFltSource;
1452 break;
1453 case DMX_FILTER_TYPE_VIDEO7:
1454 eTspFltType= E_DRVTSP_FLT_TYPE_VIDEO7 | (DrvTSP_FltType)u32TSPFltSource;
1455 break;
1456 case DMX_FILTER_TYPE_VIDEO8:
1457 eTspFltType= E_DRVTSP_FLT_TYPE_VIDEO8 | (DrvTSP_FltType)u32TSPFltSource;
1458 break;
1459 case DMX_FILTER_TYPE_AUDIO:
1460 eTspFltType= E_DRVTSP_FLT_TYPE_AUDIO | (DrvTSP_FltType)u32TSPFltSource;
1461 break;
1462 case DMX_FILTER_TYPE_AUDIO2:
1463 eTspFltType= E_DRVTSP_FLT_TYPE_AUDIO2 | (DrvTSP_FltType)u32TSPFltSource;
1464 break;
1465 case DMX_FILTER_TYPE_AUDIO3:
1466 eTspFltType= E_DRVTSP_FLT_TYPE_AUDIO3 | (DrvTSP_FltType)u32TSPFltSource;
1467 break;
1468 case DMX_FILTER_TYPE_AUDIO4:
1469 eTspFltType= E_DRVTSP_FLT_TYPE_AUDIO4 | (DrvTSP_FltType)u32TSPFltSource;
1470 break;
1471 case DMX_FILTER_TYPE_AUDIO5:
1472 eTspFltType= E_DRVTSP_FLT_TYPE_AUDIO5 | (DrvTSP_FltType)u32TSPFltSource;
1473 break;
1474 case DMX_FILTER_TYPE_AUDIO6:
1475 eTspFltType= E_DRVTSP_FLT_TYPE_AUDIO6 | (DrvTSP_FltType)u32TSPFltSource;
1476 break;
1477 case DMX_FILTER_TYPE_REC:
1478 eTspFltType= E_DRVTSP_FLT_TYPE_REC | (DrvTSP_FltType)u32TSPFltSource;
1479 break;
1480 case DMX_FILTER_TYPE_PVR:
1481 eTspFltType= E_DRVTSP_FLT_TYPE_PVR | (DrvTSP_FltType)u32TSPFltSource | u32IFrameLUTEn;
1482 break;
1483 case DMX_FILTER_TYPE_PVR1:
1484 eTspFltType= E_DRVTSP_FLT_TYPE_PVR1 | (DrvTSP_FltType)u32TSPFltSource | u32IFrameLUTEn;
1485 break;
1486 case DMX_FILTER_TYPE_PVR2:
1487 eTspFltType= E_DRVTSP_FLT_TYPE_PVR2 | (DrvTSP_FltType)u32TSPFltSource | u32IFrameLUTEn;
1488 break;
1489 case DMX_FILTER_TYPE_PVR3:
1490 eTspFltType= E_DRVTSP_FLT_TYPE_PVR3 | (DrvTSP_FltType)u32TSPFltSource | u32IFrameLUTEn;
1491 break;
1492 case DMX_FILTER_TYPE_PVR4:
1493 eTspFltType= E_DRVTSP_FLT_TYPE_PVR4 | (DrvTSP_FltType)u32TSPFltSource | u32IFrameLUTEn;
1494 break;
1495 case DMX_FILTER_TYPE_PVR5:
1496 eTspFltType= E_DRVTSP_FLT_TYPE_PVR5 | (DrvTSP_FltType)u32TSPFltSource | u32IFrameLUTEn;
1497 break;
1498 case DMX_FILTER_TYPE_PVR6:
1499 eTspFltType= E_DRVTSP_FLT_TYPE_PVR6 | (DrvTSP_FltType)u32TSPFltSource | u32IFrameLUTEn;
1500 break;
1501 case DMX_FILTER_TYPE_PVR7:
1502 eTspFltType= E_DRVTSP_FLT_TYPE_PVR7 | (DrvTSP_FltType)u32TSPFltSource | u32IFrameLUTEn;
1503 break;
1504 case DMX_FILTER_TYPE_PVR8:
1505 eTspFltType= E_DRVTSP_FLT_TYPE_PVR8 | (DrvTSP_FltType)u32TSPFltSource | u32IFrameLUTEn;
1506 break;
1507 case DMX_FILTER_TYPE_PVR9:
1508 eTspFltType= E_DRVTSP_FLT_TYPE_PVR9 | (DrvTSP_FltType)u32TSPFltSource | u32IFrameLUTEn;
1509 break;
1510 default:
1511 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Unknown error. Should NOT happen\n", __LINE__));
1512 return DMX_FILTER_STATUS_ERROR;
1513 }
1514
1515 if(_pdmx_res->_bIsDMXOpenCalled)
1516 {
1517 if (DRVTSP_OK!= MDrv_TSP_PidFlt_Alloc(_Owner, eTspFltType |u32TSPFltSource , &FltId))
1518 {
1519 return DMX_FILTER_STATUS_ERROR;
1520 }
1521 }
1522 else if(_pdmx_res->_bIsDMXOpenExCalled)
1523 {
1524 if (DRVTSP_OK!= MDrv_TSP_PidFlt_Alloc_Ex(_Owner, eTspFltType | u32TSPFltSource, &FltId))
1525 {
1526 return DMX_FILTER_STATUS_ERROR;
1527 }
1528 }
1529 else
1530 {
1531 return DMX_FILTER_STATUS_ERROR;
1532 }
1533
1534 DMX_ASSERT(FltId< DMX_MAX_FLTID, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad FltId %u\n", __LINE__, (unsigned int)FltId)));
1535
1536 _FLT_LIST_SECFLT_TYPE_SET(FltId, FltId, 0xFFFFFFFF, DmxFltType);
1537 *pu32DmxId = FltId;
1538
1539 return DMX_FILTER_STATUS_OK;
1540 }
1541 #endif // End of TSP_VER_4_0
1542
1543 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
_DMX_Open_Sect(MS_U32 * pu32DmxId,DMX_FILTER_TYPE DmxFltType)1544 static DMX_FILTER_STATUS _DMX_Open_Sect(MS_U32* pu32DmxId, DMX_FILTER_TYPE DmxFltType)
1545 {
1546 MS_U32 FltId= 0;
1547 MS_U32 SecBufId= 0xFFFFFFFF;
1548 MS_U32 u32TSPFltSource;
1549 DrvTSP_FltType eTspFltType = E_DRVTSP_FLT_TYPE_VIDEO;
1550
1551 *pu32DmxId = 0xFFFFFFFF;
1552 u32TSPFltSource = DmxFltType & DMX_FILTER_FLT_MASK;
1553 DmxFltType = DmxFltType & (DMX_FILTER_TYPE)(~DMX_FILTER_FLT_MASK);
1554
1555 DMX_ASSERT(
1556 (DMX_FILTER_TYPE_SECTION== DmxFltType) || (DMX_FILTER_TYPE_TELETEXT== DmxFltType) ||
1557 (DMX_FILTER_TYPE_PES== DmxFltType) || (DMX_FILTER_TYPE_PACKET== DmxFltType) ||
1558 (DMX_FILTER_TYPE_PCR== DmxFltType) || (DMX_FILTER_TYPE_SECTION_VER== DmxFltType) ||
1559 (DMX_FILTER_TYPE_SECTION_NO_PUSI == DmxFltType)
1560
1561 , DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Unknown error. Should NOT happen\n", __LINE__)));
1562
1563 switch (DmxFltType)
1564 {
1565 case DMX_FILTER_TYPE_SECTION:
1566 eTspFltType= E_DRVTSP_FLT_TYPE_SECTION;
1567 break;
1568 case DMX_FILTER_TYPE_TELETEXT:
1569 eTspFltType= E_DRVTSP_FLT_TYPE_TELETEXT;
1570 break;
1571 case DMX_FILTER_TYPE_PES:
1572 eTspFltType= E_DRVTSP_FLT_TYPE_PES;
1573 break;
1574 case DMX_FILTER_TYPE_PACKET:
1575 eTspFltType= E_DRVTSP_FLT_TYPE_PACKET;
1576 break;
1577 case DMX_FILTER_TYPE_PCR:
1578 eTspFltType= E_DRVTSP_FLT_TYPE_PCR;
1579 break;
1580 case DMX_FILTER_TYPE_SECTION_NO_PUSI:
1581 eTspFltType= E_DRVTSP_FLT_TYPE_SECTION_NO_PUSI;
1582 break;
1583 case DMX_FILTER_TYPE_SECTION_VER:
1584 eTspFltType = E_DRVTSP_FLT_TYPE_SECTION_VER;
1585 break;
1586 }
1587
1588 if (DRVTSP_OK!= MDrv_TSP_PidFlt_Alloc(_Owner , (DrvTSP_FltType)(eTspFltType|u32TSPFltSource), &FltId))
1589 {
1590 return DMX_FILTER_STATUS_ERROR;
1591 }
1592 DMX_ASSERT(FltId< DMX_MAX_FLTID, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad FltId %u\n", __LINE__, (unsigned int)FltId)));
1593
1594 if ((DMX_FILTER_TYPE_PCR== DmxFltType)) // open pid filter only for pcr since we have HWPCR now
1595 {
1596 goto _Open_Sect_end;
1597 }
1598
1599 SecBufId = FltId;
1600
1601 if (DRVTSP_OK!= MDrv_TSP_SecFlt_Alloc(_Owner, &SecBufId))
1602 {
1603 MDrv_TSP_PidFlt_Free(0 , FltId);
1604 return DMX_FILTER_STATUS_ERROR;
1605 }
1606
1607 MDrv_TSP_PidFlt_SelSecFlt(0, FltId, SecBufId);
1608
1609 _Open_Sect_end:
1610
1611 _FLT_LIST_SECFLT_TYPE_SET(FltId, FltId, SecBufId, DmxFltType);
1612 *pu32DmxId = (MS_U8)FltId;
1613
1614 return DMX_FILTER_STATUS_OK;
1615
1616 } // End of TSP_VER_1_0 and TSP_VER_3_0
1617
1618 #else // For TSP_VER_4_0
1619
_DMX_Open_Sect(MS_U32 * pu32DmxId,DMX_FILTER_TYPE DmxFltType)1620 static DMX_FILTER_STATUS _DMX_Open_Sect(MS_U32* pu32DmxId, DMX_FILTER_TYPE DmxFltType)
1621 {
1622 MS_U32 FltId= 0xFFFFFFFF;
1623 MS_U32 SecBufId= 0xFFFFFFFF;
1624 MS_U32 u32TSPFltSource, u32tmpTSPFltSource;
1625 DrvTSP_FltType eTspFltType = E_DRVTSP_FLT_TYPE_VIDEO;
1626
1627 u32TSPFltSource = DmxFltType & ((MS_U32)DMX_FILTER_FLT_MASK);
1628 DmxFltType = DmxFltType & (DMX_FILTER_TYPE)(~DMX_FILTER_FLT_MASK);
1629
1630 DMX_ASSERT(
1631 (DMX_FILTER_TYPE_SECTION== DmxFltType) || (DMX_FILTER_TYPE_TELETEXT== DmxFltType) ||
1632 (DMX_FILTER_TYPE_PES== DmxFltType) || (DMX_FILTER_TYPE_PACKET== DmxFltType) ||
1633 (DMX_FILTER_TYPE_PCR== DmxFltType),
1634 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Unknown error. Should NOT happen\n", __LINE__)));
1635
1636 u32tmpTSPFltSource = _DMX_ApiDrv_FltSrcMapping(u32TSPFltSource);
1637 u32tmpTSPFltSource |= _DMX_ApiDrv_FltSrcIdMapping(u32TSPFltSource);
1638 u32TSPFltSource = u32tmpTSPFltSource;
1639
1640 switch (DmxFltType)
1641 {
1642 case DMX_FILTER_TYPE_SECTION:
1643 eTspFltType= E_DRVTSP_FLT_TYPE_SECTION;
1644 break;
1645 case DMX_FILTER_TYPE_TELETEXT:
1646 eTspFltType= E_DRVTSP_FLT_TYPE_TELETEXT;
1647 break;
1648 case DMX_FILTER_TYPE_PES:
1649 eTspFltType= E_DRVTSP_FLT_TYPE_PES;
1650 break;
1651 case DMX_FILTER_TYPE_PACKET:
1652 eTspFltType= E_DRVTSP_FLT_TYPE_PACKET;
1653 break;
1654 case DMX_FILTER_TYPE_PCR:
1655 eTspFltType= E_DRVTSP_FLT_TYPE_PCR;
1656 break;
1657 }
1658
1659 if(_pdmx_res->_bIsDMXOpenCalled)
1660 {
1661 if (DRVTSP_OK!= MDrv_TSP_PidFlt_Alloc(_Owner, eTspFltType | u32TSPFltSource, &FltId))
1662 {
1663 return DMX_FILTER_STATUS_ERROR;
1664 }
1665 }
1666 else if(_pdmx_res->_bIsDMXOpenExCalled)
1667 {
1668 if (DRVTSP_OK!= MDrv_TSP_PidFlt_Alloc_Ex(_Owner, eTspFltType | u32TSPFltSource, &FltId))
1669 {
1670 return DMX_FILTER_STATUS_ERROR;
1671 }
1672 }
1673 else
1674 {
1675 return DMX_FILTER_STATUS_ERROR;
1676 }
1677 DMX_ASSERT(FltId< DMX_MAX_FLTID, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad FltId %u\n", __LINE__, (unsigned int)FltId)));
1678
1679 if (DMX_FILTER_TYPE_PCR== DmxFltType)
1680 {
1681 //set pcr src
1682 MDrv_TSP_FLT_SetPCRSrc(FltId,u32TSPFltSource);
1683 goto _Open_Sect_end;
1684 }
1685
1686 if ( (DMX_FILTER_TYPE_SECTION == DmxFltType) || (DMX_FILTER_TYPE_PES == DmxFltType) ||
1687 (DMX_FILTER_TYPE_PACKET == DmxFltType) || (DMX_FILTER_TYPE_TELETEXT == DmxFltType) )
1688 {
1689 if (DRVTSP_OK!= MDrv_TSP_SecFlt_Alloc(_Owner, &SecBufId))
1690 {
1691 MDrv_TSP_PidFlt_Free(0 , FltId);
1692 return DMX_FILTER_STATUS_ERROR;
1693 }
1694
1695 MDrv_TSP_PidFlt_SelSecFlt(0, FltId, SecBufId);
1696 }
1697 _Open_Sect_end:
1698 // @F_TODO check if DmxFltType is use else where for sw status then use it to set HW status
1699 _FLT_LIST_SECFLT_TYPE_SET(FltId, FltId, SecBufId, DmxFltType);
1700
1701 *pu32DmxId = FltId;
1702 return DMX_FILTER_STATUS_OK;
1703 }
1704 #endif // End of TSP_VER_4_0
1705
1706 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
_DMX_PVR_FlowSet(DMX_PVR_ENG eEng,DMX_TSIF ePvrSrcTSIf,MS_BOOL bDscmbRec)1707 static MS_BOOL _DMX_PVR_FlowSet(DMX_PVR_ENG eEng, DMX_TSIF ePvrSrcTSIf, MS_BOOL bDscmbRec)
1708 {
1709 MS_U32 u32Eng = 0;
1710 MS_U32 u32PVRSrc = 0;
1711
1712 if(_DMX_ApiDrv_PvrEngMapping(eEng, &u32Eng) == FALSE)
1713 return FALSE;
1714
1715 switch (ePvrSrcTSIf)
1716 {
1717 case DMX_TSIF_LIVE0:
1718 u32PVRSrc = E_TSP_FLT_SRC_LIVE0;
1719 break;
1720 case DMX_TSIF_LIVE1:
1721 u32PVRSrc = E_TSP_FLT_SRC_LIVE1;
1722 break;
1723 case DMX_TSIF_LIVE2:
1724 u32PVRSrc = E_TSP_FLT_SRC_LIVE2;
1725 break;
1726 case DMX_TSIF_LIVE3:
1727 u32PVRSrc = E_TSP_FLT_SRC_LIVE3;
1728 break;
1729 case DMX_TSIF_FILE0:
1730 u32PVRSrc = E_TSP_FLT_SRC_FILE0;
1731 break;
1732 case DMX_TSIF_FILE1:
1733 u32PVRSrc = E_TSP_FLT_SRC_FILE1;
1734 break;
1735 case DMX_TSIF_FILE2:
1736 u32PVRSrc = E_TSP_FLT_SRC_FILE2;
1737 break;
1738 case DMX_TSIF_FILE3:
1739 u32PVRSrc = E_TSP_FLT_SRC_FILE3;
1740 break;
1741 case DMX_TSIF_LIVE4:
1742 case DMX_TSIF_FILE4:
1743 u32PVRSrc = E_TSP_FLT_SRC_LIVE4;
1744 break;
1745 case DMX_TSIF_LIVE5:
1746 case DMX_TSIF_FILE5:
1747 u32PVRSrc = E_TSP_FLT_SRC_LIVE5;
1748 break;
1749 case DMX_TSIF_LIVE6:
1750 case DMX_TSIF_FILE6:
1751 u32PVRSrc = E_TSP_FLT_SRC_LIVE6;
1752 break;
1753 default:
1754 return FALSE;
1755 }
1756
1757 MDrv_TSP_PVR_SetFlowSource(u32Eng,u32PVRSrc);
1758
1759 return TRUE;
1760
1761 }
1762 #endif // End of TSP_VER_4_0
1763
1764 #ifdef TSO_20_ENABLE
_TSO_Flow_InputCfg(DMX_TSO_InputCfg * pstInputCfg)1765 static MS_BOOL _TSO_Flow_InputCfg(DMX_TSO_InputCfg* pstInputCfg)
1766 {
1767 MS_U8 u8Eng = 0;
1768 DrvTSO_If_Set IfSet;
1769 DrvTSO_If eIf = E_DRVTSO_IF_LIVE0;
1770 DrvTSO_CtrlMode eCtrMode = E_DRVTSO_CTRL_MODE_TS0;
1771 //MS_U32 u32timeout = 3000, u32StartTime = 0;
1772 //MS_BOOL bSVQBusy = TRUE;
1773
1774 if(pstInputCfg == NULL)
1775 return FALSE;
1776
1777 switch(pstInputCfg->eFlow)
1778 {
1779 case DMX_FLOW_TSO_PLAYBACK:
1780 case DMX_FLOW_TSO_MMT:
1781 u8Eng = 0;
1782 break;
1783 default:
1784 return FALSE;
1785 }
1786
1787 switch(pstInputCfg->eTSOInIf)
1788 {
1789 case DMX_TSIF_LIVE0:
1790 eIf = E_DRVTSO_IF_LIVE0;
1791 eCtrMode = E_DRVTSO_CTRL_MODE_TS0;
1792 break;
1793 case DMX_TSIF_LIVE1:
1794 eIf = E_DRVTSO_IF_LIVE1;
1795 eCtrMode = E_DRVTSO_CTRL_MODE_TS1;
1796 break;
1797 case DMX_TSIF_LIVE2:
1798 eIf = E_DRVTSO_IF_LIVE2;
1799 eCtrMode = E_DRVTSO_CTRL_MODE_TS2;
1800 break;
1801 case DMX_TSIF_LIVE3:
1802 eIf = E_DRVTSO_IF_LIVE3;
1803 eCtrMode = E_DRVTSO_CTRL_MODE_TS3;
1804 break;
1805 case DMX_TSIF_FILE0:
1806 eIf = E_DRVTSO_IF_FILE0;
1807 eCtrMode = E_DRVTSO_CTRL_MODE_MEM;
1808 break;
1809 case DMX_TSIF_FILE1:
1810 eIf = E_DRVTSO_IF_FILE1;
1811 eCtrMode = E_DRVTSO_CTRL_MODE_MEM1;
1812 break;
1813 case DMX_TSIF_MMT:
1814 eIf = E_DRVTSO_IF_MMT0;
1815 eCtrMode = E_DRVTSO_CTRL_MODE_MMT;
1816 break;
1817 default:
1818 return FALSE;
1819 }
1820
1821 if(pstInputCfg->eFlow != DMX_FLOW_TSO_MMT)
1822 {
1823 //Disable CH Interface first
1824 if(DRVTSO_OK != MDrv_TSO_Ch_InputEnable(u8Eng, eIf, FALSE))
1825 {
1826 return FALSE;
1827 }
1828
1829 //------- Check SVQ TX empty ----------------------
1830 #if 0
1831 u32StartTime = MsOS_GetSystemTime();
1832 while((MsOS_GetSystemTime() - u32StartTime) < u32timeout)
1833 {
1834 if((bSVQBusy = MDrv_TSO_Check_IsSVQTxBusy(u8Eng, eIf)) == FALSE)
1835 {
1836 break;
1837 }
1838 MsOS_DelayTask(1);
1839 }
1840 if(bSVQBusy == TRUE)
1841 return FALSE;
1842
1843 bSVQBusy = TRUE;
1844 u32StartTime = MsOS_GetSystemTime();
1845 while((MsOS_GetSystemTime() - u32StartTime) < u32timeout)
1846 {
1847 if((bSVQBusy = !MDrv_TSO_Check_IsSVQTxEmpty(u8Eng, eIf)) == FALSE)
1848 {
1849 break;
1850 }
1851 MsOS_DelayTask(1);
1852 }
1853
1854 if(bSVQBusy == TRUE)
1855 return FALSE;
1856
1857 #endif
1858 //------------------------------------------------------
1859
1860 if(DRVTSO_OK!= MDrv_TSO_LocalStreamId(u8Eng, eIf, &(pstInputCfg->u8LocalStrId), TRUE))
1861 {
1862 return FALSE;
1863 }
1864 }
1865
1866 if((pstInputCfg->eTSOInIf != DMX_TSIF_FILE0) && (pstInputCfg->eTSOInIf != DMX_TSIF_FILE1))
1867 {
1868 IfSet.bClkInv = pstInputCfg->stInputInfo.bClkInv;
1869 IfSet.bParallel = pstInputCfg->stInputInfo.bParallel;
1870 IfSet.bExtSync = pstInputCfg->stInputInfo.bExtSync;
1871 IfSet.ePad = 0;
1872 switch (pstInputCfg->stInputInfo.Input)
1873 {
1874 case DMX_FLOW_INPUT_DEMOD:
1875 IfSet.ePad = E_DRVTSO_PAD_DEMOD;
1876 break;
1877 case DMX_FLOW_INPUT_EXT_INPUT0:
1878 IfSet.ePad = E_DRVTSO_PAD_EXT_INPUT0;
1879 break;
1880 case DMX_FLOW_INPUT_EXT_INPUT1:
1881 IfSet.ePad = E_DRVTSO_PAD_EXT_INPUT1;
1882 break;
1883 case DMX_FLOW_INPUT_EXT_INPUT2:
1884 IfSet.ePad = E_DRVTSO_PAD_EXT_INPUT2;
1885 break;
1886 case DMX_FLOW_INPUT_EXT_INPUT3:
1887 IfSet.ePad = E_DRVTSO_PAD_EXT_INPUT3;
1888 break;
1889 case DMX_FLOW_INPUT_EXT_INPUT4:
1890 IfSet.ePad = E_DRVTSO_PAD_EXT_INPUT4;
1891 break;
1892 case DMX_FLOW_INPUT_EXT_INPUT5:
1893 IfSet.ePad = E_DRVTSO_PAD_EXT_INPUT5;
1894 break;
1895 case DMX_FLOW_INPUT_EXT_INPUT0_3WIRE:
1896 IfSet.ePad = E_DRVTSO_PAD_EXT_INPUT0_3WIRE;
1897 break;
1898 case DMX_FLOW_INPUT_EXT_INPUT1_3WIRE:
1899 IfSet.ePad = E_DRVTSO_PAD_EXT_INPUT1_3WIRE;
1900 break;
1901 case DMX_FLOW_INPUT_EXT_INPUT2_3WIRE:
1902 IfSet.ePad = E_DRVTSO_PAD_EXT_INPUT2_3WIRE;
1903 break;
1904 case DMX_FLOW_INPUT_EXT_INPUT3_3WIRE:
1905 IfSet.ePad = E_DRVTSO_PAD_EXT_INPUT3_3WIRE;
1906 break;
1907 case DMX_FLOW_INPUT_EXT_INPUT4_3WIRE:
1908 IfSet.ePad = E_DRVTSO_PAD_EXT_INPUT4_3WIRE;
1909 break;
1910 case DMX_FLOW_INPUT_EXT_INPUT5_3WIRE:
1911 IfSet.ePad = E_DRVTSO_PAD_EXT_INPUT5_3WIRE;
1912 break;
1913 case DMX_FLOW_INPUT_EXT_INPUT6_3WIRE:
1914 IfSet.ePad = E_DRVTSO_PAD_EXT_INPUT6_3WIRE;
1915 break;
1916 default:
1917 return FALSE;
1918 }
1919
1920 if(MDrv_TSO_SelPad(u8Eng, eIf, &IfSet) != DRVTSO_OK)
1921 {
1922 return DMX_FILTER_STATUS_ERROR;
1923 }
1924 }
1925
1926 if(MDrv_TSO_SetOperateMode(u8Eng, eCtrMode, pstInputCfg->bBypassAll, pstInputCfg->bEnable) != DRVTSO_OK)
1927 {
1928 return DMX_FILTER_STATUS_ERROR;
1929 }
1930
1931 return TRUE;
1932
1933 }
1934
_TSO_Flow_OutputCfg(DMX_TSO_OutputCfg * pstOutputCfg)1935 static MS_BOOL _TSO_Flow_OutputCfg(DMX_TSO_OutputCfg* pstOutputCfg)
1936 {
1937 MS_U8 u8Eng = 0;
1938
1939 DrvTSO_OutClkSrc eOutClkSrc = E_DRVTSO_OUTCLKSRC_172M_2N;
1940
1941 //default: 172.8/2(15+1) = 5.4M
1942 DrvTSO_OutClk eOutClk = E_DRVTSO_OUTCLK_DIV2N;
1943 MS_U16 u16DivNum = 0x0F;
1944
1945 MS_BOOL bClkIv = FALSE;
1946 //DrvTSO_PadOut eOutPad = (DrvTSO_PadOut)(pstOutputCfg->eOutPad);
1947
1948 if(pstOutputCfg == NULL)
1949 return FALSE;
1950
1951 /*if(MDrv_TSO_OutputEnable(u8Eng, FALSE) != DRVTSO_OK)
1952 {
1953 return FALSE;
1954 }*/
1955
1956 switch(pstOutputCfg->eFlow)
1957 {
1958 case DMX_FLOW_TSO_PLAYBACK:
1959 u8Eng = 0;
1960 break;
1961 default:
1962 return FALSE;
1963 }
1964
1965 #if !defined(TSO_HW_BOX_SERIES) //[temporarily]
1966 if(pstOutputCfg->eOutPad != E_DRVTSP_OUTPAD_NONE)
1967 {
1968 if(MDrv_TSP_OutputPadCfg(pstOutputCfg->eOutPad|E_DRVTSP_OUTPAD_FROM_TSO, E_DRVTSP_PAD_TSO, TRUE, TRUE) != DRVTSP_OK)
1969 {
1970 ULOGD("DMX", "[%s][%d] \n", __FUNCTION__, __LINE__);
1971 return FALSE;
1972 }
1973 }
1974 #endif
1975
1976 //default output pad select
1977 /*if(MDrv_TSO_OutputPad(0, &eOutPad, TRUE) != DRVTSO_OK)
1978 {
1979 return FALSE;
1980 }*/
1981
1982 //Setting default output clock
1983 if(pstOutputCfg->bDefOutClk == FALSE)
1984 {
1985 eOutClk = pstOutputCfg->eTsoOutClk;
1986 eOutClkSrc = pstOutputCfg->eTsoOutClkSrc;
1987 u16DivNum = pstOutputCfg->u16DivNum;
1988 bClkIv = pstOutputCfg->bOutClkInv;
1989 }
1990
1991 if(MDrv_TSO_SetOutClk(u8Eng, eOutClk, eOutClkSrc, u16DivNum, bClkIv) != DRVTSO_OK)
1992 {
1993 return FALSE;
1994 }
1995
1996 if(MDrv_TSO_OutputPktSize(u8Eng, &(pstOutputCfg->u16OutPktSize), TRUE) != DRVTSO_OK)
1997 {
1998 return FALSE;
1999 }
2000
2001 /*if(MDrv_TSO_OutputEnable(u8Eng, pstOutputCfg->bEnable) != DRVTSO_OK)
2002 {
2003 return FALSE;
2004 }*/
2005 return TRUE;
2006 }
2007
2008 #elif (defined(TSO_ENABLE) && (!defined(TSO_HW_BOX_SERIES)))
2009 //TSO HW 1.0 for TV series
_DMX_FlowSetTSO(DMX_FLOW DmxFlow,DMX_FLOW_INPUT DmxFlowInput,MS_BOOL bClkInv,MS_BOOL bExtSync,MS_BOOL bParallel)2010 static MS_BOOL _DMX_FlowSetTSO(DMX_FLOW DmxFlow, DMX_FLOW_INPUT DmxFlowInput, MS_BOOL bClkInv, MS_BOOL bExtSync, MS_BOOL bParallel)
2011 {
2012 DrvTSO_OutClk eOutClk = E_DRVTSO_OUTCLK_DIV2N;
2013 DrvTSO_OutClkSrc eOutClkSrc = E_DRVTSO_OUTCLKSRC_172M_2N;
2014 DrvTSO_If_Set IfSet;
2015 DrvTSO_CtrlMode eCtrMode = E_DRVTSO_CTRL_MODE_TS0;
2016 MS_U16 u16DivNum = 0;
2017 MS_U8 u8Eng = 0;
2018
2019 switch(DmxFlow)
2020 {
2021 case DMX_FLOW_TSO_PLAYBACK:
2022 u8Eng = 0;
2023 eCtrMode = E_DRVTSO_CTRL_MODE_TS0;
2024 break;
2025
2026 default:
2027 return FALSE;
2028 }
2029
2030 IfSet.bClkInv = FALSE;
2031 IfSet.bParallel = bParallel;
2032 IfSet.bExtSync = bExtSync;
2033 IfSet.ePad = 0;
2034 switch (DmxFlowInput)
2035 {
2036 case DMX_FLOW_INPUT_DEMOD:
2037 IfSet.ePad = E_DRVTSO_PAD_DEMOD;
2038 eOutClk = E_DRVTSO_OUTCLK_Dmd;
2039 break;
2040 case DMX_FLOW_INPUT_EXT_INPUT0:
2041 IfSet.ePad = E_DRVTSO_PAD_EXT_INPUT0;
2042 eOutClk = E_DRVTSO_OUTCLK_PTSOOUT;
2043 eOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS0IN;
2044 break;
2045 case DMX_FLOW_INPUT_EXT_INPUT1:
2046 IfSet.ePad = E_DRVTSO_PAD_EXT_INPUT1;
2047 eOutClk = E_DRVTSO_OUTCLK_PTSOOUT;
2048 eOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS1IN;
2049 break;
2050 case DMX_FLOW_INPUT_EXT_INPUT2:
2051 IfSet.ePad = E_DRVTSO_PAD_EXT_INPUT2;
2052 eOutClk = E_DRVTSO_OUTCLK_PTSOOUT;
2053 eOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS2IN;
2054 break;
2055 case DMX_FLOW_INPUT_MEM:
2056 eCtrMode = E_DRVTSO_CTRL_MODE_MEM;
2057 //default: 172.8/2(15+1) = 5.4M
2058 IfSet.ePad = E_DRVTSO_MEM;
2059 eOutClk = E_DRVTSO_OUTCLK_DIV2N;
2060 eOutClkSrc = E_DRVTSO_OUTCLKSRC_172M_2N;
2061 u16DivNum = 0x0F;
2062 break;
2063
2064 default:
2065 return FALSE;
2066 }
2067
2068 if(MDrv_TSO_SetOutClk(u8Eng, eOutClk, eOutClkSrc, u16DivNum, bClkInv) != DRVTSO_OK)
2069 {
2070 return FALSE;
2071 }
2072
2073 if(MDrv_TSO_SelPad(u8Eng, &IfSet) != DRVTSO_OK)
2074 {
2075 return FALSE;
2076 }
2077
2078 if(MDrv_TSO_SetOperateMode(u8Eng, eCtrMode, bClkInv, bParallel) != DRVTSO_OK)
2079 {
2080 return FALSE;
2081 }
2082
2083 return TRUE;
2084 }
2085
2086 #else
2087
2088 #ifdef TSO_ENABLE
2089 //TSO HW 1.0 for BOX series
_DMX_FlowSetTSO(DMX_FLOW DmxFlow,DMX_FLOW_INPUT DmxFlowInput,MS_BOOL bClkInv,MS_BOOL bExtSync,MS_BOOL bParallel)2090 static MS_BOOL _DMX_FlowSetTSO(DMX_FLOW DmxFlow, DMX_FLOW_INPUT DmxFlowInput, MS_BOOL bClkInv, MS_BOOL bExtSync, MS_BOOL bParallel)
2091 {
2092
2093 DrvTSO_CtrlMode eDrvTSOCtrlMode= E_DRVTSO_CTRL_MODE_INVALID;
2094 MS_U8 u8TSOEng = 0;
2095 TSP_TSPad ePad = E_TSP_TS_INVALID;
2096 // STB drvTSP has different enum from TV's
2097 switch (DmxFlowInput)
2098 {
2099 case DMX_FLOW_INPUT_DEMOD:
2100 ePad = E_TSP_TS_DEMOD0;
2101 eDrvTSOCtrlMode = E_DRVTSO_CTRL_MODE_DEMOD0;
2102 break;
2103 case DMX_FLOW_INPUT_DEMOD1:
2104 ePad = E_TSP_TS_DEMOD1;
2105 eDrvTSOCtrlMode = E_DRVTSO_CTRL_MODE_DEMOD1;
2106 break;
2107 case DMX_FLOW_INPUT_EXT_INPUT0:
2108 ePad = E_TSP_TS_PAD0;
2109 eDrvTSOCtrlMode = E_DRVTSO_CTRL_MODE_TS0;
2110 break;
2111 case DMX_FLOW_INPUT_EXT_INPUT1:
2112 ePad = E_TSP_TS_PAD1;
2113 eDrvTSOCtrlMode = E_DRVTSO_CTRL_MODE_TS1;
2114 break;
2115 case DMX_FLOW_INPUT_EXT_INPUT2:
2116 ePad = E_TSP_TS_PAD2;
2117 eDrvTSOCtrlMode = E_DRVTSO_CTRL_MODE_TS2;
2118 break;
2119 case DMX_FLOW_INPUT_EXT_INPUT3:
2120 ePad = E_TSP_TS_PAD3;
2121 eDrvTSOCtrlMode = E_DRVTSO_CTRL_MODE_TS3;
2122 break;
2123 case DMX_FLOW_INPUT_MEM:
2124 ePad = E_TSP_TS_PAD0;
2125 eDrvTSOCtrlMode = E_DRVTSO_CTRL_MODE_MEM;
2126 break;
2127 case DMX_FLOW_INPUT_DISABLE:
2128 ePad = E_TSP_TS_PAD0;
2129 eDrvTSOCtrlMode = E_DRVTSO_CTRL_MODE_DEMOD0;
2130 break;
2131
2132 case DMX_FLOW_INPUT_TSO:// TSO cannot input from TSO
2133 case DMX_FLOW_INPUT_TSO1:// TSO cannot input from TSO
2134 default:
2135 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Unsupported DMX_FLOW_INPUT type error!\n", __LINE__));
2136 return FALSE;
2137 }
2138
2139 switch (DmxFlow)
2140 {
2141 case DMX_FLOW_TSO_PLAYBACK:
2142 u8TSOEng = 0;
2143 break;
2144 case DMX_FLOW_TSO_PLAYBACK1:
2145 u8TSOEng = 1;
2146 break;
2147
2148 default:
2149 return FALSE;
2150 }
2151 MDrv_TSO_SetOperateMode(u8TSOEng, (eDrvTSOCtrlMode & 0xFF), bClkInv, bParallel);
2152 MDrv_TSP_TSO_ConfigPad(u8TSOEng, ePad);
2153 // MDrv_TSO_SetTSO_FROM_TSOUT_MUX; // @F_TODO not implement yet...
2154
2155 return TRUE;
2156 }
2157 #endif //end of TSO_ENABLE
2158
2159 #endif //end of TSO_HW_BOX_SERIES
2160
2161 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0))
2162 //-------------------------------------------------------------------------
2163 // For TSP version 3.0:
2164 // DMX_FLOW_PLAYBACK : TSIF0 / PIDFLT0 / Live and File
2165 // DMX_FLOW_PVR : TSIF1 / PIDFLT1 / Rec0 (Could change input source later)
2166 // DMX_FLOW_PVR1 : TSIF2 / PIDFLT2 /Rec1 (Could change input source later)
2167 // DMX_FLOW_PVRCA : TSIF0 / PIDFLT0 /Rec0 with DSCMB0
2168 // DMX_FLOW_MMFI0 (DMX_FLOW_FILEIN_MM) : MMFI Audio / MMFIA PIDFLT / File audio
2169 // DMX_FLOW_MMFI1 (DMX_FLOW_FILEIN_MM3D) : MMFI V3D / MMFIV3D PIDFLT / File V3D
2170 // DMX_FLOW_CIPHSS_PLAYBACK : TS1 / PIDFLTF for DSCMB / Live for SCMB packet
2171 // DMX_FLOW_CIPHSS_PVRCA : TS1 / PIDFLT1 for DSCMB / Rec0 with DSCMB
2172 // DMX_FLOW_PVR2 : TSIFCB / PIDFLTCB /RecCB
2173 //
2174 // DMX_FLOW_TSO_PLAYBACK : TSOIF / PIDFLTSO /Live and File
2175 //
2176 // DMX_FLOW_PLAYBACK1 : TSIF1 / PIDFLT1 / Live
2177 // DMX_FLOW_PVRCA1 : TSIF1/ PIDFLT1 /Rec1 with DSCMB1
2178 //--------------------------------------------------------------------------
_DMX_FlowSet(DMX_FLOW DmxFlow,DMX_FLOW_INPUT DmxFlowInput,MS_BOOL bClkInv,MS_BOOL bExtSync,MS_BOOL bParallel)2179 static MS_BOOL _DMX_FlowSet(DMX_FLOW DmxFlow, DMX_FLOW_INPUT DmxFlowInput, MS_BOOL bClkInv, MS_BOOL bExtSync, MS_BOOL bParallel)
2180 {
2181 DrvTSP_If_Set IfSet;
2182 MS_U32 u32DScmbEngId = 0xFF;
2183 MS_BOOL bFileMode = FALSE;
2184 MS_BOOL bPvrBlockEnable = FALSE;
2185
2186 #ifdef TSO_20_ENABLE
2187
2188 if(DmxFlow == DMX_FLOW_TSO_PLAYBACK)
2189 {
2190 DMX_TSO_OutputCfg stOutputCfg;
2191
2192 stOutputCfg.bDefOutClk = FALSE;
2193 stOutputCfg.bOutClkInv = FALSE;
2194 switch (DmxFlowInput)
2195 {
2196 case DMX_FLOW_INPUT_DEMOD:
2197 stOutputCfg.eTsoOutClk = E_DRVTSO_OUTCLK_Dmd;
2198 break;
2199 case DMX_FLOW_INPUT_EXT_INPUT0:
2200 stOutputCfg.eTsoOutClk = E_DRVTSO_OUTCLK_PTSOOUT;
2201 stOutputCfg.eTsoOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS0IN;
2202 break;
2203 case DMX_FLOW_INPUT_EXT_INPUT1:
2204 stOutputCfg.eTsoOutClk = E_DRVTSO_OUTCLK_PTSOOUT;
2205 stOutputCfg.eTsoOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS1IN;
2206 break;
2207 case DMX_FLOW_INPUT_EXT_INPUT2:
2208 stOutputCfg.eTsoOutClk = E_DRVTSO_OUTCLK_PTSOOUT;
2209 stOutputCfg.eTsoOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS2IN;
2210 break;
2211 case DMX_FLOW_INPUT_EXT_INPUT3:
2212 stOutputCfg.eTsoOutClk = E_DRVTSO_OUTCLK_PTSOOUT;
2213 stOutputCfg.eTsoOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS3IN;
2214 break;
2215 case DMX_FLOW_INPUT_EXT_INPUT4:
2216 stOutputCfg.eTsoOutClk = E_DRVTSO_OUTCLK_PTSOOUT;
2217 stOutputCfg.eTsoOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS4IN;
2218 break;
2219 case DMX_FLOW_INPUT_EXT_INPUT5:
2220 stOutputCfg.eTsoOutClk = E_DRVTSO_OUTCLK_PTSOOUT;
2221 stOutputCfg.eTsoOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS5IN;
2222 break;
2223 case DMX_FLOW_INPUT_MEM:
2224 case DMX_FLOW_INPUT_MEM1:
2225 default:
2226 stOutputCfg.bDefOutClk = TRUE;
2227 break;
2228 }
2229
2230 stOutputCfg.eFlow = DmxFlow;
2231 stOutputCfg.eOutPad = DMX_FLOW_OUTPUT_EXT_PAD1;
2232 stOutputCfg.u16OutPktSize = 0xBC;
2233 stOutputCfg.bEnable = TRUE;
2234 stOutputCfg.bSet = TRUE;
2235 if(_TSO_Flow_OutputCfg(&stOutputCfg) == FALSE)
2236 return FALSE;
2237 }
2238
2239 if((DmxFlow == DMX_FLOW_TSO_PLAYBACK) || (DmxFlow == DMX_FLOW_TSO_MMT))
2240 {
2241 DMX_TSO_InputCfg stInputCfg;
2242
2243 stInputCfg.eFlow = DmxFlow;
2244 stInputCfg.stInputInfo.Input = DmxFlowInput;
2245 stInputCfg.stInputInfo.bClkInv = bClkInv;
2246 stInputCfg.stInputInfo.bExtSync = bExtSync;
2247 stInputCfg.stInputInfo.bParallel = bParallel;
2248 stInputCfg.u8LocalStrId = 0x47;
2249 stInputCfg.bBypassAll = TRUE;
2250 stInputCfg.bEnable = TRUE;
2251 stInputCfg.bSet = TRUE;
2252 if(DMX_FLOW_TSO_PLAYBACK == DmxFlow)
2253 {
2254 if(DmxFlowInput == DMX_FLOW_INPUT_MEM)
2255 {
2256 stInputCfg.eTSOInIf = DMX_TSIF_FILE0;
2257 }
2258 else if(DmxFlowInput == DMX_FLOW_INPUT_MEM1)
2259 {
2260 stInputCfg.eTSOInIf = DMX_TSIF_FILE1;
2261 }
2262 else
2263 {
2264 stInputCfg.eTSOInIf = DMX_TSIF_LIVE0;
2265 }
2266 }
2267 else if(DMX_FLOW_TSO_MMT == DmxFlow)
2268 {
2269 stInputCfg.eTSOInIf = DMX_TSIF_MMT;
2270 }
2271
2272 return _TSO_Flow_InputCfg(&stInputCfg);
2273 }
2274
2275 #endif // End of TSO_20_ENABLE
2276
2277 if ((DMX_FLOW_INPUT_MEM == DmxFlowInput) || (DMX_FLOW_INPUT_MEM_NOPASSCA == DmxFlowInput)
2278 || (DMX_FLOW_INPUT_MEM_PASSCA1 == DmxFlowInput))
2279 {
2280 bPvrBlockEnable = TRUE;
2281
2282 if(DMX_FLOW_PLAYBACK == DmxFlow)
2283 {
2284 if(DmxFlowInput == DMX_FLOW_INPUT_MEM)
2285 {
2286 MDrv_TSP_GetDscmbEngIdx_BySource(E_DRVTSP_PKTSRC_DEMUXFILE, &u32DScmbEngId);
2287 MDrv_TSP_SetOperateMode(0, E_DRVTSP_CTRL_MODE_MEM, (MS_U8)u32DScmbEngId);
2288 }
2289 else if(DmxFlowInput == DMX_FLOW_INPUT_MEM_NOPASSCA)
2290 {
2291 MDrv_TSP_SetOperateMode(0, E_DRVTSP_CTRL_MODE_MEM, 0xFF);
2292 }
2293 else if(DmxFlowInput == DMX_FLOW_INPUT_MEM_PASSCA1)
2294 {
2295 MDrv_TSP_SetOperateMode(0, E_DRVTSP_CTRL_MODE_MEM, 1);
2296 }
2297
2298 MDrv_TSP_File_CMDQ_Reset();
2299
2300 return TRUE;
2301 }
2302 else if(DMX_FLOW_MMFI0 == DmxFlow)
2303 {
2304 MDrv_TSP_File_TSIFSrcSel(E_DRVTSP_FLT_SOURCE_TYPE_TS1, FALSE); //Select MMFI CMDQ Src
2305 MDrv_MMFI_File_CmdQ_Reset(E_DRVMMFI_PATH0);
2306 return TRUE;
2307 }
2308 else if(DMX_FLOW_MMFI1 == DmxFlow)
2309 {
2310 MDrv_TSP_File_TSIFSrcSel(E_DRVTSP_FLT_SOURCE_TYPE_TS2, FALSE); //Select MMFI CMDQ Src
2311 MDrv_MMFI_File_CmdQ_Reset(E_DRVMMFI_PATH1);
2312 return TRUE;
2313 }
2314 else if(DMX_FLOW_PLAYBACK1 == DmxFlow)
2315 {
2316 bFileMode = TRUE;
2317 MDrv_MMFI_File_CmdQ_Reset(E_DRVMMFI_PATH0);
2318 }
2319 else if(DMX_FLOW_PLAYBACK2 == DmxFlow)
2320 {
2321 bFileMode = TRUE;
2322 MDrv_MMFI_File_CmdQ_Reset(E_DRVMMFI_PATH1);
2323 }
2324 else
2325 {
2326 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] File in must work in playback flow\n", __LINE__));
2327 return FALSE;
2328 }
2329 }
2330
2331 switch (DmxFlowInput)
2332 {
2333 case DMX_FLOW_INPUT_DEMOD:
2334 IfSet.ePad = E_DRVTSP_PAD_DEMOD;
2335 break;
2336 case DMX_FLOW_INPUT_EXT_INPUT0:
2337 IfSet.ePad = E_DRVTSP_PAD_EXT_INPUT0;
2338 break;
2339 case DMX_FLOW_INPUT_EXT_INPUT1:
2340 IfSet.ePad = E_DRVTSP_PAD_EXT_INPUT1;
2341 break;
2342 case DMX_FLOW_INPUT_EXT_INPUT2:
2343 IfSet.ePad = E_DRVTSP_PAD_EXT_INPUT2;
2344 break;
2345 case DMX_FLOW_INPUT_EXT_INPUT3:
2346 IfSet.ePad = E_DRVTSP_PAD_EXT_INPUT3;
2347 break;
2348 case DMX_FLOW_INPUT_EXT_INPUT4:
2349 IfSet.ePad = E_DRVTSP_PAD_EXT_INPUT4;
2350 break;
2351 case DMX_FLOW_INPUT_EXT_INPUT5:
2352 IfSet.ePad = E_DRVTSP_PAD_EXT_INPUT5;
2353 break;
2354 // 3Wire mode
2355 case DMX_FLOW_INPUT_EXT_INPUT0_3WIRE:
2356 IfSet.ePad = E_DRVTSP_PAD_EXT_INPUT0_3WIRE;
2357 break;
2358 case DMX_FLOW_INPUT_EXT_INPUT1_3WIRE:
2359 IfSet.ePad = E_DRVTSP_PAD_EXT_INPUT1_3WIRE;
2360 break;
2361 case DMX_FLOW_INPUT_EXT_INPUT2_3WIRE:
2362 IfSet.ePad = E_DRVTSP_PAD_EXT_INPUT2_3WIRE;
2363 break;
2364 case DMX_FLOW_INPUT_EXT_INPUT3_3WIRE:
2365 IfSet.ePad = E_DRVTSP_PAD_EXT_INPUT3_3WIRE;
2366 break;
2367 case DMX_FLOW_INPUT_EXT_INPUT4_3WIRE:
2368 IfSet.ePad = E_DRVTSP_PAD_EXT_INPUT4_3WIRE;
2369 break;
2370 case DMX_FLOW_INPUT_EXT_INPUT5_3WIRE:
2371 IfSet.ePad = E_DRVTSP_PAD_EXT_INPUT5_3WIRE;
2372 break;
2373 #ifdef TSO_ENABLE
2374 case DMX_FLOW_INPUT_TSO:
2375 IfSet.ePad = E_DRVTSP_PAD_TSO;
2376 break;
2377 #endif
2378 default:
2379 break;
2380 }
2381
2382 IfSet.bClkInv = bClkInv;
2383 IfSet.bExtSync = bExtSync;
2384 IfSet.bParallel = bParallel;
2385
2386 DrvTSP_If TspIf;
2387 DrvTSP_CtrlMode CtrlMode;
2388
2389 switch(DmxFlow)
2390 {
2391 case DMX_FLOW_PLAYBACK:
2392 TspIf = E_DRVTSP_IF_TS0;
2393 CtrlMode = E_DRVTSP_CTRL_MODE_TS0;
2394 MDrv_TSP_GetDscmbEngIdx_BySource(E_DRVTSP_PKTSRC_DEMUX0, &u32DScmbEngId);
2395 break;
2396 case DMX_FLOW_PLAYBACK1:
2397 TspIf = E_DRVTSP_IF_TS1;
2398 CtrlMode = E_DRVTSP_CTRL_MODE_TS1;
2399 MDrv_TSP_GetDscmbEngIdx_BySource(E_DRVTSP_PKTSRC_DEMUX1, &u32DScmbEngId);
2400 MDrv_TSP_File_TSIFSrcSel(E_DRVTSP_FLT_SOURCE_TYPE_TS1, bFileMode); //Select MMFI CMDQ Src
2401 break;
2402 case DMX_FLOW_PLAYBACK2:
2403 TspIf = E_DRVTSP_IF_TS2;
2404 CtrlMode = E_DRVTSP_CTRL_MODE_TS2;
2405 MDrv_TSP_GetDscmbEngIdx_BySource(E_DRVTSP_PKTSRC_DEMUX2, &u32DScmbEngId);
2406 MDrv_TSP_File_TSIFSrcSel(E_DRVTSP_FLT_SOURCE_TYPE_TS2, bFileMode); //Select MMFI CMDQ Src
2407 break;
2408 #ifdef MERGE_STR_SUPPORT
2409 case DMX_FLOW_PLAYBACK_FI:
2410 TspIf = E_DRVTSP_IF_FI;
2411 CtrlMode = E_DRVTSP_CTRL_MODE_TSFI_LIVE;
2412 MDrv_TSP_GetDscmbEngIdx_BySource(E_DRVTSP_PKTSRC_DEMUXFILE, &u32DScmbEngId);
2413 MDrv_TSP_File_TSIFSrcSel(E_DRVTSP_FLT_SOURCE_TYPE_FILE, bFileMode);
2414 break;
2415 #endif
2416 case DMX_FLOW_PVR:
2417 TspIf = E_DRVTSP_IF_TS0;
2418 CtrlMode = E_DRVTSP_CTRL_MODE_TS0;
2419 MDrv_TSP_GetDscmbEngIdx_BySource(E_DRVTSP_PKTSRC_DEMUX0, &u32DScmbEngId);
2420 MDrv_TSP_PVR_Eng_SelSrc(0, E_DRVTSP_PKTSRC_DEMUX0);
2421 MDrv_TSP_PVR_BlockEnable(0, bPvrBlockEnable);
2422 _pdmx_res->_u32PVREngSrc[0] = (MS_U32)E_DRVTSP_PKTSRC_DEMUX0;
2423 break;
2424 case DMX_FLOW_PVR1:
2425 TspIf = E_DRVTSP_IF_TS1;
2426 CtrlMode = E_DRVTSP_CTRL_MODE_TS1;
2427 MDrv_TSP_GetDscmbEngIdx_BySource(E_DRVTSP_PKTSRC_DEMUX1, &u32DScmbEngId);
2428 MDrv_TSP_PVR_Eng_SelSrc(1, E_DRVTSP_PKTSRC_DEMUX1);
2429 MDrv_TSP_PVR_BlockEnable(1, bPvrBlockEnable);
2430 _pdmx_res->_u32PVREngSrc[1] = (MS_U32)E_DRVTSP_PKTSRC_DEMUX1;
2431 break;
2432 case DMX_FLOW_PVR2: //PVR_CB
2433 TspIf = E_DRVTSP_IF_TS3;
2434 CtrlMode = E_DRVTSP_CTRL_MODE_TS3;
2435 break;
2436 case DMX_FLOW_PVRCA:
2437 case DMX_FLOW_CIPHSS_PVRCA:
2438 TspIf = E_DRVTSP_IF_TS0;
2439 CtrlMode = E_DRVTSP_CTRL_MODE_PVR_CA;
2440 MDrv_TSP_GetDscmbEngIdx_BySource(E_DRVTSP_PKTSRC_DEMUX0, &u32DScmbEngId);
2441 MDrv_TSP_PVR_Eng_SelSrc(0, E_DRVTSP_PKTSRC_DEMUX0);
2442 MDrv_TSP_PVR_BlockEnable(0, bPvrBlockEnable);
2443 _pdmx_res->_u32PVREngSrc[0] = (MS_U32)E_DRVTSP_PKTSRC_DEMUX0;
2444 break;
2445 case DMX_FLOW_PVRCA1:
2446 TspIf = E_DRVTSP_IF_TS1;
2447 CtrlMode = E_DRVTSP_CTRL_MODE_PVR1_CA;
2448 MDrv_TSP_GetDscmbEngIdx_BySource(E_DRVTSP_PKTSRC_DEMUX1, &u32DScmbEngId);
2449 MDrv_TSP_PVR_Eng_SelSrc(1, E_DRVTSP_PKTSRC_DEMUX1);
2450 MDrv_TSP_PVR_BlockEnable(1, bPvrBlockEnable);
2451 _pdmx_res->_u32PVREngSrc[1] = (MS_U32)E_DRVTSP_PKTSRC_DEMUX1;
2452 break;
2453 case DMX_FLOW_CIPHSS_PLAYBACK:
2454 TspIf = E_DRVTSP_IF_TS1;
2455 CtrlMode = E_DRVTSP_CTRL_MODE_TS1;
2456 break;
2457
2458 default:
2459 return FALSE;
2460 }
2461
2462 if(MDrv_TSP_SetOperateMode(0, CtrlMode, (MS_U8)u32DScmbEngId) != DRVTSP_OK)
2463 return FALSE;
2464
2465 if (!((DMX_FLOW_INPUT_MEM == DmxFlowInput) || (DMX_FLOW_INPUT_MEM_NOPASSCA == DmxFlowInput)
2466 || (DMX_FLOW_INPUT_MEM_PASSCA1 == DmxFlowInput)))
2467 {
2468 if(MDrv_TSP_SelPad(0, TspIf, &IfSet) != DRVTSP_OK)
2469 return FALSE;
2470 }
2471
2472 return TRUE;
2473
2474 } // End of TSP_VER_3_0
2475
2476 #elif (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
2477
2478 //-------------------------------------------------------------------------
2479 // For TSP version 1.0:
2480 // DMX_FLOW_PLAYBACK : TSIF0 / PIDFLT0 / Live and File
2481 // DMX_FLOW_PVR : TSIF1 / PIDFLT1 / Rec0
2482 // DMX_FLOW_PVR1 : TSIFCB / PIDFLTCB /RecCB
2483 // DMX_FLOW_PVRCA : TSIF1 / PIDFLT1 /Rec0 with DSCMB
2484 // DMX_FLOW_PVRCA1 : TSIF1 / PIDFLT1 /Rec1 with DSCMB (Source TSIF2 from TSIF1)
2485 // DMX_FLOW_FILEIN_MM : MMFI Audio / MMFIA PIDFLT / File audio
2486 // DMX_FLOW_FILEIN_MM3D : MMFI V3D / MMFIV3D PIDFLT / File V3D
2487 // DMX_FLOW_CIPHSS_PLAYBACK : TS1 / PIDFLTF for DSCMB / Live for SCMB packet
2488 // DMX_FLOW_CIPHSS_PVRCA : TS1 / PIDFLT1 for DSCMB / Rec0 with DSCMB
2489 //--------------------------------------------------------------------------
_DMX_FlowSet(DMX_FLOW DmxFlow,DMX_FLOW_INPUT DmxFlowInput,MS_BOOL bClkInv,MS_BOOL bExtSync,MS_BOOL bParallel)2490 static MS_BOOL _DMX_FlowSet(DMX_FLOW DmxFlow, DMX_FLOW_INPUT DmxFlowInput, MS_BOOL bClkInv, MS_BOOL bExtSync, MS_BOOL bParallel)
2491 {
2492 DrvTSP_If_Set IfSet;
2493
2494 //version 1.0 has only 1 ca0 engine, and no ca1 engine
2495 if(DmxFlowInput == DMX_FLOW_INPUT_MEM_PASSCA1)
2496 return FALSE;
2497
2498 #ifdef TSO_ENABLE
2499 if(DMX_FLOW_TSO_PLAYBACK== DmxFlow)
2500 {
2501 return _DMX_FlowSetTSO(DmxFlow, DmxFlowInput, bClkInv, bExtSync, bParallel);
2502 }
2503 #endif
2504
2505 if ((DMX_FLOW_INPUT_MEM == DmxFlowInput) || (DMX_FLOW_INPUT_MEM_NOPASSCA == DmxFlowInput))
2506 {
2507 #if 0
2508 if(!((DMX_FLOW_PLAYBACK == DmxFlow) || (DMX_FLOW_FILEIN_MM == DmxFlow) || (DMX_FLOW_FILEIN_MM3D == DmxFlow)))
2509 {
2510 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] File in must work in playback flow\n", __LINE__));
2511 return FALSE;
2512 }
2513 #endif
2514
2515 if(DmxFlow == DMX_FLOW_PVRCA)
2516 {
2517 MDrv_TSP_SetOperateMode(0, E_DRVTSP_CTRL_MODE_MEM_PVR);
2518 }
2519 if(DmxFlowInput == DMX_FLOW_INPUT_MEM)
2520 {
2521 MDrv_TSP_SetOperateMode(0, E_DRVTSP_CTRL_MODE_MEM);
2522 }
2523 else
2524 {
2525 MDrv_TSP_SetOperateMode(0, E_DRVTSP_CTRL_MODE_MEM_NOCA);
2526 }
2527
2528 return TRUE;
2529 }
2530
2531 memset(&IfSet, 0x0, sizeof(DrvTSP_If_Set));
2532 switch (DmxFlowInput)
2533 {
2534 case DMX_FLOW_INPUT_DEMOD:
2535 IfSet.ePad = E_DRVTSP_PAD_DEMOD;
2536 break;
2537 case DMX_FLOW_INPUT_EXT_INPUT0:
2538 IfSet.ePad = E_DRVTSP_PAD_EXT_INPUT0;
2539 break;
2540 case DMX_FLOW_INPUT_EXT_INPUT1:
2541 IfSet.ePad = E_DRVTSP_PAD_EXT_INPUT1;
2542 break;
2543 //-- Note: Not support for all chip -------------------
2544 #ifdef TS2_IF_SUPPORT
2545 case DMX_FLOW_INPUT_EXT_INPUT2:
2546 IfSet.ePad = E_DRVTSP_PAD_EXT_INPUT2;
2547 break;
2548 #endif
2549 //-----------------------------------------------
2550
2551 #ifdef TSO_ENABLE
2552 case DMX_FLOW_INPUT_TSO:
2553 IfSet.ePad = E_DRVTSP_PAD_TSO;
2554 break;
2555 #endif
2556
2557 default:
2558 MS_ASSERT(0);
2559 break;
2560 }
2561
2562 IfSet.bClkInv = bClkInv;
2563 IfSet.bExtSync = bExtSync;
2564 IfSet.bParallel = bParallel;
2565
2566 DrvTSP_If TspIf;
2567 DrvTSP_CtrlMode CtrlMode;
2568
2569 #ifdef TS2_IF_SUPPORT
2570 MS_U32 u32data = 0;
2571 #endif
2572
2573 switch(DmxFlow)
2574 {
2575 case DMX_FLOW_PLAYBACK:
2576 TspIf = E_DRVTSP_IF_PLAYBACK;
2577 CtrlMode = E_DRVTSP_CTRL_MODE_TS0;
2578 break;
2579 case DMX_FLOW_PLAYBACK_NOCA:
2580 TspIf = E_DRVTSP_IF_PLAYBACK;
2581 CtrlMode = E_DRVTSP_CTRL_MODE_TS0_NOCA;
2582 break;
2583 case DMX_FLOW_PLAYBACK_SRC_TS1: //TS0 playback, and the source is from TS1
2584 TspIf = E_DRVTSP_IF_PVR0;
2585 CtrlMode = E_DRVTSP_CTRL_MODE_TS1_OUT_LIVE0;
2586 if(MDrv_TSP_SelPad(0, E_DRVTSP_IF_PLAYBACK, &IfSet) != DRVTSP_OK) //enable tsif0
2587 {
2588 return FALSE;
2589 }
2590 break;
2591 case DMX_FLOW_PVR:
2592 TspIf = E_DRVTSP_IF_PVR0;
2593 CtrlMode = E_DRVTSP_CTRL_MODE_TS1;
2594 break;
2595 case DMX_FLOW_PVRCA:
2596 TspIf = E_DRVTSP_IF_PVR0;
2597 CtrlMode = E_DRVTSP_CTRL_MODE_PVR_CA;
2598 _pdmx_res->_u32PVREngSrc[0] = (MS_U32)E_DRVTSP_PKTSRC_DEMUX0;
2599 if(MDrv_TSP_SelPad(0, TspIf, &IfSet) != DRVTSP_OK)
2600 {
2601 return FALSE;
2602 }
2603 break;
2604
2605 #ifdef TS2_IF_SUPPORT
2606 #ifdef TS2_LIVE_SUPPORT
2607 case DMX_FLOW_PLAYBACK1:
2608 #endif
2609 case DMX_FLOW_PVR1:
2610 TspIf = E_DRVTSP_IF_PVR1;
2611 CtrlMode = E_DRVTSP_CTRL_MODE_TS2;
2612 break;
2613 case DMX_FLOW_PVRCA1:
2614 //For Napoli U04, CA input from TSIIF1, and output to TSIF2
2615 //Must set TSIF1 mux as TSIF2, and Duplicate TS2 Filter to TS1 filter
2616 MDrv_TSP_CMD_Run(0x00000002, 0, 0, &u32data);
2617 if(u32data == 0)
2618 {
2619 return FALSE;
2620 }
2621 CtrlMode = E_DRVTSP_CTRL_MODE_PVR_TS2_CA;
2622 _pdmx_res->_u32PVREngSrc[0] = (MS_U32)E_DRVTSP_PKTSRC_DEMUX1;
2623 if(MDrv_TSP_SelPad(0, E_DRVTSP_IF_PVR0, &IfSet) != DRVTSP_OK)
2624 {
2625 return FALSE;
2626 }
2627 TspIf = E_DRVTSP_IF_PVR1;
2628 break;
2629 #endif
2630
2631 case DMX_FLOW_CIPHSS_PLAYBACK:
2632 TspIf = E_DRVTSP_IF_PVR0;
2633 CtrlMode = E_DRVTSP_CTRL_MODE_TS1_FILEFLT;
2634 break;
2635 case DMX_FLOW_CIPHSS_PVRCA:
2636 TspIf = E_DRVTSP_IF_PVR0;
2637 CtrlMode = E_DRVTSP_CTRL_MODE_PVR_TS0_CA;
2638 _pdmx_res->_u32PVREngSrc[0] = (MS_U32)E_DRVTSP_PKTSRC_DEMUX0;
2639 break;
2640
2641 default:
2642 return FALSE;
2643 }
2644
2645 if(MDrv_TSP_SetOperateMode(0, CtrlMode) != DRVTSP_OK)
2646 {
2647 return FALSE;
2648 }
2649 if((DmxFlow != DMX_FLOW_PVRCA) && (DmxFlow != DMX_FLOW_CIPHSS_PVRCA))
2650 {
2651 if(MDrv_TSP_SelPad(0, TspIf, &IfSet) != DRVTSP_OK)
2652 {
2653 return FALSE;
2654 }
2655 }
2656 return TRUE;
2657
2658 } // End of TSP_VER_1_0
2659
2660 #else // For TSP_VER_4_0
2661 //-------------------------------------------------------------------------
2662 // For TSP version 4.0:
2663 //--------------------------------------------------------------------------
_DMX_FlowSet(DMX_FLOW DmxFlow,DMX_FLOW_INPUT DmxFlowInput,MS_BOOL bClkInv,MS_BOOL bExtSync,MS_BOOL bParallel)2664 static MS_BOOL _DMX_FlowSet(DMX_FLOW DmxFlow, DMX_FLOW_INPUT DmxFlowInput, MS_BOOL bClkInv, MS_BOOL bExtSync, MS_BOOL bParallel)
2665 {
2666 #if 0 // we don't have this constrain in K3 every path is able to filein
2667 if ((DMX_FLOW_INPUT_MEM == DmxFlowInput) || (DMX_FLOW_INPUT_MEM_NOPASSCA == DmxFlowInput))
2668 {
2669 if(!((DMX_FLOW_PLAYBACK == DmxFlow) || (DMX_FLOW_FILEIN_MM == DmxFlow) || (DMX_FLOW_FILEIN_MM3D == DmxFlow)))
2670 {
2671 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] File in must work in playback flow\n", __LINE__));
2672 return FALSE;
2673 }
2674 MDrv_TSP_SetTSIF(0, E_TSP_TSIF_EN | E_TSP_TSIF_EXTSYNC | E_TSP_TSIF_PARL, TRUE);
2675 return TRUE;
2676 }
2677 #endif
2678
2679 TSP_TSIFCfg cfg = E_TSP_TSIF_EN;
2680 TSP_TSPad pad = E_TSP_TS_INVALID;
2681 TSP_TSId etid = E_TSP_TSID_INVALID;
2682 DRV_TSP_FLOW eDst = E_DRV_TSP_FLOW_INVALID;
2683 MS_BOOL filein = FALSE;
2684 MS_BOOL bClkDis = FALSE;
2685 TSP_TSIF eTSIF = E_TSP_TSIF_INVALID;
2686
2687 #if 1 // for TV SW, we add PVRCA support for TV needs.
2688 // all stb path can do a CA PVR record
2689 if (DMX_FLOW_PVRCA == DmxFlow)
2690 {
2691 //since PVRCA not support yet, all will go DMX_FLOW_PVR
2692 DmxFlow = DMX_FLOW_PVR;
2693 }
2694 if (DMX_FLOW_PVRCA1 == DmxFlow)
2695 {
2696 //since PVRCA1 not support yet, all will go DMX_FLOW_PVR1
2697 DmxFlow = DMX_FLOW_PVR1;
2698 }
2699 #endif
2700
2701 //### organize setting into cfg
2702 if (bExtSync)
2703 {
2704 cfg |= E_TSP_TSIF_EXTSYNC;
2705 }
2706 if (bParallel)
2707 {
2708 cfg |= E_TSP_TSIF_PARL;
2709 }
2710 if((DmxFlowInput >= DMX_FLOW_INPUT_EXT_INPUT0_3WIRE) && (DmxFlowInput <= DMX_FLOW_INPUT_EXT_INPUT6_3WIRE))
2711 {
2712 cfg |= E_TSP_TSIF_3WIRE;
2713 }
2714
2715 #ifdef TSO_20_ENABLE
2716
2717 if(DmxFlow == DMX_FLOW_TSO_PLAYBACK)
2718 {
2719 DMX_TSO_InputCfg stInputCfg;
2720 DMX_TSO_OutputCfg stOutputCfg;
2721
2722 memset(&stInputCfg, 0, sizeof(DMX_TSO_InputCfg));
2723 memset(&stOutputCfg, 0, sizeof(DMX_TSO_OutputCfg));
2724 stOutputCfg.bDefOutClk = FALSE;
2725 stOutputCfg.bOutClkInv = TRUE;
2726 switch (DmxFlowInput)
2727 {
2728 case DMX_FLOW_INPUT_DEMOD:
2729 stOutputCfg.eTsoOutClk = E_DRVTSO_OUTCLK_Dmd;
2730 break;
2731 case DMX_FLOW_INPUT_EXT_INPUT0:
2732 stOutputCfg.eTsoOutClk = E_DRVTSO_OUTCLK_PTSOOUT;
2733 stOutputCfg.eTsoOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS0IN;
2734 break;
2735 case DMX_FLOW_INPUT_EXT_INPUT1:
2736 stOutputCfg.eTsoOutClk = E_DRVTSO_OUTCLK_PTSOOUT;
2737 stOutputCfg.eTsoOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS1IN;
2738 break;
2739 case DMX_FLOW_INPUT_EXT_INPUT2:
2740 stOutputCfg.eTsoOutClk = E_DRVTSO_OUTCLK_PTSOOUT;
2741 stOutputCfg.eTsoOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS2IN;
2742 break;
2743 case DMX_FLOW_INPUT_EXT_INPUT3:
2744 stOutputCfg.eTsoOutClk = E_DRVTSO_OUTCLK_PTSOOUT;
2745 stOutputCfg.eTsoOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS3IN;
2746 break;
2747 case DMX_FLOW_INPUT_EXT_INPUT4:
2748 stOutputCfg.eTsoOutClk = E_DRVTSO_OUTCLK_PTSOOUT;
2749 stOutputCfg.eTsoOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS4IN;
2750 break;
2751 case DMX_FLOW_INPUT_EXT_INPUT5:
2752 stOutputCfg.eTsoOutClk = E_DRVTSO_OUTCLK_PTSOOUT;
2753 stOutputCfg.eTsoOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS5IN;
2754 break;
2755 case DMX_FLOW_INPUT_EXT_INPUT0_3WIRE:
2756 case DMX_FLOW_INPUT_EXT_INPUT1_3WIRE:
2757 case DMX_FLOW_INPUT_EXT_INPUT2_3WIRE:
2758 case DMX_FLOW_INPUT_EXT_INPUT3_3WIRE:
2759 case DMX_FLOW_INPUT_EXT_INPUT4_3WIRE:
2760 case DMX_FLOW_INPUT_EXT_INPUT5_3WIRE:
2761 case DMX_FLOW_INPUT_EXT_INPUT6_3WIRE:
2762 stOutputCfg.eTsoOutClk = E_DRVTSO_OUTCLK_27M;
2763 break;
2764 case DMX_FLOW_INPUT_MEM:
2765 case DMX_FLOW_INPUT_MEM1:
2766 default:
2767 stOutputCfg.bDefOutClk = TRUE;
2768 break;
2769 }
2770
2771 stOutputCfg.eFlow = DmxFlow;
2772 stOutputCfg.eOutPad = DMX_FLOW_OUTPUT_EXT_PAD1;
2773 stOutputCfg.u16OutPktSize = 0xBC;
2774 stOutputCfg.bEnable = TRUE;
2775 stOutputCfg.bSet = TRUE;
2776 if(_TSO_Flow_OutputCfg(&stOutputCfg) == FALSE)
2777 return FALSE;
2778
2779 stInputCfg.eFlow = DmxFlow;
2780 stInputCfg.stInputInfo.Input = DmxFlowInput;
2781 stInputCfg.stInputInfo.bClkInv = bClkInv;
2782 stInputCfg.stInputInfo.bExtSync = bExtSync;
2783 stInputCfg.stInputInfo.bParallel = bParallel;
2784 stInputCfg.u8LocalStrId = 0x47;
2785 stInputCfg.bBypassAll = TRUE;
2786 stInputCfg.bEnable = TRUE;
2787 stInputCfg.bSet = TRUE;
2788 if(DMX_FLOW_TSO_PLAYBACK== DmxFlow)
2789 {
2790 if(DmxFlowInput == DMX_FLOW_INPUT_MEM)
2791 {
2792 stInputCfg.eTSOInIf = DMX_TSIF_FILE0;
2793 }
2794 else if(DmxFlowInput == DMX_FLOW_INPUT_MEM1)
2795 {
2796 stInputCfg.eTSOInIf = DMX_TSIF_FILE1;
2797 }
2798 else
2799 {
2800 stInputCfg.eTSOInIf = DMX_TSIF_LIVE0;
2801 }
2802 }
2803
2804 return _TSO_Flow_InputCfg(&stInputCfg);
2805 }
2806
2807 #elif defined(TSO_ENABLE)
2808
2809 if ((DmxFlow == DMX_FLOW_TSO_PLAYBACK) || (DmxFlow == DMX_FLOW_TSO_PLAYBACK1))
2810 return _DMX_FlowSetTSO(DmxFlow, DmxFlowInput, bClkInv, bExtSync, bParallel);
2811
2812 #endif
2813
2814 #ifdef TSIO_ENABLE
2815 if (DmxFlow == DMX_FLOW_TSIO_PLAYBACK)
2816 {
2817 DMX_TSO_InputCfg stInputCfg;
2818 MS_U16 u16Size = 200;
2819
2820 memset(&stInputCfg, 0, sizeof(DMX_TSO_InputCfg));
2821 stInputCfg.eFlow = DMX_FLOW_TSO_PLAYBACK;
2822 stInputCfg.stInputInfo.Input = DmxFlowInput;
2823 stInputCfg.stInputInfo.bClkInv = bClkInv;
2824 stInputCfg.stInputInfo.bExtSync = bExtSync;
2825 stInputCfg.stInputInfo.bParallel = bParallel;
2826 stInputCfg.u8LocalStrId = 0x47;
2827 stInputCfg.bBypassAll = FALSE;
2828 stInputCfg.bEnable = TRUE;
2829 stInputCfg.bSet = TRUE;
2830 if(DmxFlowInput == DMX_FLOW_INPUT_MEM)
2831 {
2832 stInputCfg.eTSOInIf = DMX_TSIF_FILE0;
2833 }
2834 else if(DmxFlowInput == DMX_FLOW_INPUT_MEM1)
2835 {
2836 stInputCfg.eTSOInIf = DMX_TSIF_FILE1;
2837 }
2838 else
2839 {
2840 stInputCfg.eTSOInIf = DMX_TSIF_LIVE0;
2841 }
2842
2843 MDrv_TSO_TsioMode_En(0, TRUE); //TSIO enable
2844 MDrv_TSO_OutputPktSize(0, &u16Size, true); //TSO output size
2845 return _TSO_Flow_InputCfg(&stInputCfg);
2846 }
2847 #endif // End of TSIO_ENABLE
2848
2849 switch (DmxFlowInput)
2850 {
2851 case DMX_FLOW_INPUT_DEMOD:
2852 pad = E_TSP_TS_DEMOD0;
2853 break;
2854 case DMX_FLOW_INPUT_DEMOD1:
2855 pad = E_TSP_TS_DEMOD1;
2856 break;
2857 case DMX_FLOW_INPUT_EXT_INPUT0:
2858 pad = E_TSP_TS_PAD0;
2859 break;
2860 case DMX_FLOW_INPUT_EXT_INPUT0_3WIRE:
2861 pad = E_TSP_TS_PAD0_3WIRE;
2862 break;
2863 case DMX_FLOW_INPUT_EXT_INPUT1:
2864 pad = E_TSP_TS_PAD1;
2865 break;
2866 case DMX_FLOW_INPUT_EXT_INPUT1_3WIRE:
2867 pad = E_TSP_TS_PAD1_3WIRE;
2868 break;
2869 case DMX_FLOW_INPUT_EXT_INPUT2:
2870 pad = E_TSP_TS_PAD2;
2871 break;
2872 case DMX_FLOW_INPUT_EXT_INPUT2_3WIRE:
2873 pad = E_TSP_TS_PAD2_3WIRE;
2874 break;
2875 case DMX_FLOW_INPUT_EXT_INPUT3:
2876 pad = E_TSP_TS_PAD3;
2877 break;
2878 case DMX_FLOW_INPUT_EXT_INPUT3_3WIRE:
2879 pad = E_TSP_TS_PAD3_3WIRE;
2880 break;
2881 case DMX_FLOW_INPUT_EXT_INPUT4:
2882 pad = E_TSP_TS_PAD4;
2883 break;
2884 case DMX_FLOW_INPUT_EXT_INPUT4_3WIRE:
2885 pad = E_TSP_TS_PAD4_3WIRE;
2886 break;
2887 case DMX_FLOW_INPUT_EXT_INPUT5:
2888 pad = E_TSP_TS_PAD5;
2889 break;
2890 case DMX_FLOW_INPUT_EXT_INPUT5_3WIRE:
2891 pad = E_TSP_TS_PAD5_3WIRE;
2892 break;
2893 case DMX_FLOW_INPUT_EXT_INPUT6:
2894 pad = E_TSP_TS_PAD6;
2895 break;
2896 case DMX_FLOW_INPUT_EXT_INPUT6_3WIRE:
2897 pad = E_TSP_TS_PAD6_3WIRE;
2898 break;
2899 case DMX_FLOW_INPUT_EXT_INPUT7:
2900 pad = E_TSP_TS_PAD7;
2901 break;
2902 case DMX_FLOW_INPUT_EXT_INPUT7_3WIRE:
2903 pad = E_TSP_TS_PAD7_3WIRE;
2904 break;
2905 case DMX_FLOW_INPUT_TSO:
2906 pad = E_TSP_TS_PAD_TSO0;
2907 break;
2908 case DMX_FLOW_INPUT_TSO1:
2909 pad = E_TSP_TS_PAD_TSO1;
2910 break;
2911 case DMX_FLOW_INPUT_MEM:
2912 pad = E_TSP_TS_PAD0;
2913 filein = TRUE;
2914 break;
2915 case DMX_FLOW_INPUT_DISABLE:
2916 pad = E_TSP_TS_PAD0;
2917 bClkDis = TRUE;
2918 break;
2919 #ifdef TSIO_ENABLE
2920 case DMX_FLOW_INPUT_TSIO:
2921 pad = E_TSP_TS_PAD_TSIO0;
2922 break;
2923 #endif
2924
2925 default:
2926 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Unsupported DMX_FLOW_INPUT type error!\n", __LINE__));
2927 return FALSE;
2928 }
2929
2930 switch (DmxFlow)
2931 {
2932 //support file-in and live-in simultaneously
2933 case DMX_FLOW_PLAYBACK:
2934 eDst = E_DRV_TSP_FLOW_PLAYBACK0;
2935 eTSIF = E_TSP_TSIF_0;//default mapping of DMX_FLOW_PLAYBACK to TSIF0
2936 etid = E_TSP_TSID_TSIF0;
2937 break;
2938 //support file-in and live-in simultaneously
2939 case DMX_FLOW_PLAYBACK1:
2940 eDst = E_DRV_TSP_FLOW_PLAYBACK1;
2941 eTSIF = E_TSP_TSIF_1;
2942 etid = E_TSP_TSID_TSIF1;
2943 break;
2944 //support file-in or live-in
2945 case DMX_FLOW_PLAYBACK2:
2946 eDst = E_DRV_TSP_FLOW_PLAYBACK2;
2947 eTSIF = E_TSP_TSIF_2;
2948 etid= E_TSP_TSID_TSIF2;
2949 break;
2950 //support file-in or live-in
2951 case DMX_FLOW_PLAYBACK3:
2952 eDst = E_DRV_TSP_FLOW_PLAYBACK3;
2953 eTSIF = E_TSP_TSIF_3;
2954 etid = E_TSP_TSID_TSIF3;
2955 break;
2956 //support file-in or live-in
2957 case DMX_FLOW_PLAYBACK4:
2958 eDst = E_DRV_TSP_FLOW_PLAYBACK4;
2959 eTSIF = E_TSP_TSIF_4;
2960 etid = E_TSP_TSID_INVALID; // no use @ MDrv_TSP_SetFlowSource
2961 break;
2962 //support file-in or live-in
2963 case DMX_FLOW_PLAYBACK5:
2964 eDst = E_DRV_TSP_FLOW_PLAYBACK5;
2965 eTSIF = E_TSP_TSIF_5;
2966 etid = E_TSP_TSID_INVALID; // no use @ MDrv_TSP_SetFlowSource
2967 break;
2968 //support file-in or live-in
2969 case DMX_FLOW_PLAYBACK6:
2970 eDst = E_DRV_TSP_FLOW_PLAYBACK6;
2971 eTSIF = E_TSP_TSIF_6;
2972 etid = E_TSP_TSID_INVALID; // no use @ MDrv_TSP_SetFlowSource
2973 break;
2974 case DMX_FLOW_PVR:
2975 eDst = E_DRV_TSP_FLOW_PVR0;
2976 eTSIF = E_TSP_TSIF_PVR0;
2977 etid = E_TSP_TSID_TSIF0;
2978 break;
2979 case DMX_FLOW_PVR1:
2980 eDst = E_DRV_TSP_FLOW_PVR1;
2981 eTSIF = E_TSP_TSIF_PVR1;
2982 etid = E_TSP_TSID_TSIF1;
2983 break;
2984 case DMX_FLOW_PVR2:
2985 eDst = E_DRV_TSP_FLOW_PVR2;
2986 eTSIF = E_TSP_TSIF_PVR2;
2987 etid = E_TSP_TSID_TSIF2;
2988 break;
2989 case DMX_FLOW_PVR3:
2990 eDst = E_DRV_TSP_FLOW_PVR3;
2991 eTSIF = E_TSP_TSIF_PVR3;
2992 etid = E_TSP_TSID_TSIF3;
2993 break;
2994
2995 default:
2996 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Unsupported DMX_FLOW_INPUT type error!\n", __LINE__));
2997 return FALSE;
2998 }
2999
3000 #if 0
3001 if (E_TSP_TSID_INVALID != tid)//kaiser like series // link dst to tsifX
3002 {
3003 // if ((tid != E_TSP_TSID_MMFI0) || (tid != E_TSP_TSID_MMFI1)) //
3004 // {
3005 if (u16TSIF != E_TSP_TSIF_INVALID)
3006 {
3007 MDrv_TSP_SelPad_ClkInv(u16TSIF, bClkInv);
3008 MDrv_TSP_SetTSIF(u16TSIF, cfg, filein); // we set TSIF at this function (external sync and parallel)
3009 }
3010 // }
3011 }
3012 else if ((E_TSP_TS_INVALID != pad)) // old style we set specific path to dst
3013 #endif
3014 //File-in case
3015 //No need setting pad in file-in mod
3016
3017 if (DRVTSP_OK != MDrv_TSP_SetFlowSource(eDst, etid)) //setting dst source from tid
3018 {
3019 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Set flow source error!\n", __LINE__));
3020 }
3021
3022
3023 if(filein == TRUE)
3024 {
3025 MDrv_TSP_SetTSIF(eTSIF, E_TSP_TSIF_EN | E_TSP_TSIF_EXTSYNC | E_TSP_TSIF_PARL ,filein);
3026 }
3027 //Live-in and PVR case
3028 else
3029 {
3030 if ((E_TSP_TS_INVALID != pad)) // old style we set specific path to dst
3031 {
3032 MDrv_TSP_SelPad(eTSIF, pad); // only old style has pad setting
3033 }
3034
3035 MDrv_TSP_SelPad_ClkDis(eTSIF, bClkDis); //@FIXME check return value for each drv function
3036 MDrv_TSP_SelPad_ClkInv(eTSIF, bClkInv);
3037 MDrv_TSP_SetTSIF(eTSIF, cfg, filein); // we set TSIF at this function (external sync and parallel)
3038 }
3039
3040 #if 0 // @FIXME what is this? for TV SW?
3041 if (DMX_FLOW_PVRCA == DmxFlow)
3042 {
3043 //since PVRCA not support yet, all will go DMX_FLOW_PVR
3044 DmxFlow = DMX_FLOW_PVR;
3045 }
3046 #endif
3047
3048 return TRUE;
3049 }
3050 #endif // End of TSP_VER_4_0
3051
_DMX_RingBuffer_DataSize(MS_VIRT virtRead,MS_VIRT virtWrite,MS_VIRT virtBufStart,MS_VIRT virtBufEnd)3052 static inline MS_U32 _DMX_RingBuffer_DataSize(MS_VIRT virtRead, MS_VIRT virtWrite, MS_VIRT virtBufStart, MS_VIRT virtBufEnd)
3053 {
3054 return (MS_U32)((virtWrite >= virtRead) ? (virtWrite- virtRead): ((virtBufEnd- virtBufStart)- (virtRead- virtWrite)));
3055 }
3056
_DMX_RingBuffer_ChkPESLen(MS_U8 * pu8Read,MS_U8 * pu8Start,MS_U8 * pu8End,MS_U32 * pSecLen)3057 static MS_BOOL _DMX_RingBuffer_ChkPESLen(MS_U8* pu8Read, MS_U8* pu8Start, MS_U8* pu8End, MS_U32 *pSecLen)
3058 {
3059 *pSecLen = 0;
3060
3061 //check PES start code first
3062 if ((pu8Read + 3) <= pu8End)
3063 {
3064 if((*pu8Read != 0) || (*(pu8Read+1) != 0) || (*(pu8Read+2) != 0x01))
3065 return FALSE;
3066 }
3067 else if ((pu8Read + 2) <= pu8End)
3068 {
3069 if((*pu8Read != 0) || (*(pu8Read+1) != 0) || (*pu8Start != 0x01))
3070 return FALSE;
3071 }
3072 else if ((pu8Read + 1) <= pu8End)
3073 {
3074 if((*pu8Read != 0) || (*pu8Start != 0) || (*(pu8Start+1) != 0x01))
3075 return FALSE;
3076 }
3077 else
3078 {
3079 if((*pu8Start != 0) || (*(pu8Start+1) != 0) || (*(pu8Start+2) != 0x01))
3080 return FALSE;
3081 }
3082
3083 //calculate PES length
3084 if ((pu8Read + 6) <= pu8End)
3085 {
3086 *pSecLen = ((*(pu8Read+ 4) & 0xFF) << 8) + *(pu8Read+ 5);
3087 }
3088 else if ((pu8Read + 5) <= pu8End)
3089 {
3090 *pSecLen = ((*(pu8Read+ 4) & 0xFF) << 8) + *(pu8Start);
3091 }
3092 else if ((pu8Read + 4) <= pu8End)
3093 {
3094 *pSecLen = ((*(pu8Start) & 0xFF) << 8) + *(pu8Start+ 1);
3095 }
3096 else if((pu8Read + 3) <= pu8End)
3097 {
3098 *pSecLen = ((*(pu8Start + 1) & 0xFF) << 8) + *(pu8Start+ 2);
3099 }
3100 else if((pu8Read + 2) <= pu8End)
3101 {
3102 *pSecLen = ((*(pu8Start + 2) & 0xFF) << 8) + *(pu8Start+ 3);
3103 }
3104 else if((pu8Read + 1) <= pu8End)
3105 {
3106 *pSecLen = ((*(pu8Start + 3) & 0xFF) << 8) + *(pu8Start+ 4);
3107 }
3108 else
3109 {
3110 *pSecLen = ((*(pu8Start+ 4) & 0xFF) << 8) + *(pu8Start+ 5);
3111 }
3112
3113 if (*pSecLen == 0x00)
3114 {
3115 *pSecLen = 0xffff;
3116 //ULOGW("DMX", "[DMX][%d] Warning: PES length is 0xFFFF\n", __LINE__);
3117 }
3118 else
3119 {
3120 *pSecLen += 6;
3121 }
3122
3123 return TRUE;
3124 }
3125
_DMX_GetRingBuffer(MS_U32 u32DmxId,MS_U8 * pu8Buf,MS_U32 u32BufSize,MS_U32 * pu32SecSize,MS_U32 * pu32RmnSize,DMX_CheckCb pfCheckCB)3126 static DMX_FILTER_STATUS _DMX_GetRingBuffer(MS_U32 u32DmxId, MS_U8* pu8Buf, MS_U32 u32BufSize, MS_U32* pu32SecSize, MS_U32* pu32RmnSize, DMX_CheckCb pfCheckCB)
3127 {
3128 MS_U32 u32RbSize = 0;
3129 MS_U32 u32SecBufSize= 0, u32SecLen= 0;
3130 MS_U8* pu8Start;
3131 MS_U8* pu8End = 0;
3132 MS_U8* pu8Read;
3133 MS_U8* pu8Write;
3134 MS_U32 u32CopySize= 0;
3135 MS_BOOL bCopy;
3136 MS_PHY temp = 0;
3137 MS_VIRT virtStart = 0;
3138 MS_VIRT virtEnd = 0;
3139 MS_VIRT virtRead = 0;
3140 MS_VIRT virtWrite = 0;
3141
3142 //DMX_ASSERT(DMX_MAX_FLTID> u8DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, u8DmxId)));
3143
3144 #ifndef MSOS_TYPE_LINUX_KERNEL
3145 MsOS_Sync();
3146 #endif
3147 MsOS_ReadMemory();
3148
3149 // Get Section buffer read pointer
3150 if (DRVTSP_OK != MDrv_TSP_SecFlt_GetReadAddr(0, _pdmx_res->_FltList[u32DmxId].SecBufId, &temp))
3151 {
3152 return DMX_FILTER_STATUS_ERROR;
3153 }
3154 virtRead = (MS_VIRT)temp;
3155 // Get Section buffer write pointer
3156 if (DRVTSP_OK != MDrv_TSP_SecFlt_GetWriteAddr(0, _pdmx_res->_FltList[u32DmxId].SecBufId, &temp))
3157 {
3158 return DMX_FILTER_STATUS_ERROR;
3159 }
3160 virtWrite = (MS_VIRT)temp;
3161
3162 *pu32SecSize= 0;
3163 if (virtRead== virtWrite)
3164 {
3165 return DMX_FILTER_STATUS_ERROR;
3166 }
3167
3168 // Get Section buffer start address
3169 if (DRVTSP_OK != MDrv_TSP_SecFlt_GetBufStart(0, _pdmx_res->_FltList[u32DmxId].SecBufId, &temp))
3170 {
3171 return DMX_FILTER_STATUS_ERROR;
3172 }
3173 virtStart = (MS_VIRT)temp;
3174 if (DRVTSP_OK != MDrv_TSP_SecFlt_GetBufSize(0, _pdmx_res->_FltList[u32DmxId].SecBufId, &u32SecBufSize))
3175 {
3176 return DMX_FILTER_STATUS_ERROR;
3177 }
3178
3179 // Get Section buffer end address
3180 virtEnd = virtStart + u32SecBufSize;
3181 if(virtRead >= virtEnd || virtRead < virtStart)
3182 {
3183 ULOGE("DMX", "[DMX][%d][%d] FATAL ERROR: PES buffer read address out of range!!!!!!!!\n", __LINE__, (unsigned int)MsOS_GetSystemTime());
3184 ULOGE("DMX", "[DMX][%d] Start %x, End %x , Read %x, Write %x \n", __LINE__, (unsigned int)virtStart, (unsigned int)virtEnd, (unsigned int)virtRead, (unsigned int)virtWrite);
3185 return DMX_FILTER_STATUS_ERROR;
3186 }
3187
3188 if(virtWrite >= virtEnd || virtWrite < virtStart)
3189 {
3190 ULOGE("DMX", "[DMX][%d][%d] FATAL ERROR: PES buffer write address out of range!!!!!!!!\n", __LINE__, (unsigned int)MsOS_GetSystemTime());
3191 ULOGE("DMX", "[DMX][%d] Start %x, End %x , Read %x, Write %x \n", __LINE__, (unsigned int)virtStart, (unsigned int)virtEnd, (unsigned int)virtRead, (unsigned int)virtWrite);
3192 return DMX_FILTER_STATUS_ERROR;
3193 }
3194 if ((virtRead==0)||(virtWrite==0)||(virtStart==0))
3195 {
3196 ULOGE("DMX", "[DMX][%d][%d] FATAL ERROR: PES buffer address illegal!!!!!!!!\n", __LINE__, (unsigned int)MsOS_GetSystemTime());
3197 ULOGE("DMX", "[DMX][%d] Start %x, End %x , Read %x, Write %x \n", __LINE__, (unsigned int)virtStart, (unsigned int)virtEnd, (unsigned int)virtRead, (unsigned int)virtWrite);
3198 return DMX_FILTER_STATUS_ERROR;
3199 }
3200
3201 *pu32RmnSize = u32RbSize= _DMX_RingBuffer_DataSize(virtRead, virtWrite, virtStart, virtEnd);
3202 if (u32RbSize> u32BufSize)
3203 {
3204 u32RbSize = u32BufSize;
3205 }
3206
3207 //MS_ASSERT(pu8Start == (MS_U8*)_pdmx_res->_FltList[(u8DmxId)].FltInfo.Info.SectInfo.SectBufAddr);
3208
3209 // transfer physical address to uncache address
3210 pu8Read= (MS_U8*)MS_PA2KSEG1((MS_PHY)virtRead);
3211 pu8Write= (MS_U8*)MS_PA2KSEG1((MS_PHY)virtWrite);
3212 pu8Start= (MS_U8*)MS_PA2KSEG1((MS_PHY)virtStart);
3213 //pu8End= (MS_U8*)MS_PA2KSEG1((MS_U32)pu8End);
3214 pu8End= pu8Start + u32SecBufSize;
3215
3216 /*ULOGD("DMX", "(Start, End, Read, Write) = (0x%08x, 0x%08x, 0x%08x, 0x%08x)\n",
3217 (int)pu8Start,
3218 (int)pu8End,
3219 (int)pu8Read,
3220 (int)pu8Write);*/
3221
3222 #ifndef MSOS_TYPE_LINUX_KERNEL
3223 bCopy = (pfCheckCB)? pfCheckCB((MS_U8)u32DmxId, pu8Start, pu8End, pu8Read, pu8Write): TRUE;
3224 #else
3225 bCopy = TRUE; //can not callback user function in kernel mode
3226 #endif
3227
3228 //---------------------------------------------
3229 // For Customer's request, only copy 1 PES at once
3230 //---------------------------------------------
3231 if((_pdmx_res->_FltList[u32DmxId].DmxFltType == DMX_FILTER_TYPE_PES) && (_u32PESCpy_ContMode == 0))
3232 {
3233 if(_DMX_RingBuffer_ChkPESLen(pu8Read, pu8Start, pu8End, &u32SecLen) == TRUE)
3234 {
3235 if(u32RbSize >= u32SecLen)
3236 {
3237 u32RbSize = u32SecLen;
3238 }
3239 }
3240 }
3241 //--------------------------------------------- end
3242
3243 if ((pu8Read+ u32RbSize)>= pu8End)
3244 {
3245 u32CopySize= pu8End- pu8Read;
3246 if (bCopy)
3247 {
3248 CMP_CPY_TO_USER(pu8Buf, (void*)pu8Read, u32CopySize);
3249 }
3250 pu8Read= pu8Start;
3251 u32RbSize-= u32CopySize;
3252 *pu32SecSize+= u32CopySize;
3253 pu8Buf+= u32CopySize;
3254 }
3255 if (u32RbSize)
3256 {
3257 if (bCopy)
3258 {
3259 CMP_CPY_TO_USER(pu8Buf, (void*)pu8Read, u32RbSize);
3260 }
3261 *pu32SecSize+= u32RbSize;
3262 pu8Read+= u32RbSize;
3263 }
3264 *pu32RmnSize-= *pu32SecSize;
3265 MS_ASSERT(pu8Read< pu8End);
3266 MDrv_TSP_SecFlt_SetReadAddr(0, _pdmx_res->_FltList[u32DmxId].SecBufId, MS_VA2PA((MS_VIRT)pu8Read));
3267 return DMX_FILTER_STATUS_OK;
3268 }
3269
_DumpSecHeader(MS_U8 * pu8Start,MS_U8 * pu8End,MS_U8 * pu8Read,MS_U8 * pu8Write)3270 static void _DumpSecHeader(MS_U8* pu8Start, MS_U8* pu8End, MS_U8* pu8Read, MS_U8* pu8Write)
3271 {
3272 #if defined (MS_DEBUG)
3273 MS_U32 u32SecLen = 0;
3274 MS_DEBUG_MSG(DMX_DBGMSG(DMX_DBG_ERR, ULOGD("DMX", "(Start, End, Read, Write) = (0x%08x, 0x%08x, 0x%08x, 0x%08x)\n",
3275 (MS_U32)pu8Start,
3276 (MS_U32)pu8End,
3277 (MS_U32)pu8Read,
3278 (MS_U32)pu8Write)));
3279 if ((pu8Read + 3) <= pu8End)
3280 {
3281 u32SecLen = ((*(pu8Read+ 1) & 0x0F) << 8) + *(pu8Read+ 2);
3282 MS_DEBUG_MSG(DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[%d] %d: %02x %02x %02x\n", __LINE__, u32SecLen, (MS_U32)pu8Read[0], (MS_U32)pu8Read[1], (MS_U32)pu8Read[2])));
3283 }
3284 else if ((pu8Read + 2) <= pu8End)
3285 {
3286 u32SecLen = ((*(pu8Read+ 1) & 0x0F) << 8) + *(pu8Start);
3287 MS_DEBUG_MSG(DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[%d] %d: %02x %02x %02x\n", __LINE__, u32SecLen, (MS_U32)pu8Read[0], (MS_U32)pu8Read[1], (MS_U32)pu8Start[0])));
3288 }
3289 else // ((uReadAddr+1) == uEndAddr)
3290 {
3291 u32SecLen = ((*(pu8Start) & 0x0F) << 8) + *(pu8Start+ 1);
3292 MS_DEBUG_MSG(DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[%d] %d: %02x %02x %02x\n", __LINE__, (MS_U32)u32SecLen, (MS_U32)pu8Read[0], (MS_U32)pu8Start[0], (MS_U32)pu8Start[1])));
3293 }
3294
3295 #if 0 //left for debug
3296 for (u32i = 0 ; u32i < u32SecLen+3 ; u32i++)
3297 {
3298 if (u32i%16 == 0)
3299 ULOGD("DMX", "\n");
3300 ULOGD("DMX", "%02x ",(MS_U32)pu8Read[u32i]);
3301 }
3302 ULOGD("DMX", "\n");
3303 #endif
3304 #endif
3305 }
3306
_DMX_GetSect(MS_U32 u32DmxId,MS_U8 * pu8Buf,MS_U32 u32BufSize,MS_U32 * pu32SecSize,MS_U32 * pu32RmnSize,DMX_CheckCb pfCheckCB)3307 static DMX_FILTER_STATUS _DMX_GetSect(MS_U32 u32DmxId, MS_U8* pu8Buf, MS_U32 u32BufSize, MS_U32* pu32SecSize, MS_U32* pu32RmnSize, DMX_CheckCb pfCheckCB)
3308 {
3309 MS_U32 u32RbSize;
3310 MS_U32 u32SecBufSize= 0;
3311 MS_U8* pu8Start;
3312 MS_U8* pu8End = 0;
3313 MS_U8* pu8Read;
3314 MS_U8* pu8Write;
3315 MS_U32 u32CopySize= 0;
3316 MS_U32 u32SecLen= 0;
3317 MS_BOOL bCopy;
3318 MS_PHY temp = 0;
3319 MS_VIRT virtStart = 0;
3320 MS_VIRT virtEnd = 0;
3321 MS_VIRT virtRead = 0;
3322 MS_VIRT virtWrite = 0;
3323
3324 //DMX_ASSERT(DMX_MAX_FLTID> u8DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, u8DmxId)));
3325
3326 #ifndef MSOS_TYPE_LINUX_KERNEL
3327 MsOS_Sync();
3328 #endif
3329
3330 MsOS_ReadMemory();
3331
3332 // Get Section buffer read pointer
3333 if (DRVTSP_OK != MDrv_TSP_SecFlt_GetReadAddr(0, _pdmx_res->_FltList[u32DmxId].SecBufId, &temp))
3334 {
3335 return DMX_FILTER_STATUS_ERROR;
3336 }
3337 virtRead = (MS_VIRT)temp;
3338 // Get Section buffer write pointer
3339 if (DRVTSP_OK != MDrv_TSP_SecFlt_GetWriteAddr(0, _pdmx_res->_FltList[u32DmxId].SecBufId, &temp))
3340 {
3341 return DMX_FILTER_STATUS_ERROR;
3342 }
3343 virtWrite = (MS_VIRT)temp;
3344
3345 *pu32SecSize = 0;
3346 *pu32RmnSize = 0;
3347 if (virtRead == virtWrite)
3348 {
3349 return DMX_FILTER_STATUS_ERROR; //fail
3350 }
3351
3352 // Get Section buffer start address
3353 if (DRVTSP_OK != MDrv_TSP_SecFlt_GetBufStart(0, _pdmx_res->_FltList[u32DmxId].SecBufId, &temp))
3354 {
3355 return DMX_FILTER_STATUS_ERROR;
3356 }
3357 virtStart = (MS_VIRT)temp;
3358 if (DRVTSP_OK != MDrv_TSP_SecFlt_GetBufSize(0, _pdmx_res->_FltList[u32DmxId].SecBufId, &u32SecBufSize))
3359 {
3360 return DMX_FILTER_STATUS_ERROR;
3361 }
3362 //ULOGD("DMX", "[%s][%d][%d] bufsize %x\n", __FUNCTION__, __LINE__, (int)u8DmxId, (unsigned int)u32SecBufSize);
3363 //ASSERT(u32SecBufSize == _pdmx_res->_FltList[(u8DmxId)].FltInfo.Info.SectInfo.SectBufSize);
3364 // Get Section buffer end address
3365 virtEnd = virtStart+ u32SecBufSize;
3366
3367 if(virtRead >= virtEnd || virtRead < virtStart)
3368 {
3369 ULOGE("DMX", "[DMX][%d][%d] FATAL ERROR: Section buffer read address out of range!!!!!!!!\n", __LINE__, (unsigned int)MsOS_GetSystemTime());
3370 ULOGE("DMX", "[DMX][%d] Filter %d, Start %x, End %x , Read %x, Write %x \n", __LINE__, (int)u32DmxId, (unsigned int)virtStart, (unsigned int)virtEnd, (unsigned int)virtRead, (unsigned int)virtWrite);
3371 return DMX_FILTER_STATUS_ERROR;
3372 }
3373
3374 if(virtWrite >= virtEnd || virtWrite < virtStart)
3375 {
3376 ULOGE("DMX", "[DMX][%d][%d] FATAL ERROR: Section buffer write address out of range!!!!!!!!\n", __LINE__, (unsigned int)MsOS_GetSystemTime());
3377 ULOGE("DMX", "[DMX][%d] Filter %d, Start %x, End %x , Read %x, Write %x \n", __LINE__, (int)u32DmxId, (unsigned int)virtStart, (unsigned int)virtEnd, (unsigned int)virtRead, (unsigned int)virtWrite);
3378 return DMX_FILTER_STATUS_ERROR;
3379 }
3380
3381 *pu32RmnSize = u32RbSize = _DMX_RingBuffer_DataSize(virtRead, virtWrite, virtStart, virtEnd);
3382 if (3 > u32RbSize)
3383 {
3384 return DMX_FILTER_STATUS_ERROR;
3385 }
3386
3387 MS_ASSERT(virtStart == (MS_VIRT)((MS_VIRT)_pdmx_res->_FltList[(u32DmxId)].FltInfo.Info.SectInfo.SectBufAddr));
3388 if ((virtRead==0)||(virtWrite==0)||(virtStart==0))
3389 {
3390 ULOGE("DMX", "[DMX][%d][%d] FATAL ERROR: Section buffer address illegal!!!!!!!!\n", __LINE__, (unsigned int)MsOS_GetSystemTime());
3391 ULOGE("DMX", "[DMX][%d] Filter %d, Start %x, End %x , Read %x, Write %x \n", __LINE__, (int)u32DmxId, (unsigned int)virtStart, (unsigned int)virtEnd, (unsigned int)virtRead, (unsigned int)virtWrite);
3392 return DMX_FILTER_STATUS_ERROR;
3393 }
3394
3395 // transfer physical address to uncache address
3396 pu8Read = (MS_U8*)MS_PA2KSEG1((MS_PHY)virtRead);
3397 pu8Write = (MS_U8*)MS_PA2KSEG1((MS_PHY)virtWrite);
3398 pu8Start = (MS_U8*)MS_PA2KSEG1((MS_PHY)virtStart);
3399 //pu8End = (MS_U8*)MS_PA2KSEG1((MS_PHY)virtEnd);
3400 pu8End = pu8Start + u32SecBufSize;
3401
3402 /* ULOGD("DMX", "(Start, End, Read, Write) = (0x%08x, 0x%08x, 0x%08x, 0x%08x)\n",
3403 (int)pu8Start,
3404 (int)pu8End,
3405 (int)pu8Read,
3406 (int)pu8Write);*/
3407
3408 #ifndef MSOS_TYPE_LINUX_KERNEL
3409 bCopy = (pfCheckCB) ? pfCheckCB((MS_U8)u32DmxId, pu8Start, pu8End, pu8Read, pu8Write) : TRUE;
3410 #else
3411 bCopy = TRUE; //can not callback user function pointer in kernel driver
3412 #endif
3413
3414 // Check not enought section data
3415 if ((pu8Read + 3) <= pu8End)
3416 {
3417 u32SecLen = ((*(pu8Read+ 1) & 0x0F) << 8) + *(pu8Read+ 2);
3418 }
3419 else if ((pu8Read + 2) <= pu8End)
3420 {
3421 u32SecLen = ((*(pu8Read+ 1) & 0x0F) << 8) + *(pu8Start);
3422 }
3423 else // ((uReadAddr+1) == uEndAddr)
3424 {
3425 u32SecLen = ((*(pu8Start) & 0x0F) << 8) + *(pu8Start+ 1);
3426 }
3427 u32SecLen += 3;
3428
3429 if (u32SecLen > u32RbSize)
3430 {
3431 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Section length is larger than what section buffer has %u %u DMXID : %u\n", __LINE__,
3432 (unsigned int)u32SecLen, (unsigned int)u32RbSize, (unsigned int)u32DmxId ));
3433 _DumpSecHeader(pu8Start, pu8End, pu8Read, pu8Write);
3434 return DMX_FILTER_STATUS_ERROR;
3435 }
3436
3437 if (u32SecLen> 4096)
3438 {
3439 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Section length is larger than 4096 bytes DMXID = %d \n", __LINE__,(unsigned int)u32DmxId));
3440 // Vincent.Lin request it
3441 return DMX_FILTER_STATUS_ERROR;
3442 }
3443
3444 if(u32BufSize == 0)
3445 {
3446 *pu32SecSize = u32SecLen;
3447 return DMX_FILTER_STATUS_OK;
3448 }
3449
3450 if ((u32SecLen > u32BufSize) || (!pu8Buf))
3451 {
3452 DMX_ASSERT(u32SecLen <= u32BufSize, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] fitler %d. Section data size > given buffer size (%u, %u)\n",
3453 __LINE__, (unsigned int)u32DmxId, (unsigned int)u32SecLen, (unsigned int)u32BufSize)));
3454 _DumpSecHeader(pu8Start, pu8End, pu8Read, pu8Write);
3455 bCopy = FALSE;
3456 }
3457
3458 if ((pu8Read+ u32SecLen) >= pu8End)
3459 {
3460 u32CopySize = pu8End - pu8Read;
3461
3462 if (bCopy)
3463 {
3464 CMP_CPY_TO_USER(pu8Buf, (void*)pu8Read, u32CopySize);
3465 }
3466 pu8Read= pu8Start;
3467 u32SecLen-= u32CopySize;
3468 *pu32SecSize+= u32CopySize;
3469 pu8Buf+= u32CopySize;
3470 }
3471 if (u32SecLen)
3472 {
3473 if (bCopy)
3474 {
3475 CMP_CPY_TO_USER(pu8Buf, (void*)pu8Read, u32SecLen);
3476 }
3477 *pu32SecSize+= u32SecLen;
3478 pu8Read+= u32SecLen;
3479 }
3480
3481 *pu32RmnSize -= *pu32SecSize;
3482 if (FALSE == bCopy)
3483 {
3484 *pu32SecSize = 0;
3485 }
3486
3487 MS_ASSERT(pu8Read< pu8End);
3488
3489 if (DRVTSP_OK != MDrv_TSP_SecFlt_SetReadAddr(0, _pdmx_res->_FltList[u32DmxId].SecBufId, MS_VA2PA((MS_VIRT)pu8Read)))
3490 {
3491 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[%s][%d] MDrv_TSP_SecFlt_SetReadAddr fail %d %d\n", __FUNCTION__, __LINE__, (int)u32DmxId, (int)_pdmx_res->_FltList[u32DmxId].SecBufId));
3492 }
3493
3494 if(*pu32RmnSize >= 3)
3495 {
3496 extern void MDrv_TSP_SecFlt_Update(MS_U32 u32EngId, MS_U32 u32SecFltId);
3497 // Check not enought section data
3498 if ((pu8Read + 3) <= pu8End)
3499 {
3500 u32SecLen = ((*(pu8Read+ 1) & 0x0F) << 8) + *(pu8Read+ 2);
3501 }
3502 else if ((pu8Read + 2) <= pu8End)
3503 {
3504 u32SecLen = ((*(pu8Read+ 1) & 0x0F) << 8) + *(pu8Start);
3505 }
3506 else // ((uReadAddr+1) == uEndAddr)
3507 {
3508 u32SecLen = ((*(pu8Start) & 0x0F) << 8) + *(pu8Start+ 1);
3509 }
3510 u32SecLen += 3;
3511 if (u32SecLen <= *pu32RmnSize)
3512 {
3513 MDrv_TSP_SecFlt_Update(0,_pdmx_res->_FltList[u32DmxId].SecBufId);
3514 }
3515 }
3516
3517 return DMX_FILTER_STATUS_OK;
3518 }
3519
3520 //------------------------------------------------------------------------------
3521 // API implementation
3522 //------------------------------------------------------------------------------
3523 //-------------------------------------------------------------------------------------------------
3524 /// Initialize Demux API
3525 /// @return DMX_FILTER_STATUS_OK - Success
3526 /// @return DMX_FILTER_STATUS_ERROR - Failure
3527 /// @param pFwAddr \b IN: TSP firmware address in DRAM physical address
3528 /// @param u32FwSize \b IN: TSP firmware size
3529 /// It should be called before calling any other Demux API functions.
3530 //-------------------------------------------------------------------------------------------------
_MApi_DMX_SetFW(MS_PHY pFwAddr,MS_U32 u32FwSize)3531 DMX_FILTER_STATUS _MApi_DMX_SetFW(MS_PHY pFwAddr, MS_U32 u32FwSize)
3532 {
3533 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
3534
3535 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
3536 DMX_ASSERT(!(pFwAddr & 0xFF), DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] FW address must be 128 byte alignment\n", __LINE__)));
3537 DMX_ASSERT((u32FwSize > 0), DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] FW size is 0\n", __LINE__)));
3538
3539 _pdmx_res->_phyTspFwAddr = pFwAddr;
3540 _pdmx_res->_u32TspFwSize = u32FwSize;
3541 #endif
3542
3543 return DMX_FILTER_STATUS_OK;
3544 }
3545
3546 //-------------------------------------------------------------------------------------------------
3547 /// Initialize Demux API
3548 /// @return DMX_FILTER_STATUS_OK - Success
3549 /// @return DMX_FILTER_STATUS_ERROR - Failure
3550 /// @note
3551 /// It should be called before calling any other Demux API functions.
3552 //-------------------------------------------------------------------------------------------------
_MApi_DMX_Init(void)3553 DMX_FILTER_STATUS _MApi_DMX_Init(void)
3554 {
3555 MS_U32 temp= 0;
3556 DMX_FILTER_STATUS Res = DMX_FILTER_STATUS_OK;
3557
3558 //printf("[%s] _bFWInit %d, _bEnableInitRefCnt %d, _u8InitRefCnt %d \n", __FUNCTION__, (int)_pdmx_res->_bFWInit, (int)_pdmx_res->_bEnableInitRefCnt, (int)_pdmx_res->_u8InitRefCnt );
3559
3560 DMX_ASSERT((_pdmx_res != 0), DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%s][%06d] data pointer is 0!", __FUNCTION__, __LINE__)));
3561
3562 _pdmx_res->_u8InitRefCnt++;
3563 if((_pdmx_res->_bEnableInitRefCnt) && (_pdmx_res->_u8InitRefCnt != 1))//not the first init
3564 {
3565 return DMX_FILTER_STATUS_OK;
3566 }
3567
3568 #ifdef MSOS_TYPE_LINUX_KERNEL
3569 if(_pdmx_res->_bFWInit == TRUE)
3570 {
3571 return DMX_FILTER_STATUS_OK;
3572 }
3573 #endif //end of MSOS_TYPE_LINUX_KERNEL
3574
3575 if (-1 != _pdmx_res->_Dmx_Mutex)
3576 {
3577 DMX_ASSERT(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Initialization more than once\n", __LINE__)));
3578 }
3579
3580 _pdmx_res->_Dmx_Mutex = MsOS_CreateMutex(E_MSOS_FIFO, "MAPI init", MSOS_PROCESS_SHARED);
3581 if (-1 == _pdmx_res->_Dmx_Mutex )
3582 {
3583 DMX_ASSERT(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] create mutex fail\n", __LINE__)));
3584 }
3585
3586 if (-1 != _pdmx_res->_Dmx_Pvr_Mutex)
3587 {
3588 DMX_ASSERT(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Create PVR mutex more than once\n", __LINE__)));
3589 }
3590
3591 _pdmx_res->_Dmx_Pvr_Mutex = MsOS_CreateMutex(E_MSOS_FIFO, (char*)"MAPI PVR mutex", MSOS_PROCESS_SHARED);
3592 if (-1 == _pdmx_res->_Dmx_Pvr_Mutex )
3593 {
3594 DMX_ASSERT(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] create PVR mutex fail\n", __LINE__)));
3595 }
3596
3597 if (-1 != _pdmx_res->_Dmx_MMFI_Mutex)
3598 {
3599 DMX_ASSERT(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Create MMFI mutex more than once\n", __LINE__)));
3600 }
3601
3602 _pdmx_res->_Dmx_MMFI_Mutex = MsOS_CreateMutex(E_MSOS_FIFO, (char*)"MAPI MMFI mutex", MSOS_PROCESS_SHARED);
3603 if (-1 == _pdmx_res->_Dmx_MMFI_Mutex )
3604 {
3605 DMX_ASSERT(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Create MMFI mutex fail\n", __LINE__)));
3606 }
3607
3608 #ifdef TSO_ENABLE
3609 if (-1 != _pdmx_res->_Dmx_TSO_Mutex)
3610 {
3611 DMX_ASSERT(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Create TSO mutex more than once\n", __LINE__)));
3612 }
3613 _pdmx_res->_Dmx_TSO_Mutex = MsOS_CreateMutex(E_MSOS_FIFO, "MAPI TSO mutex", MSOS_PROCESS_SHARED);
3614 if (-1 == _pdmx_res->_Dmx_TSO_Mutex )
3615 {
3616 DMX_ASSERT(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Create TSO mutex fail\n", __LINE__)));
3617 }
3618 #endif
3619
3620 _DMX_ENTRY();
3621 _DMX_PVR_ENTRY();
3622 _DMX_MMFI_ENTRY();
3623
3624 #if defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0))
3625
3626 if (DRVTSP_OK != MDrv_TSP_Init(_pdmx_res->_phyTspFwAddr, _pdmx_res->_u32TspFwSize))
3627 {
3628 MsOS_ReleaseMutex(_pdmx_res->_Dmx_MMFI_Mutex);
3629 MsOS_ReleaseMutex(_pdmx_res->_Dmx_Pvr_Mutex);
3630 DMX_ASSERT2(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] tsp init fail\n", __LINE__)));
3631 }
3632
3633 if (DRVTSP_OK != MDrv_TSP_GetCap(E_DRVTSP_CAP_PID_FILTER_NUM, &temp))
3634 {
3635 MS_ASSERT(0);
3636 Res = DMX_FILTER_STATUS_ERROR;
3637 }
3638
3639 _pdmx_res->_u32TspFltNum = temp;
3640
3641 #ifdef MMFILEIN
3642 MDrv_MMFI_Init();
3643 #endif
3644
3645 #ifdef TSO_ENABLE
3646 _DMX_TSO_ENTRY();
3647 MDrv_TSO_Init();
3648 MsOS_ReleaseMutex(_pdmx_res->_Dmx_TSO_Mutex);
3649 #endif
3650
3651 #else // For TSP_VER_4_0
3652
3653 if (DRVTSP_OK != MDrv_TSP_GetCap(E_DRVTSP_CAP_FILTER_NUM, &temp))
3654 {
3655 MS_ASSERT(0);
3656 }
3657
3658 temp = temp + 1; // 1 record PID filter for backward compatibility
3659
3660 _pdmx_res->_u32TspFltNum = temp ;
3661
3662 #endif // End of TSP_VER_4_0
3663
3664 _FLT_LIST_RESET();
3665
3666 MsOS_ReleaseMutex(_pdmx_res->_Dmx_MMFI_Mutex);
3667 MsOS_ReleaseMutex(_pdmx_res->_Dmx_Pvr_Mutex);
3668
3669 #if DMX_DEBUG
3670 _DMX_Debug(NULL);
3671 #endif
3672
3673 //printf("[%s] End \n", __FUNCTION__);
3674
3675 _DMX_RETURN(Res);
3676 }
3677
3678 //-------------------------------------------------------------------------------------------------
3679 /// Initialize Demux API for Virtual Quere Enable
3680 /// @param param \b IN: Init Virtual Quere Setting
3681 /// @return DMX_FILTER_STATUS_ERROR - Failure
3682 /// @note if want to use virtual quere, please call this API after calling MApi_DMX_Init. (VQ does not support for all chip)
3683 //-------------------------------------------------------------------------------------------------
_MApi_DMX_TSPInit(DMX_TSPParam * param)3684 DMX_FILTER_STATUS _MApi_DMX_TSPInit(DMX_TSPParam *param)
3685 {
3686 if(_pdmx_res->_bEnableInitRefCnt)
3687 {
3688 if(_pdmx_res->_u8InitRefCnt > 1) //not the first init
3689 return DMX_FILTER_STATUS_OK;
3690 }
3691
3692 if (_pdmx_res->_bFWInit == TRUE)
3693 {
3694 return DMX_FILTER_STATUS_ERROR;
3695 }
3696
3697 #if defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0))
3698
3699 _DMX_ENTRY();
3700
3701 #if (defined(VQ_ENABLE))
3702
3703 #ifdef DMX_RESET_FI_TIMESTAMP
3704 _pdmx_res->_u32FI192DummyBufSize = 576UL;
3705 if(param->u32VQSize > _pdmx_res->_u32FI192DummyBufSize + 200UL)
3706 {
3707 MS_U8* pdummy = 0;
3708 _pdmx_res->_phyFI192DummyBufAddr = (param->phyVQAddr + param->u32VQSize - _pdmx_res->_u32FI192DummyBufSize) & 0xFFFFFFF0;
3709 param->u32VQSize = _pdmx_res->_phyFI192DummyBufAddr - param->phyVQAddr;
3710 pdummy = (MS_U8*)_DMX_PA2KSEG1(_pdmx_res->_phyFI192DummyBufAddr, _pdmx_res->_u32FI192DummyBufSize);
3711 if(pdummy != 0)
3712 {
3713 memset(pdummy, 0x00, _pdmx_res->_u32FI192DummyBufSize);
3714 pdummy[4] = 0x47;
3715 pdummy[196] = 0x47;
3716 pdummy[388] = 0x47;
3717 ULOGD("DMX", "[DMX] VQ Buf %x ,VQ Size %x, Dummy Buf %x\n", (unsigned int)param->phyVQAddr, (unsigned int)param->u32VQSize, (unsigned int)_pdmx_res->_phyFI192DummyBufAddr);
3718 }
3719 }
3720 #endif
3721
3722 _pdmx_res->_phyVQAddr = param->phyVQAddr;
3723 _pdmx_res->_u32VQSize = param->u32VQSize;
3724
3725 MDrv_TSP_SetVQueBuf(param->phyVQAddr, param->u32VQSize);
3726 MDrv_TSP_VQueue_OverflowInt_En(FALSE);
3727 MDrv_TSP_VQueEnable(TRUE);
3728
3729 #if (defined(TS2_IF_SUPPORT) && (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0)))
3730 _pdmx_res->_bVQEnabled = TRUE;
3731 #endif
3732
3733 #endif // End of VQ_ENABLE
3734
3735 _pdmx_res->_bFWInit = TRUE;
3736
3737 _DMX_RETURN(DMX_FILTER_STATUS_OK);
3738
3739 #else // For TSP_VER_4_0
3740
3741 MS_S32 i;
3742 TSP_InitParam tsp_param;
3743
3744 _DMX_ENTRY();
3745
3746 // check user param if it's init
3747 for (i = 0; i < sizeof(param->_zero_reserved); i++)
3748 {
3749 if ( (*(((MS_U8*)(&(param->_zero_reserved))) + i)) != 0 )
3750 {
3751 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
3752 }
3753 }
3754
3755 _pdmx_res->_phyTspFwAddr = param->phyFWAddr;
3756 _pdmx_res->_u32TspFwSize = param->u32FWSize;
3757 _pdmx_res->_phyVQAddr = param->phyVQAddr;
3758 _pdmx_res->_u32VQSize = param->u32VQSize;
3759 _pdmx_res->_u32IsHK = param->u32IsHK;
3760
3761 tsp_param.phyFWAddr = param->phyFWAddr;
3762 tsp_param.u32FWSize = param->u32FWSize;
3763 tsp_param.phyVQAddr = param->phyVQAddr;
3764 tsp_param.u32VQSize = param->u32VQSize;
3765
3766 if (DRVTSP_OK != MDrv_TSP_Init(&tsp_param))
3767 {
3768 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
3769 }
3770
3771 #ifdef MMFILEIN
3772 _DMX_MMFI_ENTRY();
3773 MDrv_MMFI_Init();
3774 MsOS_ReleaseMutex(_pdmx_res->_Dmx_MMFI_Mutex);
3775 #endif
3776
3777 #ifdef TSO_ENABLE
3778 _DMX_TSO_ENTRY();
3779 MDrv_TSO_Init();
3780 MsOS_ReleaseMutex(_pdmx_res->_Dmx_TSO_Mutex);
3781 #endif
3782
3783 _pdmx_res->_bFWInit = TRUE;
3784
3785 _DMX_RETURN(DMX_FILTER_STATUS_OK);
3786
3787 #endif // End of TSP_VER_4_0
3788 }
3789
3790 //-------------------------------------------------------------------------------------------------
3791 /// Get init parameters of MApi_DMX_TSPInit
3792 /// @ingroup TSP_General
3793 /// @param pstParam \b OUT: init parameters
3794 /// @return DMX_FILTER_STATUS_OK - Success
3795 /// @return DMX_FILTER_STATUS_ERROR - Failure
3796 //-------------------------------------------------------------------------------------------------
_MApi_DMX_TSPInit_GetConfig(DMX_TSPParam * param)3797 MS_U32 _MApi_DMX_TSPInit_GetConfig(DMX_TSPParam *param)
3798 {
3799 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
3800
3801 return UTOPIA_STATUS_NOT_SUPPORTED;
3802
3803 #else // For TSP_VER_4_0
3804
3805 _DMX_ENTRY();
3806
3807 if(_pdmx_res->_bFWInit != TRUE)
3808 _DMX_RETURN(UTOPIA_STATUS_ERR_NOT_AVAIL);
3809
3810 param->phyFWAddr = _pdmx_res->_phyTspFwAddr;
3811 param->u32FWSize = _pdmx_res->_u32TspFwSize;
3812 param->phyVQAddr = _pdmx_res->_phyVQAddr;
3813 param->u32VQSize = _pdmx_res->_u32VQSize;
3814 param->u32IsHK = _pdmx_res->_u32IsHK;
3815
3816 MS_U8 i = 0;
3817 for(i = 0; i < sizeof(param->_zero_reserved)/sizeof(MS_U32); i++)
3818 param->_zero_reserved[i] = 0;
3819
3820 _DMX_RETURN(UTOPIA_STATUS_SUCCESS);
3821
3822 #endif // End of TSP_VER_4_0
3823 }
3824
3825 //-------------------------------------------------------------------------------------------------
3826 /// Exit Demux API
3827 /// @return DMX_FILTER_STATUS_OK - Success
3828 /// @return DMX_FILTER_STATUS_ERROR - Failure
3829 /// @note
3830 //-------------------------------------------------------------------------------------------------
_MApi_DMX_Exit(void)3831 DMX_FILTER_STATUS _MApi_DMX_Exit(void)
3832 {
3833 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
3834
3835 //printf("[%s] _bFWInit %d, _bEnableInitRefCnt %d, _u8InitRefCnt %d \n", __FUNCTION__, (int)_pdmx_res->_bFWInit, (int)_pdmx_res->_bEnableInitRefCnt, (int)_pdmx_res->_u8InitRefCnt );
3836
3837 if(_pdmx_res->_u8InitRefCnt > 0)
3838 _pdmx_res->_u8InitRefCnt--;
3839 if((_pdmx_res->_bEnableInitRefCnt) && (_pdmx_res->_u8InitRefCnt > 0))
3840 {
3841 return DMX_FILTER_STATUS_OK;
3842 }
3843
3844 #ifdef MSOS_TYPE_LINUX_KERNEL
3845 if(_pdmx_res->_bFWInit == FALSE)
3846 {
3847 return DMX_FILTER_STATUS_ERROR;
3848 }
3849 if(_pdmx_res->_u8InitRefCnt > 0)
3850 {
3851 return DMX_FILTER_STATUS_MULTIPRC_RUNNING;
3852 }
3853 #endif
3854
3855 if (-1!= _pdmx_res->_Dmx_Mutex)
3856 {
3857 _DMX_ENTRY();
3858 }
3859 else
3860 {
3861 ;// do nothing
3862 }
3863
3864 if (-1!= _pdmx_res->_Dmx_Pvr_Mutex)
3865 {
3866 _DMX_PVR_ENTRY();
3867 }
3868 else
3869 {
3870 ;// do nothing
3871 }
3872
3873 if (-1!= _pdmx_res->_Dmx_MMFI_Mutex)
3874 {
3875 _DMX_MMFI_ENTRY();
3876 }
3877 else
3878 {
3879 ;// do nothing
3880 }
3881
3882 #ifdef TSO_ENABLE
3883 if (-1!= _pdmx_res->_Dmx_TSO_Mutex)
3884 {
3885 _DMX_TSO_ENTRY();
3886 }
3887 else
3888 {
3889 ;// do nothing
3890 }
3891 #endif
3892
3893 #ifdef MMFILEIN
3894 MDrv_MMFI_Exit();
3895 #endif
3896
3897 #ifdef TSO_ENABLE
3898 MDrv_TSO_Exit();
3899 if (_pdmx_res->_Dmx_TSO_Mutex != -1 )
3900 {
3901 MsOS_ReleaseMutex(_pdmx_res->_Dmx_TSO_Mutex);
3902 MsOS_DeleteMutex(_pdmx_res->_Dmx_TSO_Mutex);
3903 _pdmx_res->_Dmx_TSO_Mutex= -1;
3904 }
3905 #endif
3906
3907 if (MDrv_TSP_Exit() == DRVTSP_OK)
3908 {
3909 if (_pdmx_res->_Dmx_Mutex != -1 )
3910 {
3911 MsOS_ReleaseMutex(_pdmx_res->_Dmx_Mutex);
3912 MsOS_DeleteMutex(_pdmx_res->_Dmx_Mutex);
3913 _pdmx_res->_Dmx_Mutex= -1;
3914 }
3915 if (_pdmx_res->_Dmx_Pvr_Mutex != -1 )
3916 {
3917 MsOS_ReleaseMutex(_pdmx_res->_Dmx_Pvr_Mutex);
3918 MsOS_DeleteMutex(_pdmx_res->_Dmx_Pvr_Mutex);
3919 _pdmx_res->_Dmx_Pvr_Mutex= -1;
3920 }
3921 if (_pdmx_res->_Dmx_MMFI_Mutex != -1 )
3922 {
3923 MsOS_ReleaseMutex(_pdmx_res->_Dmx_MMFI_Mutex);
3924 MsOS_DeleteMutex(_pdmx_res->_Dmx_MMFI_Mutex);
3925 _pdmx_res->_Dmx_MMFI_Mutex= -1;
3926 }
3927
3928 _pdmx_res->_bFWInit = FALSE;
3929
3930 #ifdef DMX_UTOPIA_20
3931 _pdmx_res = NULL;
3932 #endif
3933 return DMX_FILTER_STATUS_OK;
3934 }
3935 else
3936 {
3937 // do nothing
3938 }
3939
3940 if (-1!= _pdmx_res->_Dmx_Mutex)
3941 {
3942 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
3943 }
3944 else
3945 {
3946 return DMX_FILTER_STATUS_ERROR; ; //donothing
3947 }
3948 }
3949
3950 //-------------------------------------------------------------------------------------------------
3951 /// Reset Demux API
3952 /// @return DMX_FILTER_STATUS_OK - Success
3953 /// @return DMX_FILTER_STATUS_ERROR - Failure
3954 /// @note
3955 //-------------------------------------------------------------------------------------------------
_MApi_DMX_Reset(void)3956 DMX_FILTER_STATUS _MApi_DMX_Reset(void)
3957 {
3958 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
3959
3960 _DMX_ENTRY();
3961
3962 if (MDrv_TSP_Reset() == DRVTSP_OK)
3963 {
3964 #ifdef MMFILEIN
3965 MDrv_MMFI_ResetAll();
3966 #endif
3967 _DMX_RETURN(DMX_FILTER_STATUS_OK);
3968 }
3969 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
3970 }
3971
3972 //-------------------------------------------------------------------------------------------------
3973 /// Force exit Demux API
3974 /// @return DMX_FILTER_STATUS_OK - Success
3975 /// @return DMX_FILTER_STATUS_ERROR - Failure
3976 /// @special case for MM
3977 //-------------------------------------------------------------------------------------------------
_MApi_DMX_ForceExit(void)3978 DMX_FILTER_STATUS _MApi_DMX_ForceExit(void)
3979 {
3980 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
3981
3982 _DMX_ENTRY();
3983
3984 if (MDrv_TSP_PowerOff() == DRVTSP_OK)
3985 {
3986 #ifdef MMFILEIN
3987 MDrv_MMFI_Exit();
3988 MDrv_MMFI_ResetAll();
3989 #endif
3990 _DMX_RETURN(DMX_FILTER_STATUS_OK);
3991 }
3992
3993 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
3994 }
3995
3996 //--------------------------------------------------------------------------------------------------
3997 /// Resume TSP driver
3998 /// @param phyFWAddr \b IN: TSP FW address
3999 /// @param u32FWSize \b IN: TSP FW size
4000 /// @return TSP_Result
4001 /// @note
4002 /// Restore TSP driver states from DRAM
4003 //--------------------------------------------------------------------------------------------------
_MApi_DMX_Resume(MS_PHY phyFWAddr,MS_U32 u32FWSize)4004 DMX_FILTER_STATUS _MApi_DMX_Resume(MS_PHY phyFWAddr, MS_U32 u32FWSize)
4005 {
4006 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
4007
4008 //printf("[%s] _bFWInit %d, _bEnableInitRefCnt %d, _u8InitRefCnt %d \n", __FUNCTION__, (int)_pdmx_res->_bFWInit, (int)_pdmx_res->_bEnableInitRefCnt, (int)_pdmx_res->_u8InitRefCnt );
4009
4010 if(_pdmx_res == 0)
4011 {
4012 //DMX_DBGMSG(DMX_DBG_ERR, printf("[MAPI DMX][%s][%06d] Share memoery pointer is 0!", __FUNCTION__, __LINE__));
4013 return DMX_FILTER_STATUS_ERROR;
4014 }
4015
4016 if(_pdmx_res->_bFWInit == FALSE)
4017 {
4018 return DMX_FILTER_STATUS_OK;
4019 }
4020
4021 _DMX_STR_ENTRY();
4022
4023 #ifdef MSOS_TYPE_LINUX_KERNEL
4024 phyFWAddr = _pdmx_res->_phyTspFwAddr;
4025 u32FWSize = _pdmx_res->_u32TspFwSize;
4026 #endif
4027
4028 if(MDrv_TSP_Resume(phyFWAddr, u32FWSize) != DRVTSP_OK)
4029 {
4030 _DMX_STR_RETURN(DMX_FILTER_STATUS_ERROR);
4031 }
4032
4033 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
4034 #if (defined(VQ_ENABLE))
4035 MDrv_TSP_SetVQueBuf(_pdmx_res->_phyVQAddr, _pdmx_res->_u32VQSize);
4036 MDrv_TSP_VQueEnable(TRUE);
4037 #endif
4038 MDrv_TSP_Resume_Filter();
4039 #endif
4040
4041 #ifdef MMFILEIN
4042 #ifdef MSOS_TYPE_LINUX_KERNEL
4043 MDrv_MMFI_Resume();
4044 #else
4045 MDrv_MMFI_Init();
4046 #endif
4047 #endif
4048
4049 #ifdef TSO_ENABLE
4050 #ifdef MSOS_TYPE_LINUX_KERNEL
4051 MDrv_TSO_Resume();
4052 #else
4053 _DMX_TSO_ENTRY();
4054 MDrv_TSO_Init();
4055 MsOS_ReleaseMutex(_pdmx_res->_Dmx_TSO_Mutex);
4056 #endif
4057 #endif
4058
4059 #ifdef FQ_ENABLE
4060 #ifdef MSOS_TYPE_LINUX_KERNEL
4061 MDrv_FQ_Resume();
4062 #endif
4063 #endif
4064
4065 //printf("[%s][%d] OK \n", __FUNCTION__, __LINE__);
4066
4067 _DMX_STR_RETURN(DMX_FILTER_STATUS_OK);
4068 }
4069
4070 //--------------------------------------------------------------------------------------------------
4071 /// Suspend TSP driver
4072 /// @return TSP_Result
4073 /// @note
4074 /// Save TSP driver states to DRAM
4075 //--------------------------------------------------------------------------------------------------
_MApi_DMX_Suspend(void)4076 DMX_FILTER_STATUS _MApi_DMX_Suspend(void)
4077 {
4078 DMX_FILTER_STATUS ret;
4079
4080 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
4081
4082 //printf("[%s] _bFWInit %d, _bEnableInitRefCnt %d, _u8InitRefCnt %d \n", __FUNCTION__, (int)_pdmx_res->_bFWInit, (int)_pdmx_res->_bEnableInitRefCnt, (int)_pdmx_res->_u8InitRefCnt );
4083
4084 if(_pdmx_res == 0)
4085 {
4086 //DMX_DBGMSG(DMX_DBG_ERR, printf("[MAPI DMX][%s][%06d] Share memoery pointer is 0!", __FUNCTION__, __LINE__));
4087 return DMX_FILTER_STATUS_ERROR;
4088 }
4089
4090 if(_pdmx_res->_bFWInit == FALSE)
4091 {
4092 return DMX_FILTER_STATUS_OK;
4093 }
4094
4095 _DMX_STR_ENTRY();
4096
4097 #ifdef MMFILEIN
4098 #ifdef MSOS_TYPE_LINUX_KERNEL
4099 MDrv_MMFI_Suspend();
4100 #else
4101 MDrv_MMFI_Exit();
4102 #endif
4103 #endif
4104
4105 #ifdef TSO_ENABLE
4106 #ifdef MSOS_TYPE_LINUX_KERNEL
4107 MDrv_TSO_Suspend();
4108 #else
4109 MDrv_TSO_Exit();
4110 #endif
4111 #endif
4112
4113 #ifdef FQ_ENABLE
4114 #ifdef MSOS_TYPE_LINUX_KERNEL
4115 MDrv_FQ_Suspend();
4116 #endif
4117 #endif
4118
4119 ret = ((MDrv_TSP_Suspend() == DRVTSP_OK) ? DMX_FILTER_STATUS_OK : DMX_FILTER_STATUS_ERROR);
4120
4121 //printf("[%s][%d] ret %d \n", __FUNCTION__, __LINE__, (int)ret);
4122
4123 _DMX_STR_RETURN(ret);
4124
4125 }
4126
4127 //-------------------------------------------------------------------------------------------------
4128 /// Release TSP driver HW lock semaphone
4129 /// @return DMX_FILTER_STATUS_OK - Success
4130 /// @return DMX_FILTER_STATUS_ERROR - Failure
4131 /// @note
4132 //-------------------------------------------------------------------------------------------------
_MApi_DMX_ReleaseSemaphone(void)4133 DMX_FILTER_STATUS _MApi_DMX_ReleaseSemaphone(void)
4134 {
4135 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
4136
4137 #if defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0))
4138 MS_DEBUG_MSG(DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "%s [OBSOLETED]\n", __FUNCTION__)));
4139 // @FIXME: check root cause of why coprocess has unrelease lock condition.
4140 if (MDrv_TSP_HW_Lock_Release() == DRVTSP_OK)
4141 {
4142 return (DMX_FILTER_STATUS_OK);
4143 }
4144 #endif
4145
4146 return DMX_FILTER_STATUS_ERROR;
4147 }
4148
4149 //-------------------------------------------------------------------------------------------------
4150 /// Set Demux Flow
4151 /// @param DmxFlow \b IN: DMX_FLOW_PLAYBACK for playback flow
4152 /// DMX_FLOW_PVR for recording flow
4153 /// DMX_FLOW_PVRCA for CA recording flow
4154 /// Below Items are not support for all chips:
4155 /// DMX_FLOW_PVR1 for second recording flow.
4156 /// DMX_FLOW_PVR2 for third recording flow.
4157 /// DMX_FLOW_FILEIN_MM for file-in playback with independed audio path.
4158 /// DMX_FLOW_FILEIN_MM3D for file-in playback with 2nd video input source .
4159 ///
4160 /// @param pDmxFlowInput \b OUT: pointer to store DMX input flow value.
4161 // DMX_FLOW_INPUT_DEMOD for input from DVBC
4162 /// DMX_FLOW_INPUT_EXT_INPUT0 for input from TS0 Interface
4163 /// DMX_FLOW_INPUT_EXT_INPUT1 for input from TS1 Interface
4164 /// DMX_FLOW_INPUT_EXT_INPUT2 for input from TS2 Interface
4165 /// DMX_FLOW_INPUT_EXT_INPUT3 for input from TS3 Interface
4166 /// DMX_FLOW_INPUT_MEM for input from memory
4167 /// Below Items are not support for all chips:
4168 /// DMX_FLOW_INPUT_EXT_INPUT1for input from TS2 Interface
4169 /// @param pbClkInv \b OUT: pointer to store clock phase inversion
4170 /// @param pbExtSync \b OUT: pointer to store sync by external signal
4171 /// @param pbParallel \b OUT: pointer to store parallel interface or serial interface
4172 /// @return DMX_FILTER_STATUS_OK - Success
4173 /// @return DMX_FILTER_STATUS_ERROR - Failure
4174 /// @note
4175 //-------------------------------------------------------------------------------------------------
4176 #if defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0)
_MApi_DMX_Get_FlowInput_Status(DMX_FLOW DmxFlow,DMX_FLOW_INPUT * pDmxFlowInput,MS_BOOL * pbClkInv,MS_BOOL * pbExtSync,MS_BOOL * pbParallel)4177 DMX_FILTER_STATUS _MApi_DMX_Get_FlowInput_Status(DMX_FLOW DmxFlow, DMX_FLOW_INPUT *pDmxFlowInput, MS_BOOL *pbClkInv, MS_BOOL *pbExtSync, MS_BOOL *pbParallel)
4178 {
4179 DrvTSP_If_Set Ifset;
4180 DrvTSP_If eif = E_DRVTSP_IF_TS0;
4181 MS_U16 u16Clk = 0;
4182
4183 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
4184
4185 *pDmxFlowInput = DMX_FLOW_INPUT_MEM;
4186 *pbClkInv = FALSE;
4187 *pbExtSync = FALSE;
4188 *pbParallel = FALSE;
4189
4190 switch(DmxFlow)
4191 {
4192 case DMX_FLOW_PLAYBACK:
4193 case DMX_FLOW_PVRCA:
4194 case DMX_FLOW_CIPHSS_PVRCA:
4195 eif = E_DRVTSP_IF_TS0;
4196 break;
4197 case DMX_FLOW_PLAYBACK1:
4198 case DMX_FLOW_PVR:
4199 case DMX_FLOW_CIPHSS_PLAYBACK:
4200 case DMX_FLOW_PVRCA1:
4201 eif = E_DRVTSP_IF_TS1;
4202 break;
4203 case DMX_FLOW_PLAYBACK2:
4204 case DMX_FLOW_PVR1:
4205 eif = E_DRVTSP_IF_TS2;
4206 break;
4207 #ifdef MERGE_STR_SUPPORT
4208 case DMX_FLOW_PLAYBACK_FI:
4209 eif = E_DRVTSP_IF_FI;
4210 break;
4211 #endif
4212 case DMX_FLOW_PVR2:
4213 eif = E_DRVTSP_IF_TS3;
4214 break;
4215 case DMX_FLOW_MMFI0:
4216 case DMX_FLOW_MMFI1:
4217 DMX_DBGMSG(DMX_DBG_INFO,ULOGD("DMX", "Flow Input: From Memory \n"));
4218 break;
4219 default:
4220 DMX_DBGMSG(DMX_DBG_INFO,ULOGD("DMX", "Flow Input: Not support \n"));
4221 return DMX_FILTER_STATUS_ERROR;
4222 }
4223
4224 Ifset.ePad = E_DRVTSP_PAD_DEMOD;
4225 Ifset.bClkInv = FALSE;
4226 Ifset.bExtSync = FALSE;
4227 Ifset.bParallel = FALSE;
4228
4229 if(MDrv_TSP_GetTSIFStatus(eif, &Ifset, &u16Clk) != DRVTSP_OK)
4230 {
4231 return DMX_FILTER_STATUS_ERROR;
4232 }
4233
4234 if(Ifset.ePad == E_DRVTSP_PAD_DEMOD)
4235 {
4236 *pDmxFlowInput = DMX_FLOW_INPUT_DEMOD;
4237 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Playback, "));
4238 }
4239 else if(Ifset.ePad == E_DRVTSP_PAD_EXT_INPUT0)
4240 {
4241 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT0;
4242 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Extern TS0, "));
4243 }
4244 else if(Ifset.ePad == E_DRVTSP_PAD_EXT_INPUT1)
4245 {
4246 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT1;
4247 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Extern TS1, "));
4248 }
4249 else if(Ifset.ePad == E_DRVTSP_PAD_EXT_INPUT2)
4250 {
4251 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT2;
4252 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Extern TS2, "));
4253 }
4254 else if(Ifset.ePad == E_DRVTSP_PAD_EXT_INPUT3)
4255 {
4256 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT3;
4257 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Extern TS3, "));
4258 }
4259 else if(Ifset.ePad == E_DRVTSP_PAD_EXT_INPUT4)
4260 {
4261 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT4;
4262 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Extern TS4, "));
4263 }
4264 else if(Ifset.ePad == E_DRVTSP_PAD_EXT_INPUT5)
4265 {
4266 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT5;
4267 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Extern TS5, "));
4268 }
4269 else if(Ifset.ePad == E_DRVTSP_PAD_TSO)
4270 {
4271 *pDmxFlowInput = DMX_FLOW_INPUT_TSO;
4272 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Extern TSO, "));
4273 }
4274 else
4275 {
4276 *pDmxFlowInput = DMX_FLOW_INPUT_MEM;
4277 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: From Memory , "));
4278 }
4279
4280 *pbClkInv = Ifset.bClkInv;
4281 *pbExtSync = Ifset.bExtSync;
4282 *pbParallel = Ifset.bParallel;
4283
4284 if(*pbClkInv)
4285 {
4286 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "CLK Inverse, "));
4287 }
4288 if(*pbExtSync)
4289 {
4290 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "External Sync, "));
4291 }
4292 if(*pbParallel)
4293 {
4294 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Parallel mode \n"));
4295 }
4296 return (DMX_FILTER_STATUS_OK);
4297
4298 } // End of TSP_VER_3_0
4299
4300 #elif (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
4301
_MApi_DMX_Get_FlowInput_Status(DMX_FLOW DmxFlow,DMX_FLOW_INPUT * pDmxFlowInput,MS_BOOL * pbClkInv,MS_BOOL * pbExtSync,MS_BOOL * pbParallel)4302 DMX_FILTER_STATUS _MApi_DMX_Get_FlowInput_Status(DMX_FLOW DmxFlow, DMX_FLOW_INPUT *pDmxFlowInput, MS_BOOL *pbClkInv, MS_BOOL *pbExtSync, MS_BOOL *pbParallel)
4303 {
4304 DrvTSP_If_Set Ifset;
4305 DrvTSP_If eif = E_DRVTSP_IF_PLAYBACK;
4306
4307 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
4308
4309 *pDmxFlowInput = DMX_FLOW_INPUT_MEM;
4310 *pbClkInv = FALSE;
4311 *pbExtSync = FALSE;
4312 *pbParallel = FALSE;
4313
4314 switch(DmxFlow)
4315 {
4316 case DMX_FLOW_PLAYBACK:
4317 case DMX_FLOW_CIPHSS_PLAYBACK:
4318 eif = E_DRVTSP_IF_PLAYBACK;
4319 break;
4320 case DMX_FLOW_PVR:
4321 case DMX_FLOW_PVRCA:
4322 case DMX_FLOW_CIPHSS_PVRCA:
4323 case DMX_FLOW_PVRCA1:
4324 eif = E_DRVTSP_IF_PVR0;
4325 break;
4326 #ifdef TS2_IF_SUPPORT
4327 #ifdef TS2_LIVE_SUPPORT
4328 case DMX_FLOW_PLAYBACK1:
4329 #endif
4330 case DMX_FLOW_PVR1:
4331 eif = E_DRVTSP_IF_PVR1;
4332 break;
4333 #endif
4334 #ifdef TS3_IF_SUPPORT
4335 case DMX_FLOW_PVR2:
4336 eif = E_DRVTSP_IF_PVR2;
4337 break;
4338 #endif
4339 default:
4340 DMX_DBGMSG(DMX_DBG_INFO,ULOGD("DMX", "Flow Input: From Memory \n"));
4341 return DMX_FILTER_STATUS_ERROR;
4342
4343 }
4344
4345 Ifset.ePad = E_DRVTSP_PAD_DEMOD;
4346 Ifset.bClkInv = FALSE;
4347 Ifset.bExtSync = FALSE;
4348 Ifset.bParallel = FALSE;
4349
4350 if(MDrv_TSP_GetTSIFStatus(eif, &Ifset) != DRVTSP_OK)
4351 {
4352 return DMX_FILTER_STATUS_ERROR;
4353 }
4354
4355 if(Ifset.ePad == E_DRVTSP_PAD_DEMOD)
4356 {
4357 *pDmxFlowInput = DMX_FLOW_INPUT_DEMOD;
4358 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Playback, "));
4359 }
4360 else if(Ifset.ePad == E_DRVTSP_PAD_EXT_INPUT0)
4361 {
4362 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT0;
4363 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Extern TS0, "));
4364 }
4365 else if(Ifset.ePad == E_DRVTSP_PAD_EXT_INPUT1)
4366 {
4367 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT1;
4368 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Extern TS1, "));
4369 }
4370 #ifdef TS2_IF_SUPPORT
4371 else if(Ifset.ePad == E_DRVTSP_PAD_EXT_INPUT2)
4372 {
4373 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT2;
4374 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Extern TS2, "));
4375 }
4376 #endif
4377 #ifdef TS3_IF_SUPPORT
4378 else if(Ifset.ePad == E_DRVTSP_PAD_EXT_INPUT3)
4379 {
4380 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT3;
4381 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Extern TS3, "));
4382 }
4383 #endif
4384
4385 *pbClkInv = Ifset.bClkInv;
4386 *pbExtSync = Ifset.bExtSync;
4387 *pbParallel = Ifset.bParallel;
4388
4389 if(*pbClkInv)
4390 {
4391 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "CLK Inverse, "));
4392 }
4393 if(*pbExtSync)
4394 {
4395 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "External Sync, "));
4396 }
4397 if(*pbParallel)
4398 {
4399 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Parallel mode \n"));
4400 }
4401
4402 return (DMX_FILTER_STATUS_OK);
4403
4404 } // End of TSP_VER_1_0
4405
4406 #else // For TSP_VER_4_0
4407
_MApi_DMX_Get_FlowInput_Status(DMX_FLOW DmxFlow,DMX_FLOW_INPUT * pDmxFlowInput,MS_BOOL * pbClkInv,MS_BOOL * pbExtSync,MS_BOOL * pbParallel)4408 DMX_FILTER_STATUS _MApi_DMX_Get_FlowInput_Status(DMX_FLOW DmxFlow, DMX_FLOW_INPUT *pDmxFlowInput, MS_BOOL *pbClkInv, MS_BOOL *pbExtSync, MS_BOOL *pbParallel)
4409 {
4410 DrvTSP_TsIf_Set TsIfset;
4411 MS_U32 u32TSIF = 0;
4412
4413 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
4414
4415 *pDmxFlowInput = DMX_FLOW_INPUT_MEM;
4416 *pbClkInv = FALSE;
4417 *pbExtSync = FALSE;
4418 *pbParallel = FALSE;
4419
4420 //if live-in and file-in of a DmxFlow map to diff TSIF, return the status of the live-in one
4421 if(_DMX_ApiDrv_DmxFlowMapping(DmxFlow, &u32TSIF) == FALSE)
4422 {
4423 return DMX_FILTER_STATUS_ERROR;
4424 }
4425
4426 TsIfset.ePad = E_TSP_TS_INVALID;
4427 TsIfset.bClkInv = FALSE;
4428 TsIfset.bExtSync = FALSE;
4429 TsIfset.bParallel = FALSE;
4430
4431 // get PAD and ClkInv for eTSIF
4432 if(MDrv_TSP_GetTSIFStatus((TSP_TSIF)u32TSIF, &(TsIfset.ePad), // @F_TODO do we have to modify this type convert into original type?
4433 &(TsIfset.bClkInv), &(TsIfset.bExtSync), &(TsIfset.bParallel)) != E_TSP_OK)
4434 {
4435 return DMX_FILTER_STATUS_ERROR;
4436 }
4437
4438 if(TsIfset.ePad == E_TSP_TS_DEMOD0)
4439 {
4440 *pDmxFlowInput = DMX_FLOW_INPUT_DEMOD;
4441 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: DEMOD, "));
4442 }
4443 else if(TsIfset.ePad == E_TSP_TS_DEMOD1)
4444 {
4445 *pDmxFlowInput = DMX_FLOW_INPUT_DEMOD1;
4446 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: DEMOD1, "));
4447 }
4448 else if(TsIfset.ePad == E_TSP_TS_PAD0)
4449 {
4450 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT0;
4451 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Extern Input0, "));
4452 }
4453 else if(TsIfset.ePad == E_TSP_TS_PAD1)
4454 {
4455 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT1;
4456 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Extern Input1, "));
4457 }
4458 else if(TsIfset.ePad == E_TSP_TS_PAD2)
4459 {
4460 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT2;
4461 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Extern Input2, "));
4462 }
4463 else if(TsIfset.ePad == E_TSP_TS_PAD3)
4464 {
4465 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT3;
4466 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Extern Input3, "));
4467 }
4468 else if(TsIfset.ePad == E_TSP_TS_PAD4)
4469 {
4470 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT4;
4471 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Extern Input4, "));
4472 }
4473 else if(TsIfset.ePad == E_TSP_TS_PAD5)
4474 {
4475 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT5;
4476 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Extern Input5, "));
4477 }
4478 else if(TsIfset.ePad == E_TSP_TS_PAD6)
4479 {
4480 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT6;
4481 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Extern Input6, "));
4482 }
4483 else if(TsIfset.ePad == E_TSP_TS_PAD7)
4484 {
4485 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT7;
4486 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: Extern Input7, "));
4487 }
4488 else if(TsIfset.ePad == E_TSP_TS_PAD_TSO0)
4489 {
4490 *pDmxFlowInput = DMX_FLOW_INPUT_TSO;
4491 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: TSO0, "));
4492 }
4493 else if(TsIfset.ePad == E_TSP_TS_PAD_TSO1)
4494 {
4495 *pDmxFlowInput = DMX_FLOW_INPUT_TSO1;
4496 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Flow Input: TSO1, "));
4497 }
4498 else if(TsIfset.ePad == E_TSP_TS_PAD0_3WIRE)
4499 {
4500 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT0_3WIRE;
4501 DMX_DBGMSG(DMX_DBG_INFO, printf("Flow Input: Extern Input0 3WIRE, "));
4502 }
4503 else if(TsIfset.ePad == E_TSP_TS_PAD1_3WIRE)
4504 {
4505 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT1_3WIRE;
4506 DMX_DBGMSG(DMX_DBG_INFO, printf("Flow Input: Extern Input1 3WIRE, "));
4507 }
4508 else if(TsIfset.ePad == E_TSP_TS_PAD2_3WIRE)
4509 {
4510 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT2_3WIRE;
4511 DMX_DBGMSG(DMX_DBG_INFO, printf("Flow Input: Extern Input2 3WIRE, "));
4512 }
4513 else if(TsIfset.ePad == E_TSP_TS_PAD3_3WIRE)
4514 {
4515 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT3_3WIRE;
4516 DMX_DBGMSG(DMX_DBG_INFO, printf("Flow Input: Extern Input3 3WIRE, "));
4517 }
4518 else if(TsIfset.ePad == E_TSP_TS_PAD4_3WIRE)
4519 {
4520 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT4_3WIRE;
4521 DMX_DBGMSG(DMX_DBG_INFO, printf("Flow Input: Extern Input4 3WIRE, "));
4522 }
4523 else if(TsIfset.ePad == E_TSP_TS_PAD5_3WIRE)
4524 {
4525 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT5_3WIRE;
4526 DMX_DBGMSG(DMX_DBG_INFO, printf("Flow Input: Extern Input5 3WIRE, "));
4527 }
4528 else if(TsIfset.ePad == E_TSP_TS_PAD6_3WIRE)
4529 {
4530 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT6_3WIRE;
4531 DMX_DBGMSG(DMX_DBG_INFO, printf("Flow Input: Extern Input6 3WIRE, "));
4532 }
4533 else if(TsIfset.ePad == E_TSP_TS_PAD7_3WIRE)
4534 {
4535 *pDmxFlowInput = DMX_FLOW_INPUT_EXT_INPUT7_3WIRE;
4536 DMX_DBGMSG(DMX_DBG_INFO, printf("Flow Input: Extern Input7 3WIRE, "));
4537 }
4538
4539 *pbClkInv = TsIfset.bClkInv;
4540 *pbExtSync = TsIfset.bExtSync;
4541 *pbParallel = TsIfset.bParallel;
4542
4543 if(*pbClkInv)
4544 {
4545 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "CLK Inverse, "));
4546 }
4547 if(*pbExtSync)
4548 {
4549 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "External Sync, "));
4550 }
4551 if(*pbParallel)
4552 {
4553 DMX_DBGMSG(DMX_DBG_INFO, ULOGD("DMX", "Parallel mode \n"));
4554 }
4555
4556 return (DMX_FILTER_STATUS_OK);
4557 }
4558 #endif // End of TSP_VER_4_0
4559
4560 //-------------------------------------------------------------------------------------------------
4561 /// Set Demux Flow
4562 /// @param DmxFlow \b IN: DMX_FLOW_PLAYBACK for playback flow
4563 /// DMX_FLOW_PVR for recording flow
4564 /// DMX_FLOW_PVRCA for CA recording flow
4565 /// Below Items are not support for all chips:
4566 /// DMX_FLOW_PVR1 for second recording flow.
4567 /// DMX_FLOW_FILEIN_MM for file-in playback with independed audio path.
4568 /// DMX_FLOW_FILEIN_MM3D for file-in playback with 2nd video input source .
4569 ///
4570 /// @param DmxFlowInput \b IN: DMX_FLOW_INPUT_DEMOD for input from DVBC
4571 /// DMX_FLOW_INPUT_EXT_INPUT0 for input from TS0 Interface
4572 /// DMX_FLOW_INPUT_EXT_INPUT1 for input from TS1 Interface
4573 /// DMX_FLOW_INPUT_MEM for input from memory
4574 /// Below Items are not support for all chips:
4575 /// DMX_FLOW_INPUT_EXT_INPUT1for input from TS2 Interface
4576 /// @param bClkInv \b IN: TSin options: clock phase inversion
4577 /// @param bExtSync \b IN: TSin options: sync by external signal
4578 /// @param bParallel \b IN: TSin is parallel interface or serial interface
4579 /// @return DMX_FILTER_STATUS_OK - Success
4580 /// @return DMX_FILTER_STATUS_ERROR - Failure
4581 /// @note
4582 //-------------------------------------------------------------------------------------------------
_MApi_DMX_FlowSet(DMX_FLOW DmxFlow,DMX_FLOW_INPUT DmxFlowInput,MS_BOOL bClkInv,MS_BOOL bExtSync,MS_BOOL bParallel)4583 DMX_FILTER_STATUS _MApi_DMX_FlowSet(DMX_FLOW DmxFlow, DMX_FLOW_INPUT DmxFlowInput, MS_BOOL bClkInv, MS_BOOL bExtSync, MS_BOOL bParallel)
4584 {
4585 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d (%d, %d, %d, %d, %d)\n",
4586 __FUNCTION__, __LINE__, (int)DmxFlow, (int)DmxFlowInput, (int)bClkInv, (int)bExtSync, (int)bParallel));
4587
4588 #if DMX_DEBUG
4589 if(u32DbgLogFlag & DMX_DBG_LOG_FLOWSET)
4590 dmx_dbg_print("[DMX FlwSet]\tFlow[0x%x] Input[0x%x] Inv[%d] Sync[%d] Parallel[%d]\n",
4591 (MS_U32)DmxFlow,
4592 (MS_U32)DmxFlowInput,
4593 (MS_U32)bClkInv,
4594 (MS_U32)bExtSync,
4595 (MS_U32)bParallel);
4596 #endif
4597
4598 _DMX_ENTRY();
4599
4600 if(_DMX_FlowSet(DmxFlow, DmxFlowInput, bClkInv, bExtSync, bParallel) == FALSE)
4601 {
4602 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
4603 }
4604
4605 _DMX_RETURN(DMX_FILTER_STATUS_OK);
4606 }
4607
4608 //--------------------------------------------------------------------------------------------------
4609 /// Setting PVR flow
4610 /// @param Eng \b IN: PVR Engine ID
4611 /// @param ePvrSrcTSIf \b IN: Select the record source
4612 /// @param bDscmbRec \b IN: TRUE for recording dscmbled stream; FALSE for recording orignal stream
4613 /// @return DMX_FILTER_STATUS
4614 /// @note
4615 //--------------------------------------------------------------------------------------------------
_MApi_DMX_PVR_FlowSet(DMX_PVR_ENG Eng,DMX_TSIF ePvrSrcTSIf,MS_BOOL bDscmbRec)4616 DMX_FILTER_STATUS _MApi_DMX_PVR_FlowSet(DMX_PVR_ENG Eng, DMX_TSIF ePvrSrcTSIf, MS_BOOL bDscmbRec)
4617 {
4618 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d (DMX_PVR_ENG:%d, ePvrSrcTSIf:%d, BDSCMBREC:%d)\n",
4619 __FUNCTION__, __LINE__, (int)Eng, (int)ePvrSrcTSIf, (int)bDscmbRec));
4620
4621 if(Eng == DMX_PVR_TSO0)
4622 {
4623 #ifdef TSO_PVR_SUPPORT
4624 _DMX_TSO_ENTRY();
4625
4626 if(ePvrSrcTSIf == DMX_TSIF_MMT)
4627 {
4628 MDrv_TSO_PVR_SelSrc(0, E_DRVTSO_PVR_SRC_MMT);
4629 }
4630 else
4631 {
4632 MDrv_TSO_PVR_SelSrc(0, E_DRVTSO_PVR_SRC_SVQ);
4633 }
4634
4635 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
4636 #else
4637 return DMX_FILTER_STATUS_ERROR;
4638
4639 #endif //TSO_PVR_SUPPORT
4640
4641 }
4642
4643 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
4644
4645 MS_U32 u32data = 0;
4646 DrvTSP_PKTDMXSrcType ePktDmx = E_DRVTSP_PKTSRC_DEMUX0;
4647
4648 DMX_FLOW DmxFlowOrg = DMX_FLOW_PLAYBACK;
4649 DMX_FLOW DmxFlowNew = DMX_FLOW_PVR2;
4650 DMX_FLOW_INPUT FlowInput = DMX_FLOW_INPUT_DEMOD;
4651 MS_BOOL bClkInv = FALSE;
4652 MS_BOOL bExtSync = FALSE;
4653 MS_BOOL bParallel = FALSE;
4654 MS_BOOL bBlockEnable = FALSE;
4655
4656 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
4657
4658 DrvTSP_DscmbCtrl DscmbPath = 0;
4659
4660 //If not select input src, setting input src depend on CA Ctrl value
4661 if(ePvrSrcTSIf == DMX_TSIF_MAX)
4662 {
4663 MDrv_TSP_Dscmb_Path(0, &DscmbPath, FALSE);
4664
4665 //ULOGD("DMX", "[%s][%d] DscmbPath 0x%lx \n", __FUNCTION__, __LINE__, DscmbPath);
4666
4667 if((DscmbPath & E_DRVTSP_CA_OUTPUT_LIVE0) == 0)
4668 {
4669 ePvrSrcTSIf = DMX_TSIF_LIVE1;
4670 }
4671 else
4672 {
4673 ePvrSrcTSIf = DMX_TSIF_LIVE0;
4674 }
4675 }
4676 #endif // End of TSP_VER_1_0
4677
4678 if(MDrv_TSP_GetCap(E_DRVTSP_CAP_PVR_ENG_NUM, (void*)&u32data) != DRVTSP_OK)
4679 {
4680 return DMX_FILTER_STATUS_ERROR;
4681 }
4682 if(Eng >= u32data)
4683 {
4684 return DMX_FILTER_STATUS_OK;
4685 }
4686
4687 switch(ePvrSrcTSIf)
4688 {
4689 case DMX_TSIF_LIVE0:
4690 ePktDmx = E_DRVTSP_PKTSRC_DEMUX0;
4691 break;
4692 case DMX_TSIF_FILE0:
4693 ePktDmx = E_DRVTSP_PKTSRC_DEMUXFILE;
4694 bBlockEnable = TRUE;
4695 break;
4696 case DMX_TSIF_FILE1:
4697 bBlockEnable = TRUE;
4698 ePktDmx = E_DRVTSP_PKTSRC_DEMUX1;
4699 break;
4700 case DMX_TSIF_LIVE1:
4701 ePktDmx = E_DRVTSP_PKTSRC_DEMUX1;
4702 break;
4703 case DMX_TSIF_FILE2:
4704 bBlockEnable = TRUE;
4705 ePktDmx = E_DRVTSP_PKTSRC_DEMUX2;
4706 break;
4707 case DMX_TSIF_LIVE2:
4708 ePktDmx = E_DRVTSP_PKTSRC_DEMUX2;
4709 break;
4710 default:
4711 return DMX_FILTER_STATUS_ERROR;
4712 }
4713 MDrv_TSP_PVR_BlockEnable(Eng, bBlockEnable);
4714
4715 _pdmx_res->_u32PVREngSrc[Eng] = (MS_U32)ePktDmx;
4716
4717 // For Drvtsp3 and except of PVR_CB, just select PVR source directly.
4718 // For Drvtsp and Drvtsp3 PVR_CB, must set PVR flowset depnend on live flowset
4719 #if defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0)
4720 if(Eng == DMX_PVR_EGN2) //PVRCB only
4721 {
4722 #endif //end of DRVTSP3 define
4723
4724 switch(ePvrSrcTSIf)
4725 {
4726 case DMX_TSIF_LIVE0:
4727 DmxFlowOrg = DMX_FLOW_PLAYBACK;
4728 break;
4729 case DMX_TSIF_LIVE1:
4730 DmxFlowOrg = DMX_FLOW_PLAYBACK1;
4731 break;
4732 case DMX_TSIF_LIVE2:
4733 DmxFlowOrg = DMX_FLOW_PLAYBACK2;
4734 break;
4735 default:
4736 return DMX_FILTER_STATUS_ERROR;
4737 }
4738
4739 #if(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
4740
4741 if(Eng == DMX_PVR_EGN0)
4742 {
4743 if(bDscmbRec)
4744 {
4745 // for napoli, if PVRCA path soruce is from TSIF1, not need to duplicate FLT0 Pid, and just set dscmb path
4746 // and just open PVR filter with MApi_DMX_Pvr_Pid_Open/MApi_DMX_Pvr_Pid_Close
4747 if(ePvrSrcTSIf == DMX_TSIF_LIVE1)
4748 {
4749 DmxFlowNew = DMX_FLOW_PVR;
4750 }
4751 else
4752 {
4753 MDrv_TSP_Dscmb_Path(0, &DscmbPath, FALSE);
4754
4755 //Already TS1 input, just set dscmb path
4756 // and just open PVR filter with MApi_DMX_Pvr_Pid_Open/MApi_DMX_Pvr_Pid_Close
4757 if(DscmbPath & E_DRVTSP_CA_INPUT_TSIF1)
4758 {
4759 DmxFlowNew = DMX_FLOW_PVR;
4760 }
4761 else
4762 {
4763 DmxFlowNew = DMX_FLOW_PVRCA;
4764 }
4765 }
4766 }
4767 else
4768 {
4769 DmxFlowNew = DMX_FLOW_PVR;
4770 }
4771 }
4772 else if(Eng == DMX_PVR_EGN1)
4773 {
4774 if(bDscmbRec)
4775 {
4776 // for napoli, if PVRCA path soruce is from TSIF0, just set dscmb path
4777 // and just open PVR filter with MApi_DMX_Pvr_Pid_Open/MApi_DMX_Pvr_Pid_Close
4778 if(ePvrSrcTSIf == DMX_TSIF_LIVE0)
4779 {
4780 DmxFlowNew = DMX_FLOW_PVR1;
4781 }
4782 else
4783 {
4784 DmxFlowNew = DMX_FLOW_PVRCA1; //napoli u03 only
4785 }
4786 }
4787 else
4788 {
4789 DmxFlowNew = DMX_FLOW_PVR1;
4790 }
4791 }
4792 #endif //End of TSP_VER_1_0
4793
4794 if(_MApi_DMX_Get_FlowInput_Status(DmxFlowOrg, &FlowInput, &bClkInv, &bExtSync, &bParallel) != DMX_FILTER_STATUS_OK)
4795 {
4796 return DMX_FILTER_STATUS_ERROR;
4797 }
4798
4799 if(_MApi_DMX_FlowSet(DmxFlowNew, FlowInput, bClkInv, bExtSync, bParallel) == DMX_FILTER_STATUS_ERROR)
4800 {
4801 return DMX_FILTER_STATUS_ERROR;
4802 }
4803 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
4804 if(bDscmbRec)
4805 {
4806 if(Eng == DMX_PVR_EGN0)
4807 {
4808 // for napoli, if PVRCA path soruce is from TSIF1, not need to duplicate FLT0 Pid, and just set dscmb path
4809 // and just open PVR filter with MApi_DMX_Pvr_Pid_Open/MApi_DMX_Pvr_Pid_Close
4810 if(ePvrSrcTSIf == DMX_TSIF_LIVE1)
4811 {
4812 _DMX_FlowSet(DMX_FLOW_PVR, FlowInput, bClkInv, bExtSync, bParallel); //set TSIF1 for CA input
4813 DscmbPath = E_DRVTSP_CA_INPUT_TSIF1|E_DRVTSP_CA_OUTPUT_REC0;
4814 MDrv_TSP_Dscmb_Path(0, &DscmbPath, TRUE);
4815 }
4816 else
4817 {
4818 MDrv_TSP_Dscmb_Path(0, &DscmbPath, FALSE);
4819
4820 //Already TS1 input, just set dscmb path
4821 // and just open PVR filter with MApi_DMX_Pvr_Pid_Open/MApi_DMX_Pvr_Pid_Close
4822 if(DscmbPath & E_DRVTSP_CA_INPUT_TSIF1)
4823 {
4824 _DMX_FlowSet(DMX_FLOW_PVR, FlowInput, bClkInv, bExtSync, bParallel);
4825 DscmbPath |= E_DRVTSP_CA_OUTPUT_REC0;
4826 MDrv_TSP_Dscmb_Path(0, &DscmbPath, TRUE);
4827 }
4828 }
4829 }
4830 else if(Eng == DMX_PVR_EGN1)
4831 {
4832 // for napoli, if PVRCA path soruce is from TSIF0, just set dscmb path
4833 // and just open PVR filter with MApi_DMX_Pvr_Pid_Open/MApi_DMX_Pvr_Pid_Close
4834 if(ePvrSrcTSIf == DMX_TSIF_LIVE0)
4835 {
4836 _DMX_FlowSet(DMX_FLOW_PVR, FlowInput, bClkInv, bExtSync, bParallel); //set TSIF1 for CA input
4837 DscmbPath = E_DRVTSP_CA_INPUT_TSIF1|E_DRVTSP_CA_OUTPUT_LIVE0|E_DRVTSP_CA_OUTPUT_TSIF2;
4838 MDrv_TSP_Dscmb_Path(0, &DscmbPath, TRUE);
4839 //ULOGD("DMX", "[%s][%d] DscmbPath 0x%lx \n", __FUNCTION__, __LINE__, DscmbPath);
4840 }
4841 }
4842 }
4843 #endif //End of TSP_VER_1_0
4844
4845 return DMX_FILTER_STATUS_OK;
4846
4847 #if defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0)
4848 }
4849
4850 _DMX_ENTRY();
4851
4852 MDrv_TSP_PVR_Eng_SelSrc((MS_U8)Eng, ePktDmx);
4853
4854 _DMX_RETURN(DMX_FILTER_STATUS_OK);
4855
4856 #endif
4857
4858 #else // For TSP_VER_4_0
4859
4860 _DMX_ENTRY();
4861
4862 if(_DMX_PVR_FlowSet(Eng, ePvrSrcTSIf, bDscmbRec) == FALSE)
4863 {
4864 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
4865 }
4866
4867 _DMX_RETURN(DMX_FILTER_STATUS_OK);
4868
4869 #endif // End of TSP_VER_4_0
4870 }
4871
4872 //-------------------------------------------------------------------------------------------------
4873 /// Open a demux filter
4874 /// @param DmxFltType \b IN: the filter information to allocate
4875 /// @param pu8DmxId \b OUT: the available demux filer Id
4876 /// @return DMX_FILTER_STATUS_OK - Success
4877 /// @return DMX_FILTER_STATUS_ERROR - Failure
4878 /// @note
4879 //-------------------------------------------------------------------------------------------------
_MApi_DMX_Open(DMX_FILTER_TYPE DmxFltType,MS_U32 * pu32DmxId)4880 DMX_FILTER_STATUS _MApi_DMX_Open(DMX_FILTER_TYPE DmxFltType, MS_U32* pu32DmxId)
4881 {
4882 _pdmx_res->_bIsDMXOpenCalled = TRUE;
4883
4884 if(_MApi_DMX_Open_Common(DmxFltType,pu32DmxId) == UTOPIA_STATUS_SUCCESS)
4885 {
4886 return DMX_FILTER_STATUS_OK;
4887 }
4888
4889 return DMX_FILTER_STATUS_ERROR;
4890 }
4891
_MApi_DMX_Open_Ex(DMX_FILTER_TYPE DmxFltType,MS_U32 * pu32DmxId)4892 DMX_FILTER_STATUS _MApi_DMX_Open_Ex(DMX_FILTER_TYPE DmxFltType, MS_U32* pu32DmxId)
4893 {
4894 _pdmx_res->_bIsDMXOpenExCalled = TRUE;
4895
4896 if(_MApi_DMX_Open_Common(DmxFltType,pu32DmxId) == UTOPIA_STATUS_SUCCESS)
4897 {
4898 return DMX_FILTER_STATUS_OK;
4899 }
4900
4901 return DMX_FILTER_STATUS_ERROR;
4902 }
4903
_MApi_DMX_Open_Common(DMX_FILTER_TYPE DmxFltType,MS_U32 * pu32DmxId)4904 DMX_FILTER_STATUS _MApi_DMX_Open_Common(DMX_FILTER_TYPE DmxFltType, MS_U32* pu32DmxId)
4905 {
4906 DMX_FILTER_STATUS eRet= DMX_FILTER_STATUS_ERROR;
4907 MS_U32 u32TSPFltSource;
4908 u32TSPFltSource = DmxFltType & DMX_FILTER_FLT_MASK;
4909 DmxFltType = DmxFltType & (DMX_FILTER_TYPE)(~DMX_FILTER_FLT_MASK);
4910
4911 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
4912 _DMX_OPEN_MIX_USED_CHECK();
4913 _DMX_ENTRY();
4914 switch (DmxFltType)
4915 {
4916 case DMX_FILTER_TYPE_VIDEO:
4917 case DMX_FILTER_TYPE_VIDEO3D:
4918 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
4919 case DMX_FILTER_TYPE_VIDEO3:
4920 case DMX_FILTER_TYPE_VIDEO4:
4921 case DMX_FILTER_TYPE_VIDEO5 ... DMX_FILTER_TYPE_VIDEO8:
4922 #endif
4923 case DMX_FILTER_TYPE_AUDIO:
4924 case DMX_FILTER_TYPE_AUDIO2:
4925 #if (!(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))) // For TSP_VER_3_0 and TSP_VER_4_0
4926 case DMX_FILTER_TYPE_AUDIO3:
4927 case DMX_FILTER_TYPE_AUDIO4:
4928 #endif
4929 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
4930 case DMX_FILTER_TYPE_AUDIO5 ... DMX_FILTER_TYPE_AUDIO6:
4931 #endif
4932 #if(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0))
4933 case DMX_FILTER_TYPE_SCMBCHK:
4934 #endif
4935 case DMX_FILTER_TYPE_REC:
4936 case DMX_FILTER_TYPE_PVR:
4937 case DMX_FILTER_TYPE_PVR1:
4938 case DMX_FILTER_TYPE_PVR2:
4939 case DMX_FILTER_TYPE_PVR3:
4940 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
4941 case DMX_FILTER_TYPE_PVR4 ... DMX_FILTER_TYPE_PVR9:
4942 #endif
4943 eRet= _DMX_Open_Stream(pu32DmxId, (DMX_FILTER_TYPE)(DmxFltType|u32TSPFltSource));
4944 break;
4945 case DMX_FILTER_TYPE_SECTION:
4946 case DMX_FILTER_TYPE_TELETEXT:
4947 case DMX_FILTER_TYPE_PES:
4948 case DMX_FILTER_TYPE_PACKET:
4949 case DMX_FILTER_TYPE_PCR:
4950 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
4951 case DMX_FILTER_TYPE_SECTION_NO_PUSI:
4952 case DMX_FILTER_TYPE_SECTION_VER:
4953 #endif
4954 eRet= _DMX_Open_Sect(pu32DmxId, (DMX_FILTER_TYPE)(DmxFltType|u32TSPFltSource));
4955 break;
4956
4957 default:
4958 DMX_ASSERT2(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad filter type %u\n", __LINE__, (unsigned int)DmxFltType)));
4959 break;
4960 }
4961 #if DMX_DEBUG
4962 stDmxDbgInfo[(*pu32DmxId)].u32TimeCreate = MsOS_GetSystemTime();
4963 if(u32DbgLogFlag & DMX_DBG_LOG_FLT_OPEN)
4964 {
4965 if(eRet == DMX_FILTER_STATUS_OK)
4966 dmx_dbg_print("[DMX OPEN]\tFlt[%03d] Type[%s]\n", (int)(*pu32DmxId), stDmxType[DmxFltType].str);
4967 else
4968 dmx_dbg_print("[DMX OPEN]\tFailed\n");
4969 }
4970 #endif
4971
4972 //ULOGD("DMX", "[OPEN] %d \n", (int)*pu8DmxId);
4973
4974 _DMX_RETURN(eRet);
4975 }
4976
4977 extern MS_U32 _u32TaskLine;
4978
4979 //-------------------------------------------------------------------------------------------------
4980 /// Close a demux filter
4981 /// @param u8DmxId \b IN: the demux filer Id to free
4982 /// @return DMX_FILTER_STATUS_OK - Success
4983 /// @return DMX_FILTER_STATUS_ERROR - Failure
4984 /// @note
4985 //-------------------------------------------------------------------------------------------------
_MApi_DMX_Close(MS_U32 u32DmxId)4986 DMX_FILTER_STATUS _MApi_DMX_Close(MS_U32 u32DmxId)
4987 {
4988 TSP_Result ret = (TSP_Result)DRVTSP_FAIL;
4989 MS_BOOL bPidFltReady = FALSE;
4990 MS_BOOL bPidReady = FALSE;
4991 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
4992 MS_BOOL bSecFltReady = FALSE;
4993 #endif
4994
4995 #if DMX_DEBUG
4996 MS_BOOL bMonitor = FALSE;
4997 #endif
4998
4999 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5000
5001 DMX_ASSERT(-1!=_pdmx_res->_Dmx_Mutex, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%s][%06d] Demux has been close, close Demux Id %d fail\n", __FUNCTION__, __LINE__, (int)u32DmxId)));
5002 DMX_ASSERT(DMX_MAX_FLTID > u32DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, (int)u32DmxId)));
5003
5004 #if DMX_DEBUG
5005 dmx_dbg_IsFltMonitor(u32DmxId, bMonitor);
5006 if((u32DbgLogFlag & DMX_DBG_LOG_FLT_CLOSE) && bMonitor)
5007 dmx_dbg_print("[DMX CLOSE]\tFlt[%03d]\n", (int)u32DmxId);
5008 #endif
5009 do
5010 {
5011 _DMX_ENTRY();
5012
5013 if(_pdmx_res->_FltList[u32DmxId].FltId == 0xFFFFFFFF)
5014 {
5015 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[%s][%d] Filte %d is already freed\n", __FUNCTION__, __LINE__, (int)u32DmxId));
5016 _DMX_RETURN(DMX_FILTER_STATUS_OK);
5017 }
5018
5019 if (FALSE == bPidReady)
5020 {
5021 if (DRVTSP_OK!= MDrv_TSP_PidFlt_SetPid(0, u32DmxId, DRVTSP_PID_NULL))
5022 {
5023 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[%s][%d] Try to set pid failed, Demux id: %d Filter Type: %d\n", __FUNCTION__, __LINE__, (int)u32DmxId, (unsigned int)_pdmx_res->_FltList[u32DmxId].DmxFltType));
5024 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
5025 }
5026 _FLT_LIST_PID_SET(u32DmxId, DRVTSP_PID_NULL);
5027 bPidReady = TRUE;
5028 }
5029
5030 if (FALSE == bPidFltReady)
5031 {
5032 if (DRVTSP_OK != MDrv_TSP_PidFlt_Free(0, u32DmxId))
5033 {
5034 #if defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0))
5035 DMX_DBGMSG(DMX_DBG_WARN, ULOGE("DMX", "[%s][%d] Try to close filter %d fail -> TSP task line %d\n", __FUNCTION__, __LINE__, (int)u32DmxId, (int)_u32TaskLine));
5036 #else
5037 extern MS_U32 MDrv_TSP_DBG_TaskLine(void);
5038 DMX_DBGMSG(DMX_DBG_WARN, ULOGE("DMX", "[%s][%d] Try to close filter %d fail -> TSP task line %d\n", __FUNCTION__, __LINE__, (int)u32DmxId, (int)MDrv_TSP_DBG_TaskLine()));
5039 #endif
5040 goto release_mutex;
5041 }
5042 bPidFltReady = TRUE;
5043 }
5044
5045 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
5046 if (FALSE == bSecFltReady)
5047 {
5048 if (0xFFFFFFFF != _pdmx_res->_FltList[u32DmxId].SecBufId)
5049 {
5050 if (DRVTSP_OK!= MDrv_TSP_SecFlt_Free(0, _pdmx_res->_FltList[u32DmxId].SecBufId))
5051 {
5052 goto release_mutex;
5053 }
5054 bSecFltReady = TRUE;
5055 }
5056 }
5057 #endif
5058
5059 _FLT_LIST_REMOVE(u32DmxId);
5060
5061 ret = (TSP_Result)DRVTSP_OK;
5062 release_mutex:
5063 MsOS_ReleaseMutex(_pdmx_res->_Dmx_Mutex);
5064 if ((TSP_Result)DRVTSP_OK != ret)
5065 {
5066 return DMX_FILTER_STATUS_ERROR;
5067 //MsOS_DelayTask(4);
5068 }
5069 } while (DRVTSP_OK != ret);
5070
5071 //ULOGD("DMX", "[CLOSE] %d \n", (int)u8DmxId);
5072
5073 return DMX_FILTER_STATUS_OK;
5074 }
5075
5076 //-------------------------------------------------------------------------------------------------
5077 /// Activate a demux filter
5078 /// @param u8DmxId \b IN: the demux filer Id to activate
5079 /// @return DMX_FILTER_STATUS_OK - Success
5080 /// @return DMX_FILTER_STATUS_ERROR - Failure
5081 /// @note
5082 //-------------------------------------------------------------------------------------------------
_MApi_DMX_Start(MS_U32 u32DmxId)5083 DMX_FILTER_STATUS _MApi_DMX_Start(MS_U32 u32DmxId)
5084 {
5085
5086 #if DMX_DEBUG
5087 MS_BOOL bMonitor = FALSE;
5088 #endif
5089
5090 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5091
5092 DMX_ASSERT(DMX_MAX_FLTID> u32DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, (int)u32DmxId)));
5093
5094 #if DMX_DEBUG
5095 dmx_dbg_IsFltMonitor(u32DmxId, bMonitor);
5096 if((u32DbgLogFlag & DMX_DBG_LOG_FLT_ENABLE) && bMonitor)
5097 dmx_dbg_print("[DMX ENABLE]\tFlt[%03d]\n", (MS_S32)u32DmxId);
5098 #endif
5099
5100 _DMX_ENTRY();
5101
5102 MDrv_TSP_PidFlt_Enable(0, u32DmxId, TRUE);
5103
5104 _DMX_RETURN(DMX_FILTER_STATUS_OK);
5105 }
5106
5107 //-------------------------------------------------------------------------------------------------
5108 /// Deactivate a demux filter
5109 /// @param u8DmxId \b IN: the demux filer Id to deactivate
5110 /// @return DMX_FILTER_STATUS_OK - Success
5111 /// @return DMX_FILTER_STATUS_ERROR - Failure
5112 /// @note
5113 //-------------------------------------------------------------------------------------------------
_MApi_DMX_Stop(MS_U32 u32DmxId)5114 DMX_FILTER_STATUS _MApi_DMX_Stop(MS_U32 u32DmxId)
5115 {
5116 #if DMX_DEBUG
5117 MS_BOOL bMonitor = FALSE;
5118 #endif
5119
5120 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5121
5122 DMX_ASSERT((DMX_MAX_FLTID > u32DmxId), DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, (int)u32DmxId)));
5123
5124 #if DMX_DEBUG
5125 dmx_dbg_IsFltMonitor(u32DmxId, bMonitor);
5126 if((u32DbgLogFlag & DMX_DBG_LOG_FLT_ENABLE) && bMonitor)
5127 dmx_dbg_print("[DMX DISABLE]\tFlt[%03d]\n", u32DmxId;
5128 #endif
5129
5130 _DMX_ENTRY();
5131
5132 MDrv_TSP_PidFlt_Enable(0, u32DmxId, FALSE);
5133
5134 _DMX_RETURN(DMX_FILTER_STATUS_OK);
5135 }
5136
5137 //-------------------------------------------------------------------------------------------------
5138 /// Get a demux filter status
5139 /// @param u32DmxId \b IN: the demux filer Id to activate
5140 /// @param pbEnable \b OUT: the demux filer enable/disable
5141 /// @return DMX_FILTER_STATUS_OK - Success
5142 /// @return DMX_FILTER_STATUS_ERROR - Failure
5143 /// @note
5144 //-------------------------------------------------------------------------------------------------
5145 DMX_FILTER_STATUS _MApi_DMX_IsStart(MS_U32 u32DmxId, MS_BOOL* pbEnable)
5146 {
5147 #if defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0))
5148
5149 DrvTSP_FltState ePidState = E_DRVTSP_FLT_STATE_FREE;
5150 DrvTSP_FltState eSecState = E_DRVTSP_FLT_STATE_FREE;
5151
5152 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5153 DMX_ASSERT(DMX_MAX_FLTID> u32DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, (int)u32DmxId)));
5154
5155 if ((DRVTSP_OK != MDrv_TSP_PidFlt_GetState(0, u32DmxId, &ePidState)))
5156 {
5157 return DMX_FILTER_STATUS_ERROR;
5158 }
5159
5160 if(_pdmx_res->_FltList[u32DmxId].SecBufId < 0xFFFFFFFF)
5161 {
5162 if ((DRVTSP_OK != MDrv_TSP_SecFlt_GetState(0, _pdmx_res->_FltList[u32DmxId].SecBufId, &eSecState)))
5163 {
5164 return DMX_FILTER_STATUS_ERROR;
5165 }
5166 }
5167 *pbEnable = ((ePidState|eSecState) & E_DRVTSP_FLT_STATE_ENABLE)? TRUE: FALSE;
5168
5169 #else // For TSP_VER_4_0
5170
5171 TSP_FltState state;
5172
5173 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5174 DMX_ASSERT(DMX_MAX_FLTID> u32DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, u32DmxId)));
5175
5176 if ( DRVTSP_OK != MDrv_TSP_FLT_GetState(_pdmx_res->_FltList[u32DmxId].FltId, &state) )
5177 {
5178 return DMX_FILTER_STATUS_ERROR;
5179 }
5180
5181 *pbEnable = (state & E_TSP_FLT_STATE_ENABLE) ? TRUE : FALSE;
5182
5183 #endif
5184
5185 return DMX_FILTER_STATUS_OK;
5186 }
5187
5188 //-------------------------------------------------------------------------------------------------
5189 /// Get PID filter scramble status
5190 /// @param FltSrc \b IN : Filter source
5191 /// @param u32FltGroupId \b IN : Pid filter group id, every 32 filter for 1 group. 0: filter 0~31, 1: 32~63, 2: 64~95, 3: 96~127
5192 /// @param PidFltId \b IN : Pid filter id for getting. If 0xFFFFFFFF, means getting the status of all filters of the same group
5193 /// @param pu32ScmbSts \b OUT : The scrmabling status of pid filter. If getting all group status, every bit means one status of every filter
5194 /// If only checking one filter, 1 means scrambled status and 0 means non-scrambled status
5195 /// @return TSP_Result
5196 /// @note
5197 //-------------------------------------------------------------------------------------------------
5198 DMX_FILTER_STATUS _MApi_DMX_Get_FltScmbSts(DMX_FILTER_TYPE FltSrc, MS_U32 u32FltGroupId, MS_U32 PidFltId, MS_U32 *pu32ScmbSts)
5199 {
5200 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5201
5202 MS_U32 u32TSPFltSource;
5203 MS_U32 u32GroupId;
5204
5205 u32TSPFltSource = FltSrc & ((MS_U32)DMX_FILTER_FLT_MASK);
5206
5207 if( PidFltId == 0xFFFFFFFF)
5208 {
5209 u32GroupId = u32FltGroupId;
5210 }
5211 else
5212 {
5213 u32GroupId = PidFltId >> 5;
5214 }
5215
5216 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
5217 u32TSPFltSource = _DMX_ApiDrv_FltSrcMapping(u32TSPFltSource);
5218 #endif
5219
5220 if(MDrv_TSP_PidFlt_GetScmbSts( (DrvTSP_FltType)u32TSPFltSource, u32GroupId, PidFltId, pu32ScmbSts) == DRVTSP_OK)
5221 {
5222 return DMX_FILTER_STATUS_OK;
5223 }
5224
5225 return DMX_FILTER_STATUS_ERROR;
5226 }
5227
5228 //-------------------------------------------------------------------------------------------------
5229 /// Get the PES scrambling control status
5230 /// @param u32DmxId \b IN: the demux filer Id
5231 /// @param pu8scmb \b OUT: the PES scrambling status. bit 0~ bit3, Every bit indicates one status of one packet. bit4 ~ bit7, packet count
5232 /// @return DMX_FILTER_STATUS_OK - Success
5233 /// @return DMX_FILTER_STATUS_ERROR - Failure
5234 /// @note
5235 /// Must open and start filter with DMX_FILTER_TYPE_PACKET type and DMX_SECT_MODE_PESSCMCHK mode
5236 //-------------------------------------------------------------------------------------------------
5237 DMX_FILTER_STATUS _MApi_DMX_Get_PesScmbSts(MS_U32 u32DmxId, MS_U8* pu8scmb)
5238 {
5239 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
5240
5241 if (DRVTSP_OK == MDrv_TSP_GetPesScmbSts(u32DmxId, pu8scmb))
5242 {
5243 return DMX_FILTER_STATUS_OK;
5244 }
5245 #endif
5246
5247 return DMX_FILTER_STATUS_ERROR;
5248 }
5249
5250 //-------------------------------------------------------------------------------------------------
5251 /// Get the TS scrambling control status
5252 /// @param u8DmxId \b IN: the demux filer Id
5253 /// @param pu8ScmSts \b OUT: TS scrambling status. bit 0~ bit3, Every bit indicates one status of one packet. bit4 ~ bit7, packet count
5254 /// @return DMX_FILTER_STATUS_OK - Success
5255 /// @return DMX_FILTER_STATUS_ERROR - Failure
5256 /// @note
5257 /// Must open and start filter with DMX_FILTER_TYPE_PACKET type and DMX_SECT_MODE_PESSCMCHK mode
5258 //-------------------------------------------------------------------------------------------------
5259 DMX_FILTER_STATUS _MApi_DMX_Get_TsScmbSts(MS_U32 u32DmxId, MS_U8* pu8ScmSts)
5260 {
5261 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
5262
5263 if (DRVTSP_OK != MDrv_TSP_GetTsScmbSts(u32DmxId, pu8ScmSts))
5264 {
5265 return DMX_FILTER_STATUS_ERROR;
5266 }
5267 #else
5268 return DMX_FILTER_STATUS_ERROR;
5269 #endif
5270
5271 return DMX_FILTER_STATUS_OK;
5272 }
5273
5274 //-------------------------------------------------------------------------------------------------
5275 /// Get demux alive
5276 /// @return DMX_FILTER_STATUS_OK - Success
5277 /// @return DMX_FILTER_STATUS_ERROR - Failure
5278 /// @note
5279 //-------------------------------------------------------------------------------------------------
5280 DMX_FILTER_STATUS _MApi_DMX_ChkAlive(void)
5281 {
5282 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5283
5284 if (MDrv_TSP_Alive(0) == DRVTSP_OK)
5285 {
5286 return DMX_FILTER_STATUS_OK;
5287 }
5288 return DMX_FILTER_STATUS_ERROR;
5289 }
5290
5291 //-------------------------------------------------------------------------------------------------
5292 /// Get a demux filter information
5293 /// @param u8DmxId \b IN: the demux filer Id to activate
5294 /// @param pDmxFltInfo \b OUT: the demux filer info
5295 /// @param pDmxFltType \b OUT: the demux filer type
5296 /// @param bSet \b IN: set/get
5297 /// @return DMX_FILTER_STATUS_OK - Success
5298 /// @return DMX_FILTER_STATUS_ERROR - Failure
5299 /// @note
5300 //-------------------------------------------------------------------------------------------------
5301 DMX_FILTER_STATUS _MApi_DMX_Info(MS_U32 u32DmxId, DMX_Flt_info* pDmxFltInfo, DMX_FILTER_TYPE* pDmxFltType, MS_BOOL bSet)
5302 {
5303 _DMX_INFO_MIX_USED_CHECK(FALSE);
5304 MS_BOOL bRet = FALSE;
5305
5306 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5307 DMX_ASSERT(DMX_MAX_FLTID> u32DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, (int)u32DmxId)));
5308
5309 _DMX_ENTRY();
5310
5311 if (!bSet)
5312 {
5313 _FLT_LIST_INFO_GET(u32DmxId, pDmxFltInfo);
5314 _FLT_LIST_TYPE_GET(u32DmxId, pDmxFltType);
5315 _DMX_RETURN(DMX_FILTER_STATUS_OK);
5316 }
5317
5318 //ULOGD("DMX", "[%s] DmxID [%d]\n",__FUNCTION__, u8DmxId);
5319 //ULOGD("DMX", "[%s] FltType [%d]\n",__FUNCTION__, _pdmx_res->_FltList[u8DmxId].DmxFltType);
5320 //ULOGD("DMX", "[%s] callback [%d]\n",__FUNCTION__, (MS_U32)(pDmxFltInfo->Info.SectInfo.pNotify));
5321
5322 switch(_pdmx_res->_FltList[u32DmxId].DmxFltType)
5323 {
5324 case DMX_FILTER_TYPE_VIDEO:
5325 case DMX_FILTER_TYPE_VIDEO3D:
5326 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
5327 case DMX_FILTER_TYPE_VIDEO3:
5328 case DMX_FILTER_TYPE_VIDEO4:
5329 case DMX_FILTER_TYPE_VIDEO5 ... DMX_FILTER_TYPE_VIDEO8:
5330 #endif
5331 case DMX_FILTER_TYPE_AUDIO:
5332 case DMX_FILTER_TYPE_AUDIO2:
5333 #if (!(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))) // For TSP_VER_3_0 and TSP_VER_4_0
5334 case DMX_FILTER_TYPE_AUDIO3:
5335 case DMX_FILTER_TYPE_AUDIO4:
5336 #endif
5337 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
5338 case DMX_FILTER_TYPE_AUDIO5 ... DMX_FILTER_TYPE_AUDIO6:
5339 #endif
5340 bRet= _DMX_InfoSet_Stream(u32DmxId, pDmxFltInfo);
5341 break;
5342 case DMX_FILTER_TYPE_SECTION:
5343 case DMX_FILTER_TYPE_TELETEXT:
5344 case DMX_FILTER_TYPE_PES:
5345 case DMX_FILTER_TYPE_PACKET:
5346 case DMX_FILTER_TYPE_PCR:
5347 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
5348 case DMX_FILTER_TYPE_SECTION_NO_PUSI:
5349 case DMX_FILTER_TYPE_SECTION_VER:
5350 #endif
5351
5352 #if DMX_DEBUG
5353 if(u32DbgLogFlag & DMX_DBG_LOG_FLT_INFO)
5354 {
5355 DMX_Sect_info* pInfo = &(pDmxFltInfo->Info.SectInfo);
5356
5357 dmx_dbg_print("[DMX INFO]\tFlt[%03d] addr[0x%x] size[0x%x] secMode[0x%x] event[0x%x]\n",
5358 u32DmxId,
5359 (MS_U32)pInfo->SectBufAddr,
5360 pInfo->SectBufSize,
5361 (MS_U32)pInfo->SectMode,
5362 (MS_U32)pInfo->Event);
5363 }
5364 #endif
5365 {
5366 DMX_InfoSet stDmxFltInfo;
5367 memset(&(stDmxFltInfo),0,sizeof(DMX_InfoSet));
5368 stDmxFltInfo.bEx = FALSE;
5369 stDmxFltInfo.u32InfoSetSize = sizeof(DMX_InfoSet);
5370 stDmxFltInfo.DmxFltType = *pDmxFltType;
5371 memcpy(&(stDmxFltInfo.DmxInfo.SectInfo), &(pDmxFltInfo->Info.SectInfo), sizeof(DMX_Sect_info));
5372 bRet= _DMX_InfoSet_Sect(u32DmxId, &stDmxFltInfo);
5373
5374 }
5375 break;
5376
5377 default:
5378 DMX_ASSERT2(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad filter type %d\n", __LINE__, (unsigned int)_pdmx_res->_FltList[u32DmxId].DmxFltType)));
5379 break;
5380 }
5381
5382 if (bRet)
5383 {
5384 _DMX_RETURN(DMX_FILTER_STATUS_OK);
5385 }
5386 else
5387 {
5388 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
5389 }
5390 }
5391
5392 DMX_FILTER_STATUS _MApi_DMX_Info_Ex(MS_U32 u32DmxId, DMX_Flt_info_Ex* pDmxFltInfo)
5393 {
5394 _DMX_INFO_MIX_USED_CHECK(TRUE);
5395 MS_BOOL bRet = FALSE;
5396 ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__);
5397
5398 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5399 DMX_ASSERT(DMX_MAX_FLTID> u32DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, (int)u32DmxId)));
5400
5401 _DMX_ENTRY();
5402
5403 if (!pDmxFltInfo->bSet)
5404 {
5405 _FLT_LIST_INFO_GET_Ex(u32DmxId, pDmxFltInfo);
5406 _FLT_LIST_TYPE_GET(u32DmxId, &(pDmxFltInfo->DmxFltType));
5407 _DMX_RETURN(DMX_FILTER_STATUS_OK);
5408 }
5409
5410 //ULOGD("DMX", "[%s] FltType [%lx]\n",__FUNCTION__, (pDmxFltInfo->DmxFltType));
5411 //ULOGD("DMX", "[%s] event [%lx]\n",__FUNCTION__, (MS_U32)(pDmxFltInfo->SectInfoEx.Event));
5412 //ULOGD("DMX", "[%s] mode [%d]\n",__FUNCTION__, (MS_U32)(pDmxFltInfo->SectInfoEx.SectMode));
5413
5414 switch(_pdmx_res->_FltList[u32DmxId].DmxFltType)
5415 {
5416 case DMX_FILTER_TYPE_SECTION:
5417 case DMX_FILTER_TYPE_TELETEXT:
5418 case DMX_FILTER_TYPE_PES:
5419 case DMX_FILTER_TYPE_PACKET:
5420 case DMX_FILTER_TYPE_PCR:
5421 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
5422 case DMX_FILTER_TYPE_SECTION_NO_PUSI:
5423 case DMX_FILTER_TYPE_SECTION_VER:
5424 #endif
5425
5426 {
5427 DMX_InfoSet stDmxFltInfo;
5428 memset(&(stDmxFltInfo),0,sizeof(DMX_InfoSet));
5429 stDmxFltInfo.bEx = TRUE;
5430 stDmxFltInfo.u32InfoSetSize = sizeof(DMX_InfoSet);
5431 stDmxFltInfo.DmxFltType = pDmxFltInfo->DmxFltType;
5432 memcpy(&(stDmxFltInfo.DmxInfo.SectInfoEx), &(pDmxFltInfo->SectInfoEx), sizeof(DMX_Sect_info_Ex));
5433 bRet= _DMX_InfoSet_Sect(u32DmxId, &stDmxFltInfo);
5434 break;
5435 }
5436 default:
5437 DMX_ASSERT2(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad filter type %d\n", __LINE__, (unsigned int)_pdmx_res->_FltList[u32DmxId].DmxFltType)));
5438 break;
5439 }
5440
5441 if (bRet)
5442 {
5443 _DMX_RETURN(DMX_FILTER_STATUS_OK);
5444 }
5445 else
5446 {
5447 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
5448 }
5449 }
5450
5451 //-------------------------------------------------------------------------------------------------
5452 /// Set a demux filter PID
5453 /// @param u32DmxId \b IN: the demux filer Id to set
5454 /// @param pu16Pid \b IN/OUT: PID to set
5455 /// @param bSet \b IN: set/get
5456 /// @return DMX_FILTER_STATUS_OK - Success
5457 /// @return DMX_FILTER_STATUS_ERROR - Failure
5458 /// @note
5459 //-------------------------------------------------------------------------------------------------
5460 DMX_FILTER_STATUS _MApi_DMX_Pid(MS_U32 u32DmxId, MS_U16* pu16Pid, MS_BOOL bSet)
5461 {
5462 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5463 DMX_ASSERT(DMX_MAX_FLTID > u32DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, (unsigned int)u32DmxId)));
5464
5465 if (bSet)
5466 {
5467 #if DMX_DEBUG
5468 if(u32DbgLogFlag & DMX_DBG_LOG_FLT_PID)
5469 dmx_dbg_print("[DMX PID]\tFlt[%03d] PID[0x%X]\n", (MS_S32)u32DmxId, (MS_U32)(*pu16Pid));
5470 #endif
5471 //ULOGD("DMX", ("[%s] fltid: [%d], pid : [0x%x] time %ld\n",__FUNCTION__,(int)u8DmxId, *pu16Pid, MsOS_GetSystemTime());
5472 MDrv_TSP_PidFlt_SetPid(0, u32DmxId, *pu16Pid);
5473 _FLT_LIST_PID_SET(u32DmxId, *pu16Pid);
5474 }
5475 else
5476 {
5477 _FLT_LIST_PID_GET(u32DmxId, *pu16Pid);
5478 }
5479 return DMX_FILTER_STATUS_OK;
5480 }
5481
5482 //-------------------------------------------------------------------------------------------------
5483 /// Set demux filer match patterns
5484 /// @param u8DmxId \b IN: the target demux filer Id
5485 /// @param pPattern \b IN: the match patterns
5486 /// @param pMask \b IN: the bit mask for match patterns
5487 /// @param pu8NotMask \b IN: the bit mask for negative match patterns
5488 /// @param MatchSize \b IN: the size in bytes for match patterns.
5489 /// @return DMX_FILTER_STATUS_OK - Success
5490 /// @return DMX_FILTER_STATUS_ERROR - Failure
5491 /// @note
5492 /// The match pattern size is 16 bytes
5493 /// match mask -- must set 1 to be compare (customer request)
5494 /// not match mask -- must set 1 to compare
5495 //-------------------------------------------------------------------------------------------------
5496 DMX_FILTER_STATUS _MApi_DMX_SectPatternSet(MS_U32 u32DmxId, MS_U8* pPattern, MS_U8* pMask, MS_U8 *pu8NotMask, MS_U32 MatchSize)
5497 {
5498 MS_U8 Pattern[DRVTSP_FILTER_DEPTH], Mask[DRVTSP_FILTER_DEPTH], NMatchMask[DRVTSP_FILTER_DEPTH];
5499
5500 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5501
5502 DMX_ASSERT(DMX_MAX_FLTID > u32DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, (int)u32DmxId)));
5503 DMX_ASSERT(0xFFFFFFFF > _pdmx_res->_FltList[u32DmxId].SecBufId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Demux id has not been opened yet %d\n", __LINE__, (int)u32DmxId)));
5504 DMX_ASSERT(DRVTSP_FILTER_DEPTH>= MatchSize,
5505 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Section filter match size\n", __LINE__)));
5506
5507 _DMX_ENTRY();
5508
5509 memset(Pattern, 0, DRVTSP_FILTER_DEPTH);
5510 memset(Mask, 0, DRVTSP_FILTER_DEPTH);
5511 memset(NMatchMask, 0, DRVTSP_FILTER_DEPTH);
5512 memcpy(Pattern, pPattern, MatchSize);
5513 memcpy(Mask, pMask, MatchSize);
5514 memcpy(NMatchMask, pu8NotMask, MatchSize);
5515 MDrv_TSP_SecFlt_SetPattern(0, _pdmx_res->_FltList[u32DmxId].SecBufId, Pattern, Mask, NMatchMask);
5516 _DMX_RETURN (DMX_FILTER_STATUS_OK);
5517 }
5518
5519 //-------------------------------------------------------------------------------------------------
5520 /// Reset demux filer buffer
5521 /// @param u8DmxId \b IN: the target demux filer Id
5522 /// @return DMX_FILTER_STATUS_OK - Success
5523 /// @return DMX_FILTER_STATUS_ERROR - Failure
5524 /// @note
5525 //-------------------------------------------------------------------------------------------------
5526 DMX_FILTER_STATUS _MApi_DMX_SectReset(MS_U32 u32DmxId)
5527 {
5528 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5529 _DMX_ENTRY();
5530 DMX_ASSERT2(DMX_MAX_FLTID > u32DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, (int)u32DmxId)));
5531 DMX_ASSERT2(0xFFFFFFFF > _pdmx_res->_FltList[u32DmxId].SecBufId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] No section buffer, Demux Id %d\n", __LINE__, (int)u32DmxId)));
5532 MDrv_TSP_SecFlt_ResetBuffer(0, _pdmx_res->_FltList[u32DmxId].SecBufId);
5533 _DMX_RETURN(DMX_FILTER_STATUS_OK);
5534 }
5535
5536 //-------------------------------------------------------------------------------------------------
5537 /// Set the read pointer of demux filer buffer
5538 /// @param u8DmxId \b IN: the target demux filer Id
5539 /// @param Read \b IN: the read pointer to be set
5540 /// @return DMX_FILTER_STATUS_OK - Success
5541 /// @return DMX_FILTER_STATUS_ERROR - Failure
5542 /// @note
5543 //-------------------------------------------------------------------------------------------------
5544 DMX_FILTER_STATUS _MApi_DMX_SectReadSet(MS_U32 u32DmxId, MS_PHY Read)
5545 {
5546 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5547
5548 _DMX_ENTRY();
5549 DMX_ASSERT2(DMX_MAX_FLTID > u32DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGD("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, (int)u32DmxId)));
5550 MDrv_TSP_SecFlt_SetReadAddr(0, _pdmx_res->_FltList[u32DmxId].SecBufId, Read);
5551 _DMX_RETURN(DMX_FILTER_STATUS_OK);
5552 }
5553
5554 //-------------------------------------------------------------------------------------------------
5555 /// Get the read pointer of demux filer buffer
5556 /// @param u8DmxId \b IN: the target demux filer Id
5557 /// @param pRead \b OUT: the pointer to store the obtained read pointer
5558 /// @return DMX_FILTER_STATUS_OK - Success
5559 /// @return DMX_FILTER_STATUS_ERROR - Failure
5560 /// @note
5561 //-------------------------------------------------------------------------------------------------
5562 DMX_FILTER_STATUS _MApi_DMX_SectReadGet(MS_U32 u32DmxId, MS_PHY* pRead)
5563 {
5564 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5565
5566 DMX_ASSERT(DMX_MAX_FLTID > u32DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, (int)u32DmxId)));
5567
5568 if(_pdmx_res->_FltList[u32DmxId].FltId == 0xFFFFFFFF)
5569 {
5570 //DMX_DBGMSG(DMX_DBG_ERR, ULOGD("DMX", "[%s][%d] Filte %d is already freed\n", __FUNCTION__, __LINE__, (int)u8DmxId));
5571 return DMX_FILTER_STATUS_ERROR;
5572 }
5573
5574 if (DRVTSP_OK != MDrv_TSP_SecFlt_GetReadAddr(0, _pdmx_res->_FltList[u32DmxId].SecBufId, pRead))
5575 {
5576 return DMX_FILTER_STATUS_ERROR;
5577 }
5578 return DMX_FILTER_STATUS_OK;
5579 }
5580
5581 //-------------------------------------------------------------------------------------------------
5582 /// Get the write pointer of demux filer buffer
5583 /// @param u8DmxId \b IN: the target demux filer Id
5584 /// @param pWrite \b OUT: the pointer to store the obtained write pointer
5585 /// @return DMX_FILTER_STATUS_OK - Success
5586 /// @return DMX_FILTER_STATUS_ERROR - Failure
5587 /// @note
5588 //-------------------------------------------------------------------------------------------------
5589 DMX_FILTER_STATUS _MApi_DMX_SectWriteGet(MS_U32 u32DmxId, MS_PHY* pWrite)
5590 {
5591 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5592
5593 DMX_ASSERT(DMX_MAX_FLTID > u32DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, (int)u32DmxId)));
5594
5595 if(_pdmx_res->_FltList[u32DmxId].FltId == 0xFFFFFFFF)
5596 {
5597 //DMX_DBGMSG(DMX_DBG_ERR, ULOGD("DMX", "[%s][%d] Filte %d is already freed\n", __FUNCTION__, __LINE__, (int)u8DmxId));
5598 return DMX_FILTER_STATUS_ERROR;
5599 }
5600
5601 if (DRVTSP_OK != MDrv_TSP_SecFlt_GetWriteAddr(0, _pdmx_res->_FltList[u32DmxId].SecBufId, pWrite))
5602 {
5603 return DMX_FILTER_STATUS_ERROR;
5604 }
5605 return DMX_FILTER_STATUS_OK;
5606 }
5607
5608 //-------------------------------------------------------------------------------------------------
5609 /// Get the start pointer of demux filer buffer
5610 /// @param u8DmxId \b IN: the target demux filer Id
5611 /// @param pStart \b OUT: the pointer to store the obtained start pointer
5612 /// @return DMX_FILTER_STATUS_OK - Success
5613 /// @return DMX_FILTER_STATUS_ERROR - Failure
5614 /// @note
5615 //-------------------------------------------------------------------------------------------------
5616 DMX_FILTER_STATUS _MApi_DMX_SectStartGet(MS_U32 u32DmxId, MS_PHY* pStart)
5617 {
5618 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5619 DMX_ASSERT(DMX_MAX_FLTID > u32DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, (int)u32DmxId)));
5620
5621 if(_pdmx_res->_FltList[u32DmxId].FltId == 0xFFFFFFFF)
5622 {
5623 //DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[%s][%d] Filte %d is already freed\n", __FUNCTION__, __LINE__, (int)u8DmxId));
5624 return DMX_FILTER_STATUS_ERROR;
5625 }
5626
5627 return (DRVTSP_OK == MDrv_TSP_SecFlt_GetBufStart(0, _pdmx_res->_FltList[u32DmxId].SecBufId, pStart))? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR;
5628 }
5629
5630 //-------------------------------------------------------------------------------------------------
5631 /// Get the end pointer of demux filer buffer
5632 /// @param u8DmxId \b IN: the target demux filer Id
5633 /// @param pEnd \b OUT: the pointer to store the obtained end pointer
5634 /// @return DMX_FILTER_STATUS_OK - Success
5635 /// @return DMX_FILTER_STATUS_ERROR - Failure
5636 /// @note
5637 //-------------------------------------------------------------------------------------------------
5638 DMX_FILTER_STATUS _MApi_DMX_SectEndGet(MS_U32 u32DmxId, MS_PHY* pEnd)
5639 {
5640 MS_U32 u32Size = 0;
5641
5642 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5643 DMX_ASSERT(DMX_MAX_FLTID > u32DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, (int)u32DmxId)));
5644
5645 if(_pdmx_res->_FltList[u32DmxId].FltId == 0xFFFFFFFF)
5646 {
5647 //DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[%s][%d] Filte %d is already freed\n", __FUNCTION__, __LINE__, (int)u8DmxId));
5648 return DMX_FILTER_STATUS_ERROR;
5649 }
5650
5651 if (DRVTSP_OK != MDrv_TSP_SecFlt_GetBufStart(0, _pdmx_res->_FltList[u32DmxId].SecBufId, pEnd))
5652 {
5653 return DMX_FILTER_STATUS_ERROR;
5654 }
5655
5656 if (DRVTSP_OK != MDrv_TSP_SecFlt_GetBufSize(0, _pdmx_res->_FltList[u32DmxId].SecBufId, &u32Size))
5657 {
5658 return DMX_FILTER_STATUS_ERROR;
5659 }
5660
5661 *pEnd += u32Size;
5662 return DMX_FILTER_STATUS_OK;
5663 }
5664
5665 //-------------------------------------------------------------------------------------------------
5666 /// For setting MIU address for TSP aeon
5667 /// @param phyDataAddr \b IN: MIU phsyical address
5668 /// @param u32size \b IN: MIU buffer size
5669 /// @return DMX_FILTER_STATUS_OK - Success
5670 /// @return DMX_FILTER_STATUS_ERROR - Failure
5671 /// @note
5672 //-------------------------------------------------------------------------------------------------
5673 DMX_FILTER_STATUS _MApi_DMX_SetFwDataAddr(MS_PHY phyDataAddr, MS_U32 u32size)
5674 {
5675 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
5676 _DMX_ENTRY();
5677 MDrv_TSP_SetFwDataAddr(phyDataAddr, u32size);
5678 _DMX_RETURN(DMX_FILTER_STATUS_OK);
5679 #else
5680 return DMX_FILTER_STATUS_ERROR;
5681 #endif
5682 }
5683
5684 // special case for TTX
5685 DMX_FILTER_STATUS _MApi_DMX_TTX_WriteGet(MS_U32 u32DmxId, MS_PHY* pWrite)
5686 {
5687 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5688 DMX_ASSERT(DMX_MAX_FLTID > u32DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, (int)u32DmxId)));
5689 if(DRVTSP_OK != MDrv_TSP_TTX_SecFlt_GetWriteAddr(0, _pdmx_res->_FltList[u32DmxId].SecBufId, pWrite))
5690 {
5691 return DMX_FILTER_STATUS_ERROR;
5692 }
5693 else
5694 {
5695 return DMX_FILTER_STATUS_OK;
5696 }
5697 }
5698
5699 //-------------------------------------------------------------------------------------------------
5700 /// Set playback time stamp
5701 /// @return DMX_FILTER_STATUS_OK - Success
5702 /// @return DMX_FILTER_STATUS_ERROR - Failure
5703 /// @note
5704 //-------------------------------------------------------------------------------------------------
5705 DMX_FILTER_STATUS _MApi_DMX_Pvr_SetPlaybackStamp(MS_U32 u32Stamp)
5706 {
5707 DMX_PVRDBGMSG(DMX_DBG_PVR, ULOGD("DMX", "[%s] %d (%u)\n", __FUNCTION__, __LINE__, (unsigned int)u32Stamp));
5708
5709 #if DMX_DEBUG
5710 if(u32DbgLogFlag & DMX_DBG_LOG_FILEIN);
5711 dmx_dbg_print("[DMX FileIn timestamp]\t stamp[0x%08X]\n", u32Stamp);
5712 #endif
5713
5714 return (DRVTSP_OK== MDrv_TSP_PVR_TimeStampSetPlaybackStamp(u32Stamp))? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR;
5715 }
5716
5717 //-------------------------------------------------------------------------------------------------
5718 /// Get playback time stamp
5719 /// @return DMX_FILTER_STATUS_OK - Success
5720 /// @return DMX_FILTER_STATUS_ERROR - Failure
5721 /// @note
5722 //-------------------------------------------------------------------------------------------------
5723 DMX_FILTER_STATUS _MApi_DMX_Pvr_GetPlaybackStamp(MS_U32* pu32Stamp)
5724 {
5725 DMX_PVRDBGMSG(DMX_DBG_PVR, ULOGD("DMX", "[%s] %d (0x%p)\n", __FUNCTION__, __LINE__, pu32Stamp));
5726
5727 return (DRVTSP_OK== MDrv_TSP_PVR_TimeStampGetPlaybackStamp(pu32Stamp))? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR;
5728 }
5729
5730 //-------------------------------------------------------------------------------------------------
5731 /// Enable recording time stamp
5732 /// @return DMX_FILTER_STATUS_OK - Success
5733 /// @return DMX_FILTER_STATUS_ERROR - Failure
5734 /// @note
5735 //-------------------------------------------------------------------------------------------------
5736 DMX_FILTER_STATUS _MApi_DMX_Pvr_TimeStampEnable(void)
5737 {
5738 DMX_PVRDBGMSG(DMX_DBG_PVR, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5739
5740 if(MDrv_TSP_PVR_TimeStamp(TRUE) == DRVTSP_OK)
5741 {
5742 #ifdef DMX_RESET_FI_TIMESTAMP
5743 _pdmx_res->_bPlayTimestampEnable[0] = TRUE;
5744 #endif
5745
5746 return DMX_FILTER_STATUS_OK;
5747 }
5748
5749 return DMX_FILTER_STATUS_ERROR;
5750 }
5751
5752 //-------------------------------------------------------------------------------------------------
5753 /// Disable recording time stamp
5754 /// @return DMX_FILTER_STATUS_OK - Success
5755 /// @return DMX_FILTER_STATUS_ERROR - Failure
5756 /// @note
5757 //-------------------------------------------------------------------------------------------------
5758 DMX_FILTER_STATUS _MApi_DMX_Pvr_TimeStampDisable(void)
5759 {
5760 DMX_PVRDBGMSG(DMX_DBG_PVR, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5761
5762 if(MDrv_TSP_PVR_TimeStamp(FALSE) == DRVTSP_OK)
5763 {
5764 #ifdef DMX_RESET_FI_TIMESTAMP
5765 _pdmx_res->_bPlayTimestampEnable[0] = FALSE;
5766 #endif
5767
5768 return DMX_FILTER_STATUS_OK;
5769 }
5770
5771 return DMX_FILTER_STATUS_ERROR;
5772 }
5773
5774 //--------------------------------------------------------------------------------------
5775 //New interface for multiple PVR engine
5776 DMX_FILTER_STATUS _MApi_DMX_Pvr_Eng_Open(DMX_PVR_ENG Eng ,DMX_Pvr_info* pPvrInfo)
5777 {
5778 DMX_PVR_ASSERT(!((MS_U32)pPvrInfo->pPvrBuf0 & 0xF),
5779 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] PVR buffer must be 16 bytes alignment 0x%08x\n", __LINE__, (unsigned int)pPvrInfo->pPvrBuf0)));
5780 DMX_PVR_ASSERT(!((MS_U32)pPvrInfo->pPvrBuf1 & 0xF),
5781 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] PVR buffer must be 16 bytes alignment 0x%08x\n", __LINE__, (unsigned int)pPvrInfo->pPvrBuf1)));
5782 DMX_PVR_ASSERT(!((MS_U32)pPvrInfo->PvrBufSize0 & 0xF),
5783 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] PVR buffer size must be 16 bytes alignment 0x%08x\n", __LINE__, (unsigned int)pPvrInfo->PvrBufSize0)));
5784 DMX_PVR_ASSERT(!((MS_U32)pPvrInfo->PvrBufSize1 & 0xF),
5785 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] PVR buffer size must be 16 bytes alignment 0x%08x\n", __LINE__, (unsigned int)pPvrInfo->PvrBufSize1)));
5786
5787 if(Eng == DMX_PVR_TSO0)
5788 {
5789 #ifdef TSO_PVR_SUPPORT
5790 _DMX_TSO_ENTRY();
5791 if(MDrv_TSO_PVR_SetBuf(0, pPvrInfo->pPvrBuf0, pPvrInfo->pPvrBuf1, pPvrInfo->PvrBufSize0, (MS_U32)pPvrInfo->PvrBufSize1) == DRVTSO_OK)
5792 {
5793 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
5794 }
5795 else
5796 {
5797 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
5798 }
5799 #else
5800 return DMX_FILTER_STATUS_ERROR;
5801 #endif
5802 }
5803
5804 _DMX_PVR_ENTRY();
5805
5806 #ifdef SECURE_PVR_ENABLE
5807 _pdmx_res->_stSecBuf.u32BufOpt = 0;
5808 _pdmx_res->_stSecBuf.u32BufId = ((MS_U32)Eng) & 0xFF;
5809 _pdmx_res->_stSecBuf.phyBufAddr = pPvrInfo->pPvrBuf0;
5810 _pdmx_res->_stSecBuf.u32BufSize = pPvrInfo->PvrBufSize0 + pPvrInfo->PvrBufSize1;
5811 if(MDrv_TSP_Ree_SendTeeCmd(E_DRVTSP_REE_TO_TEE_CMD_SET_PvrBuf, (void*)&(_pdmx_res->_stSecBuf), sizeof(DrvTSP_SecureBuf)) != DRVTSP_OK)
5812 {
5813 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
5814 }
5815 else
5816 {
5817 pPvrInfo->pPvrBuf0 = _pdmx_res->_stSecBuf.phyBufAddr;
5818 pPvrInfo->PvrBufSize0 = _pdmx_res->_stSecBuf.u32BufSize >> 1;
5819 pPvrInfo->pPvrBuf1 = pPvrInfo->pPvrBuf0 + pPvrInfo->PvrBufSize0;
5820 pPvrInfo->PvrBufSize1 = pPvrInfo->PvrBufSize0;
5821 }
5822 #endif
5823
5824 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
5825
5826 #if(defined(VQ_ENABLE) && defined(TS2_IF_SUPPORT) && (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0)))
5827 #ifndef FIVQ_ENABLE
5828 if((Eng == DMX_PVR_EGN1) && _pdmx_res->_bVQEnabled)
5829 {
5830 MDrv_TSP_VQueEnable(FALSE);
5831 }
5832 #endif
5833 #endif //VQ_ENABLE && TS2_IF_SUPPORT
5834
5835 if(DRVTSP_OK != MDrv_TSP_PVR_Eng_SetBuffer(Eng, (pPvrInfo->pPvrBuf0), (pPvrInfo->pPvrBuf1),
5836 (MS_U32)pPvrInfo->PvrBufSize0, (MS_U32)pPvrInfo->PvrBufSize1))
5837 {
5838 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
5839 }
5840
5841 _pdmx_res->_PvrNotify[Eng] = pPvrInfo->pNotify;
5842
5843 if (pPvrInfo->pNotify)
5844 {
5845 MDrv_TSP_PVR_Eng_Notify(Eng, (DrvTSP_Event)pPvrInfo->Event, _DMX_NotifyPvr);
5846 }
5847 #else // For TSP_VER_4_0
5848
5849 MS_U32 u32PvrEng = 0;
5850
5851 if(_DMX_ApiDrv_PvrEngMapping(Eng, &u32PvrEng) == FALSE)
5852 {
5853 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
5854 }
5855
5856 if (DRVTSP_OK != MDrv_TSP_PVR_Eng_SetBuffer(u32PvrEng, pPvrInfo->pPvrBuf0, pPvrInfo->pPvrBuf1, (MS_U32)pPvrInfo->PvrBufSize0, (MS_U32)pPvrInfo->PvrBufSize1))
5857 {
5858 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
5859 }
5860 if (pPvrInfo->pNotify)
5861 {
5862 _pdmx_res->_PvrNotify[Eng] = pPvrInfo->pNotify;
5863 MDrv_TSP_PVR_Eng_Notify(u32PvrEng, (DrvTSP_Event)pPvrInfo->Event, _DMX_NotifyPvr);
5864 }
5865
5866 #endif // End of TSP_VER_4_0
5867
5868 _DMX_PVR_RETURN(DMX_FILTER_STATUS_OK);
5869 }
5870
5871 DMX_FILTER_STATUS _MApi_DMX_Pvr_Eng_Close(DMX_PVR_ENG Eng)
5872 {
5873 if(Eng == DMX_PVR_TSO0)
5874 {
5875 #ifdef TSO_PVR_SUPPORT
5876 _DMX_TSO_ENTRY();
5877 if(MDrv_TSO_PVR_SetBuf(Eng, 0, 0, 0, 0) == DRVTSO_OK)
5878 {
5879 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
5880 }
5881 else
5882 {
5883 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
5884 }
5885 #else
5886 return DMX_FILTER_STATUS_ERROR;
5887 #endif
5888 }
5889
5890 _DMX_PVR_ENTRY();
5891
5892 #if ((defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0))) && defined(SECURE_PVR_ENABLE))
5893 _pdmx_res->_stSecBuf.u32BufId = (MS_U32)Eng;
5894 _pdmx_res->_stSecBuf.u32BufOpt = 1; //clear buffer setting
5895 _pdmx_res->_stSecBuf.u32BufSize = 0;
5896 _pdmx_res->_stSecBuf.phyBufAddr = 0;
5897 if(MDrv_TSP_Ree_SendTeeCmd(E_DRVTSP_REE_TO_TEE_CMD_SET_PvrBuf, (void*)&(_pdmx_res->_stSecBuf), sizeof(DrvTSP_SecureBuf)) != DRVTSP_OK)
5898 {
5899 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
5900 }
5901 #endif
5902
5903 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
5904
5905 MDrv_TSP_PVRCA_Close(Eng);
5906
5907 #ifndef SECURE_PVR_ENABLE
5908 if(DRVTSP_OK != MDrv_TSP_PVR_Eng_SetBuffer(Eng, 0,0,0,0))
5909 {
5910 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
5911 }
5912 #endif
5913
5914 #if(defined(VQ_ENABLE) && defined(TS2_IF_SUPPORT) && (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0)))
5915 #ifndef FIVQ_ENABLE
5916 if((Eng == 1) && _pdmx_res->_bVQEnabled)
5917 {
5918 MApi_DMX_VQ_Enable(TRUE);
5919 }
5920 #endif
5921 #endif //VQ_ENABLE && TS2_IF_SUPPORT
5922
5923 #else // For TSP_VER_4_0
5924
5925 #ifndef SECURE_PVR_ENABLE
5926 MS_U32 u32PvrEng = 0;
5927
5928 if(_DMX_ApiDrv_PvrEngMapping(Eng, &u32PvrEng) == FALSE)
5929 {
5930 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
5931 }
5932
5933 if(DRVTSP_OK != MDrv_TSP_PVR_Eng_SetBuffer(u32PvrEng, 0,0,0,0))
5934 {
5935 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
5936 }
5937 #endif
5938 #endif // End of TSP_VER_4_0
5939
5940 _pdmx_res->_PvrNotify[Eng] = NULL;
5941
5942 _DMX_PVR_RETURN(DMX_FILTER_STATUS_OK);
5943 }
5944
5945 //-------------------------------------------------------------------------------------------------
5946 /// Stop/Resume recording
5947 /// @return DMX_FILTER_STATUS_OK - Success
5948 /// @return DMX_FILTER_STATUS_ERROR - Failure
5949 /// @note
5950 //-------------------------------------------------------------------------------------------------
5951 DMX_FILTER_STATUS _MApi_DMX_Pvr_Eng_Pause(DMX_PVR_ENG Eng ,MS_BOOL bPause)
5952 {
5953 DMX_PVRDBGMSG(DMX_DBG_PVR, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
5954
5955 _DMX_PVR_ENTRY();
5956
5957 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
5958 ULOGD("DMX", "[%s][%d] Not implement Yet \n",__FUNCTION__,__LINE__);
5959 #else
5960 MS_U32 u32PvrEng = 0;
5961
5962 if(_DMX_ApiDrv_PvrEngMapping(Eng, &u32PvrEng) == FALSE)
5963 {
5964 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
5965 }
5966
5967 MDrv_TSP_PVR_Eng_Pause(u32PvrEng, bPause);
5968 #endif
5969
5970 _DMX_PVR_RETURN(DMX_FILTER_STATUS_OK);
5971 }
5972
5973 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
5974 DMX_FILTER_STATUS _MApi_DMX_Pvr_Eng_Pid_Open(DMX_PVR_ENG Eng ,MS_U32 Pid, MS_U32* pu32DmxId)
5975 {
5976 MS_U32 FltId = 0;
5977
5978 DMX_ASSERT(DMX_PVR_TSO0 > Eng, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Invalid Engine ID!\n", __LINE__)));
5979
5980 DrvTSP_FltType ftype = E_DRVTSP_FLT_SOURCE_TYPE_LIVE;
5981 DMX_PVRDBGMSG(DMX_DBG_PVR, ULOGD("DMX", "[%s] %d (%d, 0x%x, %lx\n", __FUNCTION__, __LINE__, (int)Eng, (unsigned int)Pid, (unsigned long)pu32DmxId));
5982
5983 _DMX_PVR_ENTRY();
5984
5985 #if defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0)
5986 switch(Eng)
5987 {
5988 case DMX_PVR_EGN0 :
5989 ftype = E_DRVTSP_FLT_TYPE_PVR;
5990 break;
5991 case DMX_PVR_EGN1 :
5992 ftype = E_DRVTSP_FLT_TYPE_PVR1;
5993 break;
5994 default:
5995 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
5996 }
5997
5998 switch((DrvTSP_PKTDMXSrcType)(_pdmx_res->_u32PVREngSrc[(MS_U8)Eng]))
5999 {
6000 case E_DRVTSP_PKTSRC_DEMUX0:
6001 ftype |= E_DRVTSP_FLT_SOURCE_TYPE_LIVE;
6002 break;
6003 case E_DRVTSP_PKTSRC_DEMUXFILE:
6004 ftype |= E_DRVTSP_FLT_SOURCE_TYPE_FILE;
6005 break;
6006 case E_DRVTSP_PKTSRC_DEMUX1:
6007 ftype |= E_DRVTSP_FLT_SOURCE_TYPE_TS1;
6008 break;
6009 case E_DRVTSP_PKTSRC_DEMUX2:
6010 ftype |= E_DRVTSP_FLT_SOURCE_TYPE_TS2;
6011 break;
6012 default:
6013 break;
6014 }
6015
6016 if(_pdmx_res->_u32PVREngSrc[(MS_U8)Eng] == 0)
6017 {
6018 if(Eng == DMX_PVR_EGN0)
6019 {
6020 _pdmx_res->_u32PVREngSrc[0] = (MS_U32)E_DRVTSP_PKTSRC_DEMUX0;
6021 ftype |= E_DRVTSP_FLT_SOURCE_TYPE_LIVE;
6022 }
6023 else if(Eng == DMX_PVR_EGN1)
6024 {
6025 _pdmx_res->_u32PVREngSrc[1] = (MS_U32)E_DRVTSP_PKTSRC_DEMUX1;
6026 ftype |= E_DRVTSP_FLT_SOURCE_TYPE_TS1;
6027 }
6028 }
6029
6030 #else // For TSP_VER_1_0
6031
6032 switch(Eng)
6033 {
6034 case DMX_PVR_EGN0 :
6035 ftype |= E_DRVTSP_FLT_TYPE_PVR;
6036 break;
6037 #ifdef TS2_IF_SUPPORT
6038 case DMX_PVR_EGN1 :
6039 ftype |= E_DRVTSP_FLT_TYPE_CB;
6040 break;
6041 #endif
6042 default:
6043 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6044 }
6045 #endif
6046
6047 if (DRVTSP_OK!= MDrv_TSP_PidFlt_Alloc(_Owner, ftype, &FltId))
6048 {
6049 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6050 }
6051
6052 DMX_PVR_ASSERT2(FltId< DMX_MAX_FLTID, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad FltId %u\n", __LINE__, (unsigned int)FltId)));
6053 MDrv_TSP_PidFlt_SetPid(0, FltId, Pid);
6054 _FLT_LIST_PID_SET((MS_U8)FltId, (MS_U16)Pid);
6055 MDrv_TSP_PidFlt_Enable(0, FltId, TRUE);
6056 _FLT_LIST_SECFLT_TYPE_SET(FltId, FltId, 0xFFFFFFFF, (DMX_FILTER_TYPE)0xFF);
6057 *pu32DmxId = FltId;
6058
6059 _DMX_PVR_RETURN(DMX_FILTER_STATUS_OK);
6060
6061 } // End of TSP_VER_1_0 & TSP_VER_3_0
6062
6063 #else // For TSP_VER_4_0
6064
6065 DMX_FILTER_STATUS _MApi_DMX_Pvr_Eng_Pid_Open(DMX_PVR_ENG Eng ,MS_U32 Pid, MS_U32* pu32DmxId)
6066 {
6067 MS_U32 FltId = 0xFFFFFFFFUL;
6068 DMX_PVRDBGMSG(DMX_DBG_PVR, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
6069 _DMX_PVR_ENTRY();
6070
6071 MS_U32 u32PvrEng = 0;
6072
6073 if(_DMX_ApiDrv_PvrEngMapping(Eng, &u32PvrEng) == FALSE)
6074 {
6075 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6076 }
6077
6078 if (DRVTSP_OK != MDrv_TSP_PVR_Eng_FltAlloc(u32PvrEng, &FltId)) // Kaiser use tsp pidflt as PVR flt
6079 {
6080 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Alloc Flt failed\n", __LINE__))
6081 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6082 }
6083 _FLT_LIST_SECFLT_TYPE_SET(FltId, FltId, 0xFF, DMX_FILTER_TYPE_REC);
6084
6085 //enable
6086 if (DRVTSP_OK != MDrv_TSP_PVR_Eng_FltEnable(u32PvrEng, FltId, TRUE))
6087 {
6088 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Alloc Flt failed\n", __LINE__))
6089 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6090 }
6091
6092 //set pid
6093 if (DRVTSP_OK != MDrv_TSP_PVR_Eng_FltSetPID(u32PvrEng, FltId, Pid)) //@FIXME check return value
6094 {
6095 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Alloc Flt failed\n", __LINE__))
6096 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6097 }
6098
6099 _FLT_LIST_PID_SET(FltId, Pid);
6100 *pu32DmxId = FltId;
6101
6102 _DMX_PVR_RETURN(DMX_FILTER_STATUS_OK);
6103 }
6104 #endif // End of TSP_VER_4_0
6105
6106 DMX_FILTER_STATUS _MApi_DMX_Pvr_Eng_Pid_Close(DMX_PVR_ENG Eng ,MS_U32 u32DmxId)
6107 {
6108 DMX_PVRDBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d (%d)\n", __FUNCTION__, __LINE__, (int)u32DmxId));
6109 DMX_ASSERT(DMX_PVR_TSO0 > Eng, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Invalid Engine ID!\n", __LINE__)));
6110 DMX_ASSERT(DMX_MAX_FLTID > u32DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, (unsigned int)u32DmxId)));
6111
6112 _DMX_PVR_ENTRY();
6113
6114 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
6115 MDrv_TSP_PidFlt_Enable(0, u32DmxId, FALSE);
6116 MDrv_TSP_PidFlt_SetPid(0, u32DmxId, DRVTSP_PID_NULL);
6117 _FLT_LIST_PID_SET(u32DmxId, DRVTSP_PID_NULL);
6118 MDrv_TSP_PidFlt_Free(0, u32DmxId);
6119 _FLT_LIST_REMOVE(u32DmxId);
6120 #else // For TSP_VER_4_0
6121 MS_U32 u32PvrEng = 0;
6122
6123 if(_DMX_ApiDrv_PvrEngMapping(Eng, &u32PvrEng) == FALSE)
6124 {
6125 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6126 }
6127
6128 MDrv_TSP_PVR_Eng_FltFree(u32PvrEng, u32DmxId);
6129 _FLT_LIST_REMOVE(u32DmxId);
6130 #endif
6131
6132 _DMX_PVR_RETURN(DMX_FILTER_STATUS_OK);
6133 }
6134
6135 //-------------------------------------------------------------------------------------------------
6136 /// Check if PVR engine is started
6137 /// @param Eng \b IN: PVR engine ID
6138 /// @param pbIsStart \b OUT: Pointer to store PVR engine starting status
6139 /// @return DMX_FILTER_STATUS_OK - Success
6140 /// @return DMX_FILTER_STATUS_ERROR - Failure
6141 /// @note
6142 //-------------------------------------------------------------------------------------------------
6143 DMX_FILTER_STATUS _MApi_DMX_Pvr_Eng_IsStart(DMX_PVR_ENG Eng, MS_BOOL *pbIsStart)
6144 {
6145 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
6146
6147 _DMX_PVR_ENTRY();
6148
6149 if(MDrv_TSP_PVR_Eng_IsStart((MS_U32)Eng, pbIsStart) != DRVTSP_OK)
6150 {
6151 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6152 }
6153
6154 _DMX_PVR_RETURN(DMX_FILTER_STATUS_OK);
6155 #else
6156 return DMX_FILTER_STATUS_ERROR;
6157 #endif
6158 }
6159
6160 DMX_FILTER_STATUS _MApi_DMX_Pvr_Eng_Pid(DMX_PVR_ENG Eng ,MS_U32 u32DmxId , MS_U32 *Pid, MS_BOOL bSet)
6161 {
6162 DMX_PVRDBGMSG(DMX_DBG_PVR, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
6163 DMX_ASSERT(DMX_PVR_TSO0 > Eng, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Invalid Engine ID!\n", __LINE__)));
6164
6165 _DMX_PVR_ENTRY();
6166
6167 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
6168 //[TODO] wait for use case //
6169 //DMX_PVRDBGMSG(DMX_DBG_PVR, ULOGD("DMX", "[%s] %d Not implement yet!!\n", __FUNCTION__, __LINE__);
6170 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6171
6172 #else // For TSP_VER_4_0
6173 MS_U32 u32PvrEng = 0;
6174
6175 if(_DMX_ApiDrv_PvrEngMapping(Eng, &u32PvrEng) == FALSE)
6176 {
6177 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6178 }
6179
6180 if (bSet)
6181 {
6182 MDrv_TSP_PVR_Eng_FltSetPID(u32PvrEng, u32DmxId, *Pid);
6183 _FLT_LIST_PID_SET(u32DmxId, *Pid);
6184 }
6185 else
6186 {
6187 *Pid = DMX_PID_NULL;
6188 MDrv_TSP_PVR_Eng_FltGetPID(u32PvrEng, u32DmxId,(MS_U32*) Pid); //@F_TODO not implement yet
6189 }
6190
6191 _DMX_PVR_RETURN(DMX_FILTER_STATUS_OK);
6192 #endif
6193 }
6194
6195 DMX_FILTER_STATUS _MApi_DMX_Pvr_Eng_Start(DMX_PVR_ENG Eng, MS_BOOL bPvrAll)
6196 {
6197 if(Eng == DMX_PVR_TSO0)
6198 {
6199 if(bPvrAll == FALSE) //only support record all mode
6200 {
6201 return DMX_FILTER_STATUS_ERROR;
6202 }
6203
6204 #ifdef TSO_PVR_SUPPORT
6205 _DMX_TSO_ENTRY();
6206 if(MDrv_TSO_PVR_Start(Eng, E_DRVTSO_REC_MODE_BYPASS, TRUE) == DRVTSO_OK)
6207 {
6208 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
6209 }
6210 else
6211 {
6212 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
6213 }
6214 #else
6215 return DMX_FILTER_STATUS_ERROR;
6216 #endif //TSO_PVR_SUPPORT
6217 }
6218
6219 _DMX_PVR_ENTRY();
6220
6221 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
6222 if(DRVTSP_OK != MDrv_TSP_PVR_Eng_Start(Eng, ((bPvrAll)? E_DRVTSP_REC_MODE_ENG0_BYPASS: E_DRVTSP_REC_MODE_ENG0_FLTTYPE), TRUE))
6223 {
6224 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6225 }
6226 else
6227 #else // For TSP_VER_4_0
6228 MS_U32 u32PvrEng = 0;
6229
6230 if(_DMX_ApiDrv_PvrEngMapping(Eng, &u32PvrEng) == FALSE)
6231 {
6232 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6233 }
6234
6235 if(DRVTSP_OK != MDrv_TSP_PVR_Eng_Start(u32PvrEng, bPvrAll, TRUE))
6236 {
6237 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6238 }
6239 #endif
6240
6241 _DMX_PVR_RETURN(DMX_FILTER_STATUS_OK);
6242 }
6243
6244 DMX_FILTER_STATUS _MApi_DMX_Pvr_Eng_Stop(DMX_PVR_ENG Eng)
6245 {
6246 if(Eng == DMX_PVR_TSO0)
6247 {
6248 #ifdef TSO_PVR_SUPPORT
6249 _DMX_TSO_ENTRY();
6250 if(MDrv_TSO_PVR_Start(Eng, E_DRVTSO_REC_MODE_FLTTYPE, FALSE) == DRVTSO_OK)
6251 {
6252 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
6253 }
6254 else
6255 {
6256 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
6257 }
6258 #else
6259 return DMX_FILTER_STATUS_ERROR;
6260 #endif //TSO_PVR_SUPPORT
6261 }
6262
6263 _DMX_PVR_ENTRY();
6264
6265 MS_U32 u32PvrEng = Eng;
6266
6267 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
6268 if(_DMX_ApiDrv_PvrEngMapping(Eng, &u32PvrEng) == FALSE)
6269 {
6270 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6271 }
6272 #endif
6273
6274 if(DRVTSP_OK != MDrv_TSP_PVR_Eng_Start(u32PvrEng, E_DRVTSP_REC_MODE_ENG0_FLTTYPE, FALSE))
6275 {
6276 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6277 }
6278
6279 _DMX_PVR_RETURN(DMX_FILTER_STATUS_OK);
6280 }
6281
6282 DMX_FILTER_STATUS _MApi_DMX_Pvr_Eng_WriteGet(DMX_PVR_ENG Eng ,MS_PHY* phyWrite)
6283 {
6284 if(Eng == DMX_PVR_TSO0)
6285 {
6286 #ifdef TSO_PVR_SUPPORT
6287 _DMX_TSO_ENTRY();
6288 if(MDrv_TSO_PVR_GetWriteAddr(Eng, phyWrite) == DRVTSO_OK)
6289 {
6290 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
6291 }
6292 else
6293 {
6294 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
6295 }
6296 #else
6297 return DMX_FILTER_STATUS_ERROR;
6298 #endif //TSO_PVR_SUPPORT
6299 }
6300
6301 #if ((defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0))) && defined(SECURE_PVR_ENABLE))
6302
6303 _DMX_PVR_ENTRY();
6304
6305 _pdmx_res->_stSecBuf.u32BufId = (MS_U32)Eng;
6306 _pdmx_res->_stSecBuf.u32BufOpt = 0;
6307 _pdmx_res->_stSecBuf.u32BufSize = 0;
6308 _pdmx_res->_stSecBuf.phyBufAddr = 0;
6309
6310 if(MDrv_TSP_Ree_SendTeeCmd(E_DRVTSP_REE_TO_TEE_CMD_GET_PvrWPtr, (void*)&(_pdmx_res->_stSecBuf), sizeof(DrvTSP_SecureBuf)) != DRVTSP_OK)
6311 {
6312 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6313 }
6314 else
6315 {
6316 *phyWrite = _pdmx_res->_stSecBuf.phyBufAddr;
6317 _DMX_PVR_RETURN(DMX_FILTER_STATUS_OK);
6318 }
6319 #endif //SECURE_PVR_ENABLE
6320
6321 #ifndef SECURE_PVR_ENABLE
6322 MS_U32 u32PvrEng = Eng;
6323
6324 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
6325 if(_DMX_ApiDrv_PvrEngMapping(Eng, &u32PvrEng) == FALSE)
6326 {
6327 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6328 }
6329 #endif
6330
6331 if(DRVTSP_OK != MDrv_TSP_PVR_Eng_GetWriteAddr(u32PvrEng, phyWrite))
6332 {
6333 return (DMX_FILTER_STATUS_ERROR);
6334 }
6335 #endif
6336
6337 return DMX_FILTER_STATUS_OK;
6338 }
6339
6340 DMX_FILTER_STATUS _MApi_DMX_Pvr_Eng_SetPacketMode(DMX_PVR_ENG Eng ,MS_BOOL bSet)
6341 {
6342 if(Eng == DMX_PVR_TSO0)
6343 {
6344 #ifdef TSO_PVR_SUPPORT
6345 _DMX_TSO_ENTRY();
6346 if(MDrv_TSO_PVR_SetPacketMode(Eng, bSet) == DRVTSO_OK)
6347 {
6348 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
6349 }
6350 else
6351 {
6352 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
6353 }
6354 #else
6355 return DMX_FILTER_STATUS_ERROR;
6356 #endif //TSO_PVR_SUPPORT
6357 }
6358
6359 _DMX_PVR_ENTRY();
6360
6361 MS_U32 u32PvrEng = Eng;
6362
6363 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
6364 if(_DMX_ApiDrv_PvrEngMapping(Eng, &u32PvrEng) == FALSE)
6365 {
6366 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6367 }
6368 #endif
6369
6370 if(DRVTSP_OK != MDrv_TSP_PVR_Eng_SetPacketMode(u32PvrEng, bSet))
6371 {
6372 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6373 }
6374
6375 _DMX_PVR_RETURN(DMX_FILTER_STATUS_OK);
6376 }
6377
6378 DMX_FILTER_STATUS _MApi_DMX_Pvr_Eng_SetRecordStamp(DMX_PVR_ENG Eng ,MS_U32 u32Stamp)
6379 {
6380 if(Eng == DMX_PVR_TSO0)
6381 {
6382 #ifdef TSO_PVR_SUPPORT
6383 _DMX_TSO_ENTRY();
6384 if(MDrv_TSO_PVR_TimeStampSetRecordStamp(Eng, u32Stamp) == DRVTSO_OK)
6385 {
6386 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
6387 }
6388 else
6389 {
6390 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
6391 }
6392 #else
6393 return DMX_FILTER_STATUS_ERROR;
6394 #endif //TSO_PVR_SUPPORT
6395 }
6396
6397 _DMX_PVR_ENTRY();
6398
6399 MS_U32 u32PvrEng = Eng;
6400
6401 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
6402 if(_DMX_ApiDrv_PvrEngMapping(Eng, &u32PvrEng) == FALSE)
6403 {
6404 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6405 }
6406 #endif
6407
6408 if(DRVTSP_OK != MDrv_TSP_PVR_Eng_TimeStampSetRecordStamp(u32PvrEng, u32Stamp))
6409 {
6410 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6411 }
6412
6413 _DMX_PVR_RETURN(DMX_FILTER_STATUS_OK);
6414 }
6415
6416 DMX_FILTER_STATUS _MApi_DMX_Pvr_Eng_GetRecordStamp(DMX_PVR_ENG Eng ,MS_U32* pu32Stamp)
6417 {
6418 if(Eng == DMX_PVR_TSO0)
6419 {
6420 #ifdef TSO_PVR_SUPPORT
6421 _DMX_TSO_ENTRY();
6422 if(MDrv_TSO_PVR_TimeStampGetRecordStamp(Eng, pu32Stamp) == DRVTSO_OK)
6423 {
6424 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
6425 }
6426 else
6427 {
6428 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
6429 }
6430 #else
6431 return DMX_FILTER_STATUS_ERROR;
6432 #endif //TSO_PVR_SUPPORT
6433 }
6434
6435 MS_U32 u32PvrEng = Eng;
6436
6437 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
6438 if(_DMX_ApiDrv_PvrEngMapping(Eng, &u32PvrEng) == FALSE)
6439 {
6440 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6441 }
6442 #endif
6443
6444 if(DRVTSP_OK != MDrv_TSP_PVR_Eng_TimeStampGetRecordStamp(u32PvrEng, pu32Stamp))
6445 {
6446 return DMX_FILTER_STATUS_ERROR;
6447 }
6448
6449 return DMX_FILTER_STATUS_OK;
6450 }
6451
6452 DMX_FILTER_STATUS _MApi_DMX_Pvr_Eng_SetPlaybackStampClk(MS_U8 u8Eng, DMX_TimeStamp_Clk eClkSrc)
6453 {
6454 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
6455
6456 #if defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0))
6457
6458 if(u8Eng == 0)
6459 {
6460 if(DRVTSP_OK != MDrv_TSP_PVR_Eng_SetPlaybackStampClk(u8Eng, (MS_U32)eClkSrc))
6461 {
6462 return DMX_FILTER_STATUS_ERROR;
6463 }
6464 }
6465 else
6466 {
6467 #if !(defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0))
6468
6469 return DMX_FILTER_STATUS_ERROR;
6470
6471 #else
6472
6473 DMX_MMFI_PATH mmpath = DMX_MMFI_PATH0;
6474
6475 if(u8Eng == 2)
6476 mmpath = DMX_MMFI_PATH1;
6477
6478 if(DRVMMFI_OK != MDrv_MMFI_File_SetTimeStampClk(mmpath, (MS_U32)eClkSrc))
6479 {
6480 return DMX_FILTER_STATUS_ERROR;
6481 }
6482 #endif
6483 }
6484
6485 return DMX_FILTER_STATUS_OK;
6486
6487 #else // For TSP_VER_4_0
6488
6489 TSP_TimeStamp_Clk eClk = E_TSP_TIMESTAMP_CLK_INVALID;
6490 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping((DMX_FILEIN_PATH)u8Eng);
6491
6492 if(eEng == E_TSP_FILE_ENG_INVALID)
6493 return DMX_FILTER_STATUS_ERROR;
6494
6495 switch (eClkSrc)
6496 {
6497 case DMX_TIMESTAMP_CLK_90K:
6498 eClk = E_TSP_TIMESTAMP_CLK_90K;
6499 break;
6500 case DMX_TIMESTAMP_CLK_27M:
6501 eClk = E_TSP_TIMESTAMP_CLK_27M;
6502 break;
6503 default:
6504 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad DMX_TimeStamp_Clk %u\n", __LINE__, (unsigned int)eClkSrc));
6505 return DMX_FILTER_STATUS_ERROR;
6506 }
6507
6508 _DMX_ENTRY();
6509
6510 if (DRVTSP_OK!= MDrv_TSP_FILE_Eng_TimeStampSetPlaybackStampClk(eEng, eClk))
6511 {
6512 DMX_ASSERT(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Call MDrv_TSP_FILE_Eng_TimeStampSetPlaybackStampClk fail\n", __LINE__)));
6513 }
6514
6515 _DMX_RETURN(DMX_FILTER_STATUS_OK);
6516
6517 #endif // End of TSP_VER_4_0
6518 }
6519
6520 DMX_FILTER_STATUS _MApi_DMX_Pvr_Eng_SetRecordStampClk(DMX_PVR_ENG Eng, DMX_TimeStamp_Clk eClkSrc)
6521 {
6522 #if defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0))
6523 #ifdef TSO_PVR_SUPPORT
6524 if(Eng == DMX_PVR_TSO0)
6525 {
6526 if(MDrv_TSO_PVR_SetRecordStampClk((MS_U8)Eng, (MS_U32)eClkSrc) != DRVTSO_OK)
6527 {
6528 return DMX_FILTER_STATUS_ERROR;
6529 }
6530 else
6531 {
6532 return DMX_FILTER_STATUS_OK;
6533 }
6534 }
6535 else
6536 #endif //TSO_PVR_SUPPORT
6537 if(DRVTSP_OK != MDrv_TSP_PVR_Eng_SetRecordStampClk((MS_U32)Eng, (MS_U32)eClkSrc))
6538 {
6539 return DMX_FILTER_STATUS_ERROR;
6540 }
6541 else
6542 {
6543 return DMX_FILTER_STATUS_OK;
6544 }
6545 #else
6546 return DMX_FILTER_STATUS_ERROR;
6547 #endif
6548 }
6549
6550 DMX_FILTER_STATUS _MApi_DMX_Pvr_Eng_CallbackSize(DMX_PVR_ENG Eng, MS_U32* pu32CallbackSize, MS_BOOL bSet)
6551 {
6552 return DMX_FILTER_STATUS_ERROR;
6553 }
6554
6555 //-------------------------------------------------------------------------------------------------
6556 ///Set PVR CA SPS enable mode
6557 /// @param Eng \b IN: PVR Engine ID
6558 /// @param eCaMode \b IN: CA PVR Selection, 0: from TSP, 1: from ca program0, 2: from ca program1
6559 /// @param bspsEnable \b IN: SPS mode enabled flag
6560 /// @return DMX_FILTER_STATUS_OK - Success
6561 /// @return DMX_FILTER_STATUS_ERROR - Failure
6562 /// @note
6563 //-------------------------------------------------------------------------------------------------
6564 DMX_FILTER_STATUS _MApi_DMX_Pvr_Eng_SetCaMode(DMX_PVR_ENG Eng, DMX_CA_PVRMODE eCaMode, MS_BOOL bspsEnable)
6565 {
6566 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
6567
6568 return DMX_FILTER_STATUS_ERROR;
6569
6570 #else // For TSP_VER_4_0
6571 MS_U32 u32PvrEng = 0;
6572
6573 if(_DMX_ApiDrv_PvrEngMapping(Eng, &u32PvrEng) == FALSE)
6574 {
6575 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6576 }
6577
6578 if(DRVTSP_OK != MDrv_TSP_PVR_Eng_SetCaMode(u32PvrEng, (MS_U16)eCaMode, bspsEnable))
6579 {
6580 return DMX_FILTER_STATUS_ERROR;
6581 }
6582 else
6583 {
6584 return DMX_FILTER_STATUS_OK;
6585 }
6586 #endif
6587 }
6588
6589 //-------------------------------------------------------------------------------------------------
6590 /// Open PVR PID filter for recording scramble stream depended on Engine ID
6591 /// @param Eng \b IN: PVR engine ID
6592 /// @param Pid \b IN: PID to record
6593 /// @param pu8DmxId \b IN: Pointer to store PVR PID filter index
6594 /// @param u8ShareKeyType \b IN: PID filter share key type. 0: Not use sharekey filters.
6595 /// @return DMX_FILTER_STATUS_OK - Success
6596 /// @return DMX_FILTER_STATUS_ERROR - Failure
6597 /// @note
6598 //-------------------------------------------------------------------------------------------------
6599 DMX_FILTER_STATUS _MApi_DMX_PvrCA_Eng_Pid_Open(DMX_PVR_ENG Eng, MS_U32 Pid, MS_U32* pu32DmxId, MS_U8 u8ShareKeyType)
6600 {
6601 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s](%d, 0x%08x, 0x%lx) %d\n", __FUNCTION__, (int)Eng, (unsigned int)Pid, (unsigned long)pu32DmxId, __LINE__));
6602
6603 // @F_TODO what is the difference between pvrca pid open and pvrca Eng pid open
6604
6605 #if defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0)
6606 MS_U32 u32fltid = 0;
6607 DrvTSP_FltType ftype = 0;
6608
6609 switch(Eng)
6610 {
6611 case DMX_PVR_EGN0 :
6612 ftype = E_DRVTSP_FLT_TYPE_PVR;
6613 break;
6614 case DMX_PVR_EGN1 :
6615 ftype = E_DRVTSP_FLT_TYPE_PVR1;
6616 break;
6617 default:
6618 return (DMX_FILTER_STATUS_ERROR);
6619 }
6620
6621 _DMX_ENTRY();
6622
6623 switch((DrvTSP_PKTDMXSrcType)(_pdmx_res->_u32PVREngSrc[(MS_U8)Eng]))
6624 {
6625 case E_DRVTSP_PKTSRC_DEMUX0:
6626 ftype |= E_DRVTSP_FLT_SOURCE_TYPE_LIVE;
6627 break;
6628 case E_DRVTSP_PKTSRC_DEMUXFILE:
6629 ftype |= E_DRVTSP_FLT_SOURCE_TYPE_FILE;
6630 break;
6631 case E_DRVTSP_PKTSRC_DEMUX1:
6632 ftype |= E_DRVTSP_FLT_SOURCE_TYPE_TS1;
6633 break;
6634 case E_DRVTSP_PKTSRC_DEMUX2:
6635 ftype |= E_DRVTSP_FLT_SOURCE_TYPE_TS2;
6636 break;
6637 default:
6638 break;
6639 }
6640
6641 if(_pdmx_res->_u32PVREngSrc[(MS_U8)Eng] == 0)
6642 {
6643 if(Eng == DMX_PVR_EGN0)
6644 {
6645 _pdmx_res->_u32PVREngSrc[0] = (MS_U32)E_DRVTSP_PKTSRC_DEMUX0;
6646 ftype |= E_DRVTSP_FLT_SOURCE_TYPE_LIVE;
6647 }
6648 else if(Eng == DMX_PVR_EGN1)
6649 {
6650 _pdmx_res->_u32PVREngSrc[1] = (MS_U32)E_DRVTSP_PKTSRC_DEMUX1;
6651 ftype |= E_DRVTSP_FLT_SOURCE_TYPE_TS1;
6652 }
6653 }
6654
6655 if(u8ShareKeyType == 1)
6656 {
6657 ftype |= E_DRVTSP_FLT_TYPE_SCMB_SHAREKEY;
6658 }
6659 else
6660 {
6661 ftype |= E_DRVTSP_FLT_TYPE_SCMB;
6662 }
6663
6664 if (DRVTSP_OK!= MDrv_TSP_PidFlt_Alloc(_Owner, ftype, &u32fltid))
6665 {
6666 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
6667 }
6668
6669 DMX_ASSERT2(u32fltid < DMX_MAX_FLTID, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad FltId %u\n", __LINE__, (unsigned int)u32fltid)));
6670 MDrv_TSP_PidFlt_SetPid(0, u32fltid, Pid);
6671 _FLT_LIST_PID_SET((MS_U8)u32fltid, (MS_U16)Pid);
6672 MDrv_TSP_PidFlt_Enable(0, u32fltid, TRUE);
6673
6674 _FLT_LIST_SECFLT_TYPE_SET(u32fltid, u32fltid, 0xFFFFFFFF, (DMX_FILTER_TYPE)0xFF);
6675 *pu32DmxId = u32fltid;
6676
6677 _DMX_RETURN(DMX_FILTER_STATUS_OK);
6678
6679 #elif(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
6680
6681 if((Eng != DMX_PVR_EGN0) || _pdmx_res->_u32PVREngSrc[Eng] == E_DRVTSP_PKTSRC_DEMUX1) //PVRCA1 with PVR0 engine
6682 {
6683 return _MApi_DMX_Pvr_Eng_Pid_Open(Eng, Pid, pu32DmxId );
6684 }
6685
6686 _DMX_ENTRY();
6687 if(MDrv_TSP_PVR_PidFlt_Reserved(Pid, pu32DmxId, TRUE) == DRVTSP_OK)
6688 {
6689 _DMX_RETURN(DMX_FILTER_STATUS_OK);
6690 }
6691 else
6692 {
6693 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
6694 }
6695
6696 #else // For TSP_VER_4_0
6697
6698 return (_MApi_DMX_Pvr_Eng_Pid_Open(Eng,Pid,pu32DmxId));
6699
6700 #endif
6701
6702 return DMX_FILTER_STATUS_ERROR;
6703 }
6704
6705 //do nothing, before close path switch to TS1
6706 //-------------------------------------------------------------------------------------------------
6707 /// Close PVR PID filter depended on Engine ID
6708 /// @param Eng \b IN: PVR engine ID
6709 /// @param u8DmxId \b IN: PID filter index to close
6710 /// @return DMX_FILTER_STATUS_OK - Success
6711 /// @return DMX_FILTER_STATUS_ERROR - Failure
6712 /// @note
6713 //-------------------------------------------------------------------------------------------------
6714 DMX_FILTER_STATUS _MApi_DMX_PvrCA_Eng_Pid_Close(DMX_PVR_ENG Eng, MS_U32 u32DmxId)
6715 {
6716 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s](%d, %d) %d\n", __FUNCTION__, (int)Eng, (int)u32DmxId, __LINE__));
6717
6718 #if(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0))
6719 _DMX_ENTRY();
6720 MDrv_TSP_PidFlt_Enable(0, u32DmxId, FALSE);
6721 MDrv_TSP_PidFlt_SetPid(0, u32DmxId, DRVTSP_PID_NULL);
6722 _FLT_LIST_PID_SET(u32DmxId, DRVTSP_PID_NULL);
6723 MDrv_TSP_PidFlt_Free(0, u32DmxId);
6724 _FLT_LIST_REMOVE(u32DmxId);
6725 _DMX_RETURN(DMX_FILTER_STATUS_OK);
6726
6727 #elif(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
6728
6729 if((Eng != DMX_PVR_EGN0) || _pdmx_res->_u32PVREngSrc[Eng] == E_DRVTSP_PKTSRC_DEMUX1) //PVRCA1 with PVR0 engine
6730 {
6731 return _MApi_DMX_Pvr_Eng_Pid_Close(Eng, u32DmxId);
6732 }
6733
6734 _DMX_ENTRY();
6735
6736 if(MDrv_TSP_PVR_PidFlt_Reserved(0x1FFF, &u32DmxId, FALSE) == DRVTSP_OK)
6737 {
6738 _DMX_RETURN(DMX_FILTER_STATUS_OK);
6739 }
6740 else
6741 {
6742 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
6743 }
6744 #else // For TSP_VER_4_0
6745 return (_MApi_DMX_Pvr_Eng_Pid_Close(Eng, u32DmxId));
6746 #endif
6747
6748 return DMX_FILTER_STATUS_ERROR;
6749 }
6750
6751 //-------------------------------------------------------------------------------------------------
6752 /// Start to record scramble stream depend on engine id
6753 /// @param Eng \b IN: PVR engine ID
6754 /// @param bPvrAll \b IN: If true, record all stream data; if false, record data by PIDs
6755 /// @return DMX_FILTER_STATUS_OK - Success
6756 /// @return DMX_FILTER_STATUS_ERROR - Failure
6757 /// @note
6758 //-------------------------------------------------------------------------------------------------
6759 DMX_FILTER_STATUS _MApi_DMX_PvrCA_Eng_Start(DMX_PVR_ENG Eng, MS_BOOL bPvrAll)
6760 {
6761 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s](%d, %d) %d\n", __FUNCTION__, (int)Eng, (int)bPvrAll, __LINE__));
6762
6763 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
6764
6765 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
6766 if((Eng != DMX_PVR_EGN0) || (_pdmx_res->_u32PVREngSrc[Eng] == E_DRVTSP_PKTSRC_DEMUX1)) //PVRCA1 with PVR0 engine
6767 {
6768 return _MApi_DMX_Pvr_Eng_Start(Eng, bPvrAll);
6769 }
6770 #endif
6771
6772 _DMX_ENTRY();
6773
6774 if(bPvrAll)
6775 {
6776 if(MDrv_TSP_PVR_Eng_Start(Eng, E_DRVTSP_REC_MODE_ENG0_BYPASS, TRUE) != DRVTSP_OK)
6777 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
6778 _pdmx_res->_bPVRCA_RecAll[Eng] = TRUE;
6779 }
6780 else
6781 {
6782 if(MDrv_TSP_PVR_Eng_Start(Eng, E_DRVTSP_REC_MODE_ENG0_FLT1CA, TRUE) != DRVTSP_OK)
6783 {
6784 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
6785 }
6786 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
6787 if(MDrv_TSP_PVR_FLT1_StartRec(TRUE) != DRVTSP_OK)
6788 {
6789 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
6790 }
6791 #endif
6792 _pdmx_res->_bPVRCA_RecAll[Eng] = FALSE;
6793 }
6794
6795 _DMX_RETURN(DMX_FILTER_STATUS_OK);
6796
6797 #else // For TSP_VER_4_0
6798 return (_MApi_DMX_Pvr_Eng_Start(Eng,bPvrAll));
6799 #endif
6800
6801 return DMX_FILTER_STATUS_OK;
6802 }
6803
6804 //-------------------------------------------------------------------------------------------------
6805 /// Stop to record scramble stream
6806 /// @param Eng \b IN: PVR engine ID
6807 /// @return DMX_FILTER_STATUS_OK - Success
6808 /// @return DMX_FILTER_STATUS_ERROR - Failure
6809 /// @note
6810 //-------------------------------------------------------------------------------------------------
6811 DMX_FILTER_STATUS _MApi_DMX_PvrCA_Eng_Stop(DMX_PVR_ENG Eng)
6812 {
6813 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s](%d) %d\n", __FUNCTION__, (int)Eng, __LINE__));
6814
6815 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
6816
6817 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
6818 if((Eng != DMX_PVR_EGN0) || (_pdmx_res->_u32PVREngSrc[Eng] == E_DRVTSP_PKTSRC_DEMUX1)) //PVRCA1 with PVR0 engine
6819 {
6820 return _MApi_DMX_Pvr_Eng_Stop(Eng);
6821 }
6822 #endif
6823
6824 _DMX_ENTRY();
6825
6826 if(_pdmx_res->_bPVRCA_RecAll[Eng])
6827 {
6828 if(MDrv_TSP_PVR_Eng_Start(Eng, E_DRVTSP_REC_MODE_ENG0_FLTTYPE, FALSE) != DRVTSP_OK)
6829 {
6830 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
6831 }
6832 _DMX_RETURN(DMX_FILTER_STATUS_OK);
6833 }
6834
6835 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
6836 if(MDrv_TSP_PVR_FLT1_StartRec(FALSE) != DRVTSP_OK)
6837 {
6838 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
6839 }
6840 #endif
6841
6842 if(MDrv_TSP_PVR_Eng_Start(Eng, E_DRVTSP_REC_MODE_ENG0_FLT1CA, FALSE) != DRVTSP_OK)
6843 {
6844 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
6845 }
6846
6847 _DMX_RETURN(DMX_FILTER_STATUS_OK);
6848
6849 #else // For TSP_VER_4_0
6850 return (_MApi_DMX_Pvr_Eng_Stop(Eng));
6851 #endif
6852
6853 return DMX_FILTER_STATUS_OK;
6854 }
6855
6856 //-------------------------------------------------------------------------------------------------
6857 /// Open & set pid filter for file-in PVR using
6858 /// @param Eng \b IN : PVR eigine id
6859 /// @param Pid \b IN : PVR PID to record
6860 /// @param pu8DmxId \b OUT: Pointer to store PID filter id
6861 /// @param u8ShareKeyType \b IN : The flag of sharekey filter using. if 0, not use sharekey filters
6862 /// @return DMX_FILTER_STATUS_OK - Success
6863 /// @return DMX_FILTER_STATUS_ERROR - Failure
6864 /// @note
6865 //-------------------------------------------------------------------------------------------------
6866 DMX_FILTER_STATUS _MApi_DMX_Filein_Pvr_Eng_Pid_Open(DMX_PVR_ENG Eng, MS_U32 Pid, MS_U8* pu8DmxId, MS_U8 u8ShareKeyType)
6867 {
6868 #if(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
6869
6870 MS_U32 u32fltid = 0;
6871 DrvTSP_FltType ftype = E_DRVTSP_FLT_SOURCE_TYPE_FILE|E_DRVTSP_FLT_TYPE_PVR;
6872
6873 if(u8ShareKeyType != 0)
6874 {
6875 ftype |= E_DRVTSP_FLT_TYPE_SCMB_SHAREKEY;
6876 }
6877
6878 _DMX_ENTRY();
6879
6880 if (DRVTSP_OK!= MDrv_TSP_PidFlt_Alloc(_Owner, ftype, &u32fltid))
6881 {
6882 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
6883 }
6884
6885 DMX_ASSERT2(u32fltid < DMX_MAX_FLTID, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad FltId %u\n", __LINE__, (int)u32fltid)));
6886 MDrv_TSP_PidFlt_SetPid(0, u32fltid, Pid);
6887 _FLT_LIST_PID_SET((MS_U8)u32fltid, (MS_U16)Pid);
6888 MDrv_TSP_PidFlt_Enable(0, u32fltid, TRUE);
6889
6890 _FLT_LIST_SECFLT_TYPE_SET(u32fltid, u32fltid, 0xFF, (DMX_FILTER_TYPE)0xFF);
6891 *pu8DmxId = (MS_U8)(u32fltid & 0xFF);
6892
6893 _DMX_RETURN(DMX_FILTER_STATUS_OK);
6894
6895 #else
6896
6897 return DMX_FILTER_STATUS_ERROR;
6898
6899 #endif
6900 }
6901
6902 //-------------------------------------------------------------------------------------------------
6903 /// Close pid filter of file-in PVR
6904 /// @param Eng \b IN : PVR eigine id
6905 /// @param u8DmxId \b IN : PID filter id
6906 /// @return DMX_FILTER_STATUS_OK - Success
6907 /// @return DMX_FILTER_STATUS_ERROR - Failure
6908 /// @note
6909 //-------------------------------------------------------------------------------------------------
6910 DMX_FILTER_STATUS _MApi_DMX_Filein_Pvr_Eng_Pid_Close(DMX_PVR_ENG Eng, MS_U8 u8DmxId)
6911 {
6912 #if(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
6913
6914 DMX_PVRDBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d (%d)\n", __FUNCTION__, __LINE__, (int)u8DmxId));
6915
6916 DMX_ASSERT(DMX_MAX_FLTID > u8DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, u8DmxId)));
6917
6918 _DMX_ENTRY();
6919
6920 MDrv_TSP_PidFlt_Enable(0, u8DmxId, FALSE);
6921 MDrv_TSP_PidFlt_SetPid(0, u8DmxId, DRVTSP_PID_NULL);
6922 _FLT_LIST_PID_SET(u8DmxId, DRVTSP_PID_NULL);
6923 MDrv_TSP_PidFlt_Free(0, u8DmxId);
6924 _FLT_LIST_REMOVE(u8DmxId);
6925
6926 _DMX_RETURN(DMX_FILTER_STATUS_OK);
6927
6928 #else
6929
6930 return DMX_FILTER_STATUS_ERROR;
6931
6932 #endif
6933 }
6934
6935 //-------------------------------------------------------------------------------------------------
6936 /// Start file-in PVR recording
6937 /// @param Eng \b IN : PVR eigine id
6938 /// @param bPvrAll \b IN : FALSE is record PID, TRUE is record All ts data
6939 /// @return DMX_FILTER_STATUS_OK - Success
6940 /// @return DMX_FILTER_STATUS_ERROR - Failure
6941 /// @note
6942 //-------------------------------------------------------------------------------------------------
6943 DMX_FILTER_STATUS _MApi_DMX_Filein_Pvr_Eng_Start(DMX_PVR_ENG Eng, MS_BOOL bPvrAll)
6944 {
6945 #if(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
6946
6947 _DMX_PVR_ENTRY();
6948
6949 if(bPvrAll)
6950 {
6951 if(MDrv_TSP_PVR_Eng_Start(Eng, E_DRVTSP_REC_MODE_ENG0_FI_BYPASS, TRUE) != DRVTSP_OK)
6952 {
6953 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
6954 }
6955 }
6956 else
6957 {
6958 if(MDrv_TSP_PVR_Eng_Start(Eng, E_DRVTSP_REC_MODE_ENG0_FI_FLTTYPE, TRUE) != DRVTSP_OK)
6959 {
6960 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
6961 }
6962 }
6963
6964 _DMX_PVR_RETURN(DMX_FILTER_STATUS_OK);
6965
6966 #else
6967 return DMX_FILTER_STATUS_ERROR;
6968 #endif
6969 }
6970
6971 //-------------------------------------------------------------------------------------------------
6972 /// Stop file-in PVR recording
6973 /// @param Eng \b IN : PVR eigine id
6974 /// @return DMX_FILTER_STATUS_OK - Success
6975 /// @return DMX_FILTER_STATUS_ERROR - Failure
6976 /// @note
6977 //-------------------------------------------------------------------------------------------------
6978 DMX_FILTER_STATUS _MApi_DMX_Filein_Pvr_Eng_Stop(DMX_PVR_ENG Eng)
6979 {
6980 #if(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
6981
6982 _DMX_PVR_ENTRY();
6983
6984 if(DRVTSP_OK != MDrv_TSP_PVR_Eng_Start(Eng, E_DRVTSP_REC_MODE_ENG0_FI_BYPASS, FALSE))
6985 {
6986 _DMX_PVR_RETURN(DMX_FILTER_STATUS_ERROR);
6987 }
6988
6989 _DMX_PVR_RETURN(DMX_FILTER_STATUS_OK);
6990 #else
6991 return DMX_FILTER_STATUS_ERROR;
6992 #endif
6993 }
6994
6995 //-------------------------------------------------------------------------------------------------
6996 /// Set up parameters for input bit stream from memory
6997 /// @param pFileinInfo \b IN: the file in parameters
6998 /// @return DMX_FILTER_STATUS_OK - Success
6999 /// @return DMX_FILTER_STATUS_ERROR - Failure
7000 /// @note
7001 //-------------------------------------------------------------------------------------------------
7002 DMX_FILTER_STATUS _MApi_DMX_Filein_Info(DMX_Filein_info *pFileinInfo)
7003 {
7004 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7005
7006 #if DMX_DEBUG
7007 if(u32DbgLogFlag & DMX_DBG_LOG_FILEIN);
7008 dmx_dbg_print("[DMX FileIn Info]\tRate[0x%x] PktMode[0x%x]\n",
7009 (MS_S32)pFileinInfo->Rate, (MS_S32)pFileinInfo->PKT_Mode);
7010 #endif
7011
7012 #if defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0)
7013 MDrv_MMFI_File_SetPacketMode(E_DRVMMFI_PATH0, (DrvMMFI_PacketMode)pFileinInfo->PKT_Mode);
7014 MDrv_MMFI_File_SetTimer(E_DRVMMFI_PATH0, (MS_U8)(pFileinInfo->Rate & 0xFF));
7015 MDrv_MMFI_File_SetPacketMode(E_DRVMMFI_PATH1, (DrvMMFI_PacketMode)pFileinInfo->PKT_Mode);
7016 MDrv_MMFI_File_SetTimer(E_DRVMMFI_PATH1, (MS_U8)(pFileinInfo->Rate & 0xFF));
7017 #else // For MMFI_VER_1_0
7018
7019 #ifdef MMFILEIN
7020 MDrv_MMFI_File_SetPacketMode(E_DRVMMFI_PTH_AUDIO, (DrvMMFI_PacketMode)pFileinInfo->PKT_Mode);
7021 MDrv_MMFI_File_SetTimer(E_DRVMMFI_PTH_AUDIO, (MS_U8)(pFileinInfo->Rate & 0xFF));
7022 #endif //MMFILEIN
7023
7024 #ifdef MMFI_VD3D
7025 MDrv_MMFI_File_SetPacketMode(E_DRVMMFI_PATH_VD3D, (DrvMMFI_PacketMode)pFileinInfo->PKT_Mode);
7026 MDrv_MMFI_File_SetTimer(E_DRVMMFI_PATH_VD3D, (MS_U8)(pFileinInfo->Rate & 0xFF));
7027 #endif //MMFILEIN
7028
7029 #endif // End of MMFI_VER_1_0
7030
7031 MDrv_TSP_File_SetPacketMode((DrvTSP_PacketMode)(pFileinInfo->PKT_Mode));
7032 return (DRVTSP_OK == MDrv_TSP_File_SetRate(pFileinInfo->Rate))? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR;
7033 }
7034
7035 // @FIXME: ignore audio/video PES at this stage
7036 //-------------------------------------------------------------------------------------------------
7037 /// Start to get bit stream by memeory
7038 /// @param Dst \b IN: file in destination type
7039 /// @param pBuf \b IN: the memory containing the bit stream
7040 /// @param u32BufSize \b IN: the size the memory to get
7041 /// @return DMX_FILTER_STATUS_OK - Success
7042 /// @return DMX_FILTER_STATUS_ERROR - Failure
7043 /// @note
7044 //-------------------------------------------------------------------------------------------------
7045 DMX_FILTER_STATUS _MApi_DMX_Filein_Start(DMX_FILEIN_DST Dst, MS_PHY pBuf, MS_U32 u32BufSize)
7046 {
7047 DrvTSP_FileinMode eFileMode;
7048
7049 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7050
7051 #if DMX_DEBUG
7052 if(u32DbgLogFlag & DMX_DBG_LOG_FILEIN);
7053 dmx_dbg_print("[DMX FileIn Start]\tDst[0x%08X] Addr[0x%08X] Size[0x%08X]\n",
7054 (MS_S32)Dst, (MS_U32)pBuf, u32BufSize);
7055 #endif
7056
7057 _DMX_ENTRY();
7058
7059 switch (Dst)
7060 {
7061 case DMX_PES_NO_BYPASS_FIFO:
7062 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_TS;
7063 break;
7064 case DMX_PES_AUDIO_FIFO:
7065 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_APES;
7066 break;
7067 case DMX_PES_AUDIO2_FIFO:
7068 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_A2PES;
7069 break;
7070 #if (!(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))) // For TSP_VER_3_0 and TSP_VER_4_0
7071 case DMX_PES_AUDIO3_FIFO:
7072 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_A3PES;
7073 break;
7074 case DMX_PES_AUDIO4_FIFO:
7075 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_A4PES;
7076 break;
7077 #endif
7078 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
7079 case DMX_PES_AUDIO5_FIFO:
7080 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_A5PES;
7081 break;
7082 case DMX_PES_AUDIO6_FIFO:
7083 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_A6PES;
7084 break;
7085 #endif
7086 case DMX_PES_VIDEO_FIFO:
7087 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_VPES;
7088 break;
7089 #ifdef MMFI_VD3D
7090 case DMX_PES_VIDEO3D_FIFO:
7091 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_V3DPES;
7092 break;
7093 #endif
7094 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
7095 case DMX_PES_VIDEO3_FIFO:
7096 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_V3PES;
7097 break;
7098 case DMX_PES_VIDEO4_FIFO:
7099 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_V4PES;
7100 break;
7101 case DMX_PES_VIDEO5_FIFO:
7102 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_V5PES;
7103 break;
7104 case DMX_PES_VIDEO6_FIFO:
7105 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_V6PES;
7106 break;
7107 case DMX_PES_VIDEO7_FIFO:
7108 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_V7PES;
7109 break;
7110 case DMX_PES_VIDEO8_FIFO:
7111 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_V8PES;
7112 break;
7113 #endif
7114 default:
7115 DMX_ASSERT2(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad DMX_FILEIN_DST %u\n", __LINE__, (unsigned int)Dst)));
7116 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
7117 break;
7118 }
7119
7120 #ifdef SECURE_PVR_ENABLE
7121 _pdmx_res->_stSecBuf.u32BufId = 0;
7122 _pdmx_res->_stSecBuf.u32BufOpt = 0;
7123 _pdmx_res->_stSecBuf.phyBufAddr = pBuf;
7124 _pdmx_res->_stSecBuf.u32BufSize = u32BufSize;
7125 if(MDrv_TSP_Ree_SendTeeCmd(E_DRVTSP_REE_TO_TEE_CMD_SET_FileinBuf, (void*)&(_pdmx_res->_stSecBuf), sizeof(DrvTSP_SecureBuf)) != DRVTSP_OK)
7126 {
7127 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
7128 }
7129 #else
7130
7131 if (DRVTSP_OK != MDrv_TSP_File_SetAddr(pBuf))
7132 {
7133 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
7134 }
7135
7136 if (DRVTSP_OK != MDrv_TSP_File_SetSize(u32BufSize))
7137 {
7138 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
7139 }
7140 #endif //SECURE_PVR_ENABLE
7141
7142 if (DRVTSP_OK!= MDrv_TSP_File_Start(eFileMode))
7143 {
7144 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
7145 }
7146 _DMX_RETURN(DMX_FILTER_STATUS_OK);
7147 }
7148
7149 //-------------------------------------------------------------------------------------------------
7150 /// Stop to get bit stream by memeory
7151 /// @return DMX_FILTER_STATUS_OK - Success
7152 /// @return DMX_FILTER_STATUS_ERROR - Failure
7153 /// @note
7154 //-------------------------------------------------------------------------------------------------
7155 DMX_FILTER_STATUS _MApi_DMX_Filein_Stop(void)
7156 {
7157
7158 #if DMX_DEBUG
7159 if(u32DbgLogFlag & DMX_DBG_LOG_FILEIN);
7160 dmx_dbg_print("[DMX FileIn Stop]\n");
7161 #endif
7162
7163 _DMX_ENTRY();
7164 if (DRVTSP_OK != MDrv_TSP_File_Stop())
7165 {
7166 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
7167 }
7168
7169 _DMX_RETURN(DMX_FILTER_STATUS_OK);
7170 }
7171
7172 //-------------------------------------------------------------------------------------------------
7173 /// Pause to get bit stream by memeory
7174 /// @return DMX_FILTER_STATUS_OK - Success
7175 /// @return DMX_FILTER_STATUS_ERROR - Failure
7176 /// @note
7177 //-------------------------------------------------------------------------------------------------
7178 DMX_FILTER_STATUS _MApi_DMX_Filein_Pause(void)
7179 {
7180 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7181
7182 #if DMX_DEBUG
7183 if(u32DbgLogFlag & DMX_DBG_LOG_FILEIN);
7184 dmx_dbg_print("[DMX FileIn Pause]\n");
7185 #endif
7186
7187 return (DRVTSP_OK== MDrv_TSP_File_Pause())? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR;
7188 }
7189
7190 //-------------------------------------------------------------------------------------------------
7191 /// Resume to get bit stream by memeory
7192 /// @return DMX_FILTER_STATUS_OK - Success
7193 /// @return DMX_FILTER_STATUS_ERROR - Failure
7194 /// @note
7195 //-------------------------------------------------------------------------------------------------
7196 DMX_FILTER_STATUS _MApi_DMX_Filein_Resume(void)
7197 {
7198 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7199
7200 #if DMX_DEBUG
7201 if(u32DbgLogFlag & DMX_DBG_LOG_FILEIN);
7202 dmx_dbg_print("[DMX FileIn Resume]\n");
7203 #endif
7204
7205 return (DRVTSP_OK== MDrv_TSP_File_Resume())? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR;
7206 }
7207
7208 //-------------------------------------------------------------------------------------------------
7209 /// Resume to get bit stream by memeory
7210 /// @return DMX_FILTER_STATUS_OK - Success
7211 /// @return DMX_FILTER_STATUS_ERROR - Failure
7212 /// @note
7213 //-------------------------------------------------------------------------------------------------
7214 DMX_FILTER_STATUS _MApi_DMX_Filein_CMDQ_Reset(void)
7215 {
7216 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7217
7218 #if DMX_DEBUG
7219 if(u32DbgLogFlag & DMX_DBG_LOG_FILEIN);
7220 dmx_dbg_print("[DMX FileIn CMDQ Reset]\n");
7221 #endif
7222
7223 if (MDrv_TSP_File_CMDQ_Reset() == DRVTSP_OK)
7224 {
7225 #ifdef DMX_RESET_FI_TIMESTAMP
7226 if(_pdmx_res->_bPlayTimestampEnable[0] == TRUE)
7227 {
7228 _DMX_ENTRY();
7229 MDrv_TSP_File_SetAddr(_pdmx_res->_phyFI192DummyBufAddr);
7230 MDrv_TSP_File_SetSize(_pdmx_res->_u32FI192DummyBufSize);
7231 MDrv_TSP_File_Start(E_DRVTSP_FILEIN_MODE_ENG0_TS);
7232 _DMX_RETURN(DMX_FILTER_STATUS_OK);
7233 }
7234 #endif
7235
7236 return DMX_FILTER_STATUS_OK;
7237 }
7238 else
7239 {
7240 return DMX_FILTER_STATUS_ERROR;
7241 }
7242 }
7243
7244 //-------------------------------------------------------------------------------------------------
7245 /// Resume to get bit stream by memeory
7246 /// @return DMX_FILTER_STATUS_OK - Success
7247 /// @return DMX_FILTER_STATUS_ERROR - Failure
7248 /// @note
7249 //-------------------------------------------------------------------------------------------------
7250 DMX_FILTER_STATUS _MApi_DMX_Filein_CMDQ_GetEmptyNum(MS_U32 *pu32EmptySlot)
7251 {
7252 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7253
7254 MDrv_TSP_File_CMDQ_GetSlot(pu32EmptySlot);
7255 return DMX_FILTER_STATUS_OK;
7256 }
7257
7258 //-------------------------------------------------------------------------------------------------
7259 /// Get Command queue fifo level
7260 /// @param pu8CmdQStatus \b OUT: fifo level, 0~3
7261 /// @return DMX_FILTER_STATUS
7262 /// @note
7263 //-------------------------------------------------------------------------------------------------
7264 DMX_FILTER_STATUS _MApi_DMX_Filein_CMDQ_FIFOWriteLevel(MS_U8 *pu8CmdQStatus)
7265 {
7266 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7267
7268 MDrv_TSP_CmdQFifo_Status(pu8CmdQStatus);
7269 return DMX_FILTER_STATUS_OK;
7270 }
7271
7272 //-------------------------------------------------------------------------------------------------
7273 /// Check if no memory transfer is under going
7274 /// @return TRUE if idle, FALSE otherwise
7275 /// @note
7276 //-------------------------------------------------------------------------------------------------
7277 MS_BOOL _MApi_DMX_Filein_IsIdle(void)
7278 {
7279 DrvTSP_FileinState FileinState = E_DRVTSP_FILEIN_STATE_BUSY;
7280
7281 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7282
7283 if (DRVTSP_OK!= MDrv_TSP_File_GetState(&FileinState))
7284 {
7285 DMX_ASSERT(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Call MDrv_TSP_File_GetState fail\n", __LINE__)));
7286 }
7287
7288 return (E_DRVTSP_FILEIN_STATE_IDLE== FileinState);
7289
7290 }
7291
7292 //-------------------------------------------------------------------------------------------------
7293 /// Check if memory transfer is under going
7294 /// @return TRUE if busy, FALSE otherwise
7295 /// @note
7296 //-------------------------------------------------------------------------------------------------
7297 MS_BOOL _MApi_DMX_Filein_IsBusy(void)
7298 {
7299 DrvTSP_FileinState FileinState = E_DRVTSP_FILEIN_STATE_IDLE;
7300
7301 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7302
7303 if (DRVTSP_OK!= MDrv_TSP_File_GetState(&FileinState))
7304 {
7305 DMX_ASSERT(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Call MDrv_TSP_File_GetState fail\n", __LINE__)));
7306 }
7307 return (E_DRVTSP_FILEIN_STATE_BUSY== FileinState);
7308 }
7309
7310 //-------------------------------------------------------------------------------------------------
7311 /// Check if memory transfer is paused
7312 /// @return TRUE if paused, FALSE otherwise
7313 /// @note
7314 //-------------------------------------------------------------------------------------------------
7315 MS_BOOL _MApi_DMX_Filein_IsPause(void)
7316 {
7317 DrvTSP_FileinState FileinState = E_DRVTSP_FILEIN_STATE_IDLE;
7318
7319 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7320
7321 if (DRVTSP_OK!= MDrv_TSP_File_GetState(&FileinState))
7322 {
7323 DMX_ASSERT(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Call MDrv_TSP_File_GetState fail\n", __LINE__)));
7324 }
7325 return (E_DRVTSP_FILEIN_STATE_PAUSE== FileinState);
7326 }
7327
7328 DMX_FILTER_STATUS _MApi_DMX_Filein_Eng_Start(DMX_FILEIN_PATH ePath, DMX_FILEIN_DST Dst, MS_PHY pBuf, MS_U32 u32BufSize)
7329 {
7330 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7331
7332 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
7333
7334 if(ePath == DMX_FILEIN_TSIF0)
7335 {
7336 return _MApi_DMX_Filein_Start(Dst, pBuf, u32BufSize);
7337 }
7338 else
7339 {
7340 #if !(defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0))
7341
7342 return DMX_FILTER_STATUS_ERROR;
7343
7344 #else
7345
7346 DMX_MMFI_DST eDst = 0;
7347
7348 if(ePath == DMX_FILEIN_TSIF2)
7349 {
7350 eDst |= DMX_MMFI1_PES_TYPE_MASK;
7351 }
7352
7353 switch (Dst)
7354 {
7355 case DMX_PES_NO_BYPASS_FIFO:
7356 eDst |= DMX_MMFI_PES_NO_BYPASS_TS;
7357 break;
7358 case DMX_PES_AUDIO2_FIFO:
7359 eDst |= DMX_MMFI_PES_PS_AUB;
7360 break;
7361 case DMX_PES_AUDIO_FIFO:
7362 eDst |= DMX_MMFI_PES_PS_AU;
7363 break;
7364 case DMX_PES_VIDEO_FIFO:
7365 eDst |= DMX_MMFI_PES_PS_VD;
7366 break;
7367 #ifdef MMFI_VD3D
7368 case DMX_PES_VIDEO3D_FIFO:
7369 eDst |= DMX_MMFI_PES_PS_V3D;
7370 break;
7371 #endif
7372 case DMX_PES_AUDIO3_FIFO:
7373 eDst |= DMX_MMFI_PES_PS_AUC;
7374 break;
7375 case DMX_PES_AUDIO4_FIFO:
7376 eDst |= DMX_MMFI_PES_PS_AUD;
7377 break;
7378 default:
7379 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad DMX_FILEIN_DST %d\n", __LINE__, (int)Dst));
7380 return DMX_FILTER_STATUS_ERROR;
7381 }
7382
7383 return _MApi_DMX_MMFI_Filein_Start(eDst, pBuf, u32BufSize);
7384
7385 #endif
7386 }
7387
7388 #else // For TSP_VER_4_0
7389
7390 DrvTSP_FileinMode eFileMode;
7391 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping(ePath);
7392
7393 if(eEng == E_TSP_FILE_ENG_INVALID)
7394 return DMX_FILTER_STATUS_ERROR;
7395
7396 _DMX_ENTRY();
7397
7398 switch (Dst)
7399 {
7400 case DMX_PES_NO_BYPASS_FIFO:
7401 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_TS;
7402 break;
7403 case DMX_PES_AUDIO_FIFO:
7404 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_APES;
7405 break;
7406 case DMX_PES_AUDIO2_FIFO:
7407 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_A2PES;
7408 break;
7409 case DMX_PES_AUDIO3_FIFO:
7410 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_A3PES;
7411 break;
7412 case DMX_PES_AUDIO4_FIFO:
7413 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_A4PES;
7414 break;
7415 case DMX_PES_AUDIO5_FIFO:
7416 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_A5PES;
7417 break;
7418 case DMX_PES_AUDIO6_FIFO:
7419 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_A6PES;
7420 break;
7421 case DMX_PES_VIDEO_FIFO:
7422 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_VPES;
7423 break;
7424 #ifdef MMFI_VD3D
7425 case DMX_PES_VIDEO3D_FIFO:
7426 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_V3DPES;
7427 break;
7428 #endif
7429 case DMX_PES_VIDEO3_FIFO:
7430 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_V3PES;
7431 break;
7432 case DMX_PES_VIDEO4_FIFO:
7433 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_V4PES;
7434 break;
7435 case DMX_PES_VIDEO5_FIFO:
7436 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_V5PES;
7437 break;
7438 case DMX_PES_VIDEO6_FIFO:
7439 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_V6PES;
7440 break;
7441 case DMX_PES_VIDEO7_FIFO:
7442 eFileMode = E_DRVTSP_FILEIN_MODE_ENG0_V7PES;
7443 break;
7444
7445 default:
7446 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad DMX_FILEIN_DST %u\n", __LINE__, (unsigned int)Dst));
7447 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
7448 }
7449
7450 #ifdef SECURE_PVR_ENABLE
7451 _pdmx_res->_stSecBuf.u32BufId = (MS_U32)eEng;
7452 _pdmx_res->_stSecBuf.u32BufOpt = 0;
7453 _pdmx_res->_stSecBuf.phyBufAddr = pBuf;
7454 _pdmx_res->_stSecBuf.u32BufSize = u32BufSize;
7455 if(MDrv_TSP_Ree_SendTeeCmd(E_DRVTSP_REE_TO_TEE_CMD_SET_FileinBuf, (void*)&(_pdmx_res->_stSecBuf), sizeof(DrvTSP_SecureBuf)) != DRVTSP_OK)
7456 {
7457 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
7458 }
7459 #else
7460 if (DRVTSP_OK != MDrv_TSP_File_Eng_SetSize(eEng, u32BufSize))
7461 {
7462 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
7463 }
7464 if (DRVTSP_OK != MDrv_TSP_File_Eng_SetAddr(eEng, pBuf))
7465 {
7466 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
7467 }
7468 #endif
7469
7470 if (DRVTSP_OK!= MDrv_TSP_File_Eng_Start(eEng, eFileMode))
7471 {
7472 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
7473 }
7474 _DMX_RETURN(DMX_FILTER_STATUS_OK);
7475
7476 #endif // End of TSP_VER_4_0
7477 }
7478
7479 DMX_FILTER_STATUS _MApi_DMX_Filein_Eng_Stop(DMX_FILEIN_PATH ePath)
7480 {
7481 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7482
7483 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
7484
7485 if(ePath == DMX_FILEIN_TSIF0)
7486 {
7487 return _MApi_DMX_Filein_Stop();
7488 }
7489 else
7490 {
7491 #if !(defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0))
7492 return DMX_FILTER_STATUS_ERROR;
7493 #else
7494
7495 DMX_MMFI_DST eDst = 0;
7496
7497 if(ePath == DMX_FILEIN_TSIF2)
7498 {
7499 eDst |= DMX_MMFI1_PES_TYPE_MASK;
7500 }
7501
7502 if(MDrv_MMFI_File_ModeEnable(eDst, FALSE) == DRVMMFI_FAIL)
7503 {
7504 return DMX_FILTER_STATUS_ERROR;
7505 }
7506 else
7507 {
7508 return DMX_FILTER_STATUS_OK;
7509 }
7510 #endif
7511 }
7512
7513 #else // For TSP_VER_4_0
7514
7515 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping(ePath);
7516
7517 if(eEng == E_TSP_FILE_ENG_INVALID)
7518 return DMX_FILTER_STATUS_ERROR;
7519
7520 _DMX_ENTRY();
7521
7522 if (DRVTSP_OK != MDrv_TSP_File_Eng_Stop(eEng))
7523 {
7524 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
7525 }
7526
7527 _DMX_RETURN(DMX_FILTER_STATUS_OK);
7528
7529 #endif // End of TSP_VER_4_0
7530 }
7531
7532 DMX_FILTER_STATUS _MApi_DMX_Filein_Eng_Info(DMX_FILEIN_PATH ePath, DMX_Filein_info *pFileinInfo)
7533 {
7534 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7535
7536 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
7537
7538 if(ePath == DMX_FILEIN_TSIF0)
7539 {
7540 MDrv_TSP_File_SetPacketMode((DrvTSP_PacketMode)(pFileinInfo->PKT_Mode));
7541 return (DRVTSP_OK == MDrv_TSP_File_SetRate(pFileinInfo->Rate))? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR;
7542 }
7543 else
7544 {
7545 #if !(defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0))
7546 return DMX_FILTER_STATUS_ERROR;
7547 #else
7548
7549 DMX_MMFI_PATH mmpath = DMX_MMFI_PATH0;
7550
7551 if(ePath == DMX_FILEIN_TSIF2)
7552 {
7553 mmpath = DMX_MMFI_PATH1;
7554 }
7555 return _MApi_DMX_MMFI_Filein_Info(mmpath, pFileinInfo);
7556 #endif
7557 }
7558 #else // For TSP_VER_4_0
7559
7560 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping(ePath);
7561
7562 if(eEng == E_TSP_FILE_ENG_INVALID)
7563 return DMX_FILTER_STATUS_ERROR;
7564
7565 // @F_TODO we set every PATH with same parameter???? add info function for MMFI
7566 #if 0
7567 #if defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0)
7568 MDrv_MMFI_File_SetPacketMode(E_DRVMMFI_PATH0, (DrvMMFI_PacketMode)pFileinInfo->PKT_Mode);
7569 MDrv_MMFI_File_SetTimer(E_DRVMMFI_PATH0, (MS_U8)(pFileinInfo->Rate & 0xFF));
7570 MDrv_MMFI_File_SetPacketMode(E_DRVMMFI_PATH1, (DrvMMFI_PacketMode)pFileinInfo->PKT_Mode);
7571 MDrv_MMFI_File_SetTimer(E_DRVMMFI_PATH1, (MS_U8)(pFileinInfo->Rate & 0xFF));
7572 #else //MMFI_VER_2_0
7573
7574 #ifdef MMFILEIN
7575 MDrv_MMFI_File_SetPacketMode(E_DRVMMFI_PTH_AUDIO, (DrvMMFI_PacketMode)pFileinInfo->PKT_Mode);
7576 MDrv_MMFI_File_SetTimer(E_DRVMMFI_PTH_AUDIO, (MS_U8)(pFileinInfo->Rate & 0xFF));
7577 #endif //MMFILEIN
7578
7579 #ifdef MMFI_VD3D
7580 MDrv_MMFI_File_SetPacketMode(E_DRVMMFI_PATH_VD3D, (DrvMMFI_PacketMode)pFileinInfo->PKT_Mode);
7581 MDrv_MMFI_File_SetTimer(E_DRVMMFI_PATH_VD3D, (MS_U8)(pFileinInfo->Rate & 0xFF));
7582 #endif //MMFILEIN
7583
7584 #endif //MMFI_VER_2_0
7585 #endif
7586
7587 MDrv_TSP_File_Eng_SetPacketMode(eEng, (DrvTSP_PacketMode)(pFileinInfo->PKT_Mode));
7588
7589 return (DRVTSP_OK == MDrv_TSP_File_Eng_SetRate(eEng, pFileinInfo->Rate))? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR;
7590
7591 #endif // End of TSP_VER_4_0
7592 }
7593
7594 DMX_FILTER_STATUS _MApi_DMX_Filein_Eng_Pause(DMX_FILEIN_PATH ePath)
7595 {
7596 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7597
7598 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
7599
7600 if(ePath == DMX_FILEIN_TSIF0)
7601 {
7602 return _MApi_DMX_Filein_Pause();
7603 }
7604 else
7605 {
7606 return DMX_FILTER_STATUS_ERROR;
7607 }
7608 #else // For TSP_VER_4_0
7609
7610 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping(ePath);
7611
7612 if(eEng == E_TSP_FILE_ENG_INVALID)
7613 return DMX_FILTER_STATUS_ERROR;
7614
7615 return (DRVTSP_OK == MDrv_TSP_File_Eng_Pause(eEng))? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR;
7616
7617 #endif // End of TSP_VER_4_0
7618 }
7619
7620 DMX_FILTER_STATUS _MApi_DMX_Filein_Eng_Resume(DMX_FILEIN_PATH ePath)
7621 {
7622 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7623
7624 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
7625
7626 if(ePath == DMX_FILEIN_TSIF0)
7627 {
7628 return _MApi_DMX_Filein_Resume();
7629 }
7630 else
7631 {
7632 return DMX_FILTER_STATUS_ERROR;
7633 }
7634 #else // For TSP_VER_4_0
7635
7636 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping(ePath);
7637
7638 if(eEng == E_TSP_FILE_ENG_INVALID)
7639 return DMX_FILTER_STATUS_ERROR;
7640
7641 return (DRVTSP_OK== MDrv_TSP_FILE_Eng_Resume(eEng))? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR;
7642
7643 #endif // End of TSP_VER_4_0
7644 }
7645
7646 MS_BOOL _MApi_DMX_Filein_Eng_IsIdle(DMX_FILEIN_PATH ePath)
7647 {
7648 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7649
7650 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
7651
7652 if(ePath == DMX_FILEIN_TSIF0)
7653 {
7654 return _MApi_DMX_Filein_IsIdle();
7655 }
7656 else
7657 {
7658 #if !(defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0))
7659 return DMX_FILTER_STATUS_ERROR;
7660 #else
7661 DMX_MMFI_PATH mmpath = DMX_MMFI_PATH0;
7662
7663 if(ePath == DMX_FILEIN_TSIF2)
7664 mmpath = DMX_MMFI_PATH1;
7665
7666 return _MApi_DMX_MMFI_Filein_IsIdle(mmpath);
7667 #endif
7668 }
7669 #else // For TSP_VER_4_0
7670
7671 DrvTSP_FileinState FileinState = E_DRVTSP_FILEIN_STATE_BUSY;
7672 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping(ePath);
7673
7674 if(eEng == E_TSP_FILE_ENG_INVALID)
7675 return DMX_FILTER_STATUS_ERROR;
7676
7677 if (DRVTSP_OK!= MDrv_TSP_File_Eng_GetState(eEng, &FileinState))
7678 {
7679 DMX_ASSERT(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Call MDrv_TSP_File_GetState fail\n", __LINE__)));
7680 }
7681
7682 return (E_DRVTSP_FILEIN_STATE_IDLE== FileinState);
7683
7684 #endif // End of TSP_VER_4_0
7685 }
7686
7687 MS_BOOL _MApi_DMX_Filein_Eng_IsBusy(DMX_FILEIN_PATH ePath)
7688 {
7689 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7690
7691 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
7692
7693 if(ePath == DMX_FILEIN_TSIF0)
7694 {
7695 return _MApi_DMX_Filein_IsBusy();
7696 }
7697 else
7698 {
7699 #if !(defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0))
7700 return DMX_FILTER_STATUS_ERROR;
7701 #else
7702 DMX_MMFI_PATH mmpath = DMX_MMFI_PATH0;
7703
7704 if(ePath == DMX_FILEIN_TSIF2)
7705 mmpath = DMX_MMFI_PATH1;
7706
7707 return _MApi_DMX_MMFI_Filein_IsBusy(mmpath);
7708 #endif
7709 }
7710 #else // For TSP_VER_4_0
7711
7712 DrvTSP_FileinState FileinState = E_DRVTSP_FILEIN_STATE_IDLE;
7713 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping(ePath);
7714
7715 if(eEng == E_TSP_FILE_ENG_INVALID)
7716 return DMX_FILTER_STATUS_ERROR;
7717
7718 if (DRVTSP_OK!= MDrv_TSP_File_Eng_GetState(eEng, &FileinState))
7719 {
7720 DMX_ASSERT(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Call MDrv_TSP_File_GetState fail\n", __LINE__)));
7721 }
7722
7723 return (E_DRVTSP_FILEIN_STATE_BUSY == FileinState);
7724
7725 #endif // End of TSP_VER_4_0
7726 }
7727
7728 MS_BOOL _MApi_DMX_Filein_Eng_IsPause(DMX_FILEIN_PATH ePath)
7729 {
7730 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7731
7732 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
7733 if(ePath == DMX_FILEIN_TSIF0)
7734 {
7735 return _MApi_DMX_Filein_IsPause();
7736 }
7737 else
7738 {
7739 return DMX_FILTER_STATUS_ERROR;
7740 }
7741 #else // For TSP_VER_4_0
7742
7743 DrvTSP_FileinState FileinState = E_DRVTSP_FILEIN_STATE_IDLE;
7744 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping(ePath);
7745
7746 if(eEng == E_TSP_FILE_ENG_INVALID)
7747 return DMX_FILTER_STATUS_ERROR;
7748
7749 if (DRVTSP_OK!= MDrv_TSP_File_Eng_GetState(eEng, &FileinState))
7750 {
7751 DMX_ASSERT(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Call MDrv_TSP_File_GetState fail\n", __LINE__)));
7752 }
7753
7754 return (E_DRVTSP_FILEIN_STATE_PAUSE== FileinState);
7755
7756 #endif // End of TSP_VER_4_0
7757 }
7758
7759 // if we reset CMDQ when file in in busy .... filein hangs....
7760 // @NOTE this is fixed in Kaiser
7761 DMX_FILTER_STATUS _MApi_DMX_Filein_Eng_CMDQ_Reset(DMX_FILEIN_PATH ePath)
7762 {
7763 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7764
7765 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
7766
7767 if(ePath == DMX_FILEIN_TSIF0)
7768 {
7769 return _MApi_DMX_Filein_CMDQ_Reset();
7770 }
7771 else
7772 {
7773 #if !(defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0))
7774 return DMX_FILTER_STATUS_ERROR;
7775 #else
7776 DMX_MMFI_PATH mmpath = DMX_MMFI_PATH0;
7777
7778 if(ePath == DMX_FILEIN_TSIF2)
7779 mmpath = DMX_MMFI_PATH1;
7780
7781 return _MApi_DMX_MMFI_Filein_CMDQ_Reset(mmpath);
7782 #endif
7783 }
7784 #else // For TSP_VER_4_0
7785
7786 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping(ePath);
7787
7788 if(eEng == E_TSP_FILE_ENG_INVALID)
7789 return DMX_FILTER_STATUS_ERROR;
7790
7791 if (DRVTSP_OK == MDrv_TSP_File_Eng_CMDQ_Reset(eEng))
7792 {
7793 return DMX_FILTER_STATUS_OK;
7794 }
7795 else
7796 {
7797 return DMX_FILTER_STATUS_ERROR;
7798 }
7799 #endif // End of TSP_VER_4_0
7800 }
7801
7802 DMX_FILTER_STATUS _MApi_DMX_Filein_Eng_CMDQ_GetEmptyNum(DMX_FILEIN_PATH ePath, MS_U32 *pu32EmptySlot)
7803 {
7804 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7805
7806 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
7807
7808 if(ePath == DMX_FILEIN_TSIF0)
7809 {
7810 return _MApi_DMX_Filein_CMDQ_GetEmptyNum(pu32EmptySlot);
7811 }
7812 else
7813 {
7814 #if !(defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0))
7815 return DMX_FILTER_STATUS_ERROR;
7816 #else
7817 DMX_MMFI_PATH mmpath = DMX_MMFI_PATH0;
7818
7819 if(ePath == DMX_FILEIN_TSIF2)
7820 mmpath = DMX_MMFI_PATH1;
7821
7822 return _MApi_DMX_MMFI_Filein_CMDQ_GetEmptyNum(mmpath, pu32EmptySlot);
7823 #endif
7824 }
7825 #else // For TSP_VER_4_0
7826
7827 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping(ePath);
7828
7829 if(eEng == E_TSP_FILE_ENG_INVALID)
7830 return DMX_FILTER_STATUS_ERROR;
7831
7832 if (DRVTSP_OK == MDrv_TSP_File_Eng_CMDQ_GetSlot(eEng, pu32EmptySlot))
7833 {
7834 return DMX_FILTER_STATUS_OK;
7835 }
7836 else
7837 {
7838 return DMX_FILTER_STATUS_ERROR;
7839 }
7840 #endif // End of TSP_VER_4_0
7841 }
7842
7843 void _MApi_DMX_Filein_Eng_BypassFileInTimeStamp(DMX_FILEIN_PATH ePath, MS_BOOL bbypass)
7844 {
7845 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7846
7847 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
7848
7849 if(ePath == DMX_FILEIN_TSIF0)
7850 {
7851 _MApi_DMX_BypassFileInTimeStamp(bbypass);
7852 }
7853 else
7854 {
7855 #if (defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0))
7856
7857 DMX_MMFI_PATH mmpath = DMX_MMFI_PATH0;
7858
7859 if(ePath == DMX_FILEIN_TSIF2)
7860 mmpath = DMX_MMFI_PATH1;
7861
7862 _MApi_DMX_MMFI_Filein_BypassTimeStamp(mmpath, bbypass);
7863 #endif
7864 }
7865 #else // For TSP_VER_4_0
7866
7867 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping(ePath);
7868 MDrv_TSP_FILE_Eng_192BlockScheme_En(eEng, !bbypass);
7869
7870 #endif // End of TSP_VER_4_0
7871 }
7872
7873 DMX_FILTER_STATUS _MApi_DMX_Filein_Eng_CMDQ_FIFOWriteLevel(DMX_FILEIN_PATH ePath, MS_U8 *pu8CmdQStatus)
7874 {
7875 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
7876
7877 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7878
7879 if(ePath == DMX_FILEIN_TSIF0)
7880 {
7881 return _MApi_DMX_Filein_CMDQ_FIFOWriteLevel(pu8CmdQStatus);
7882 }
7883 else
7884 {
7885 #if !(defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0))
7886 return DMX_FILTER_STATUS_ERROR;
7887 #else
7888 DMX_MMFI_PATH mmpath = DMX_MMFI_PATH0;
7889
7890 if(ePath == DMX_FILEIN_TSIF2)
7891 mmpath = DMX_MMFI_PATH1;
7892
7893 return _MApi_DMX_MMFI_Filein_CMDQ_FIFOWriteLevel(mmpath, pu8CmdQStatus);
7894 #endif
7895 }
7896 #else // For TSP_VER_4_0
7897
7898 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping(ePath);
7899
7900 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7901
7902 if (DRVTSP_OK == MDrv_TSP_FILE_Eng_CmdQFifo_Status(eEng, pu8CmdQStatus))
7903 {
7904 return DMX_FILTER_STATUS_OK;
7905 }
7906 else
7907 {
7908 return DMX_FILTER_STATUS_ERROR;
7909 }
7910 #endif // End of TSP_VER_4_0
7911 }
7912
7913 DMX_FILTER_STATUS _MApi_DMX_Filein_Eng_GetFileInTimeStamp(DMX_FILEIN_PATH ePath, MS_U32 *pu32FileInTS)
7914 {
7915 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7916
7917 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
7918
7919 if(ePath == DMX_FILEIN_TSIF0)
7920 {
7921 return _MApi_DMX_GetFileInTimeStamp(pu32FileInTS);
7922 }
7923 else
7924 {
7925 #if !(defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0))
7926 return DMX_FILTER_STATUS_ERROR;
7927 #else
7928 DMX_MMFI_PATH mmpath = DMX_MMFI_PATH0;
7929
7930 if(ePath == DMX_FILEIN_TSIF2)
7931 mmpath = DMX_MMFI_PATH1;
7932
7933 return _MApi_DMX_MMFI_GetFileInTimeStamp(mmpath, pu32FileInTS);
7934 #endif
7935 }
7936 #else // For TSP_VER_4_0
7937
7938 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping(ePath);
7939
7940 if(eEng == E_TSP_FILE_ENG_INVALID)
7941 return DMX_FILTER_STATUS_ERROR;
7942
7943 if (DRVTSP_OK == MDrv_TSP_FILE_Eng_GetFileInTimeStamp(eEng, pu32FileInTS))
7944 {
7945 return DMX_FILTER_STATUS_OK;
7946 }
7947 else
7948 {
7949 return DMX_FILTER_STATUS_ERROR;
7950 }
7951 #endif // End of TSP_VER_4_0
7952 }
7953
7954 DMX_FILTER_STATUS _MApi_DMX_Filein_Eng_GetReadAddr(DMX_FILEIN_PATH ePath, MS_PHY* pphyead)
7955 {
7956 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
7957
7958 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
7959
7960 if(ePath == DMX_FILEIN_TSIF0)
7961 {
7962 return _MApi_DMX_Filein_GetReadAddr(pphyead);
7963 }
7964 else
7965 {
7966 #if !(defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0))
7967 return DMX_FILTER_STATUS_ERROR;
7968 #else
7969
7970 DMX_MMFI_PATH mmpath = DMX_MMFI_PATH0;
7971
7972 if(ePath == DMX_FILEIN_TSIF2)
7973 mmpath = DMX_MMFI_PATH1;
7974
7975 return MDrv_MMFI_File_GetReadAddr(mmpath, pphyead);
7976 #endif
7977 }
7978 #else // For TSP_VER_4_0
7979 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping(ePath);
7980
7981 if(eEng == E_TSP_FILE_ENG_INVALID)
7982 return DMX_FILTER_STATUS_ERROR;
7983
7984 if (E_TSP_OK == MDrv_TSP_FILE_Eng_GetFileInCurReadAddr(eEng,pphyead))
7985 {
7986 return DMX_FILTER_STATUS_OK;
7987 }
7988 else
7989 {
7990 return DMX_FILTER_STATUS_ERROR;
7991 }
7992 #endif // End of TSP_VER_4_0
7993 }
7994
7995 //-------------------------------------------------------------------------------------------------
7996 /// Enable FileEng Playback time stamp
7997 /// @return DMX_FILTER_STATUS_OK - Success
7998 /// @return DMX_FILTER_STATUS_ERROR - Failure
7999 /// @note
8000 //-------------------------------------------------------------------------------------------------
8001 DMX_FILTER_STATUS _MApi_DMX_Filein_Eng_PlaybackTimeStampEnable(DMX_FILEIN_PATH ePath)
8002 {
8003 DMX_PVRDBGMSG(DMX_DBG_PVR, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
8004
8005 #if DMX_DEBUG
8006 if(u32DbgLogFlag & DMX_DBG_LOG_FILEIN);
8007 dmx_dbg_print("[DMX FileIn timestamp enable]\tPath[%d]\n", (MS_U32)ePath);
8008 #endif
8009
8010 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
8011
8012 if(ePath == DMX_FILEIN_TSIF0)
8013 {
8014 return _MApi_DMX_Pvr_TimeStampEnable();
8015 }
8016 else
8017 {
8018 #if !(defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0))
8019 return DMX_FILTER_STATUS_ERROR;
8020 #else
8021 DMX_MMFI_PATH mmpath = DMX_MMFI_PATH0;
8022
8023 if(ePath == DMX_FILEIN_TSIF2)
8024 mmpath = DMX_MMFI_PATH1;
8025
8026 return _MApi_DMX_MMFI_TimeStampEnable(mmpath);
8027 #endif
8028 }
8029 #else // For TSP_VER_4_0
8030 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping(ePath);
8031
8032 if(eEng == E_TSP_FILE_ENG_INVALID)
8033 return DMX_FILTER_STATUS_ERROR;
8034
8035 return (DRVTSP_OK== MDrv_TSP_FILE_Eng_TimeStampEnablePlaybackStamp(eEng,TRUE))? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR;
8036 #endif // End of TSP_VER_4_0
8037 }
8038
8039 //-------------------------------------------------------------------------------------------------
8040 /// Disable FileEng Playback time stamp
8041 /// @return DMX_FILTER_STATUS_OK - Success
8042 /// @return DMX_FILTER_STATUS_ERROR - Failure
8043 /// @note
8044 //-------------------------------------------------------------------------------------------------
8045 DMX_FILTER_STATUS _MApi_DMX_Filein_Eng_PlaybackTimeStampDisable(DMX_FILEIN_PATH ePath)
8046 {
8047 DMX_PVRDBGMSG(DMX_DBG_PVR, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
8048
8049 #if DMX_DEBUG
8050 if(u32DbgLogFlag & DMX_DBG_LOG_FILEIN);
8051 dmx_dbg_print("[DMX FileIn timestamp disable]\tPath[%d]\n", (MS_S32)ePath);
8052 #endif
8053
8054 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
8055
8056 if(ePath == DMX_FILEIN_TSIF0)
8057 {
8058 return _MApi_DMX_Pvr_TimeStampDisable();
8059 }
8060 else
8061 {
8062 #if !(defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0))
8063 return DMX_FILTER_STATUS_ERROR;
8064 #else
8065 DMX_MMFI_PATH mmpath = DMX_MMFI_PATH0;
8066
8067 if(ePath == DMX_FILEIN_TSIF2)
8068 mmpath = DMX_MMFI_PATH1;
8069
8070 return _MApi_DMX_MMFI_TimeStampDisable(mmpath);
8071
8072 #endif
8073 }
8074 #else // For TSP_VER_4_0
8075 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping(ePath);
8076
8077 if(eEng == E_TSP_FILE_ENG_INVALID)
8078 return DMX_FILTER_STATUS_ERROR;
8079
8080 return (DRVTSP_OK== MDrv_TSP_FILE_Eng_TimeStampEnablePlaybackStamp(eEng,FALSE))? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR;
8081 #endif // End of TSP_VER_4_0
8082 }
8083
8084 //-------------------------------------------------------------------------------------------------
8085 /// Set playback time stamp
8086 /// @return DMX_FILTER_STATUS_OK - Success
8087 /// @return DMX_FILTER_STATUS_ERROR - Failure
8088 /// @note
8089 //-------------------------------------------------------------------------------------------------
8090 DMX_FILTER_STATUS _MApi_DMX_Filein_Eng_SetPlaybackStamp(DMX_FILEIN_PATH ePath,MS_U32 u32Stamp)
8091 {
8092 DMX_PVRDBGMSG(DMX_DBG_PVR, ULOGD("DMX", "[%s] %d (%u)\n", __FUNCTION__, __LINE__, (unsigned int)u32Stamp));
8093
8094 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
8095
8096 if(ePath == DMX_FILEIN_TSIF0)
8097 {
8098 return _MApi_DMX_Pvr_SetPlaybackStamp(u32Stamp);
8099 }
8100 else
8101 {
8102 #if !(defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0))
8103 return DMX_FILTER_STATUS_ERROR;
8104 #else
8105 DMX_MMFI_PATH mmpath = DMX_MMFI_PATH0;
8106
8107 if(ePath == DMX_FILEIN_TSIF2)
8108 mmpath = DMX_MMFI_PATH1;
8109
8110 return _MApi_DMX_MMFI_SetPlaybackTimeStamp(mmpath, u32Stamp);
8111 #endif
8112 }
8113 #else // For TSP_VER_4_0
8114 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping(ePath);
8115
8116 if(eEng == E_TSP_FILE_ENG_INVALID)
8117 return DMX_FILTER_STATUS_ERROR;
8118
8119 return (DRVTSP_OK== MDrv_TSP_FILE_Eng_TimeStampSetPlaybackStamp(eEng,u32Stamp))? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR;
8120 #endif // End of TSP_VER_4_0
8121 }
8122
8123 //-------------------------------------------------------------------------------------------------
8124 /// Get playback time stamp
8125 /// @return DMX_FILTER_STATUS_OK - Success
8126 /// @return DMX_FILTER_STATUS_ERROR - Failure
8127 /// @note
8128 //-------------------------------------------------------------------------------------------------
8129 DMX_FILTER_STATUS _MApi_DMX_Filein_Eng_GetPlaybackStamp(DMX_FILEIN_PATH ePath,MS_U32* pu32Stamp)
8130 {
8131 DMX_PVRDBGMSG(DMX_DBG_PVR, ULOGD("DMX", "[%s] %d (0x%p)\n", __FUNCTION__, __LINE__, pu32Stamp));
8132
8133 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
8134
8135 if(ePath == DMX_FILEIN_TSIF0)
8136 {
8137 return _MApi_DMX_Pvr_GetPlaybackStamp(pu32Stamp);
8138 }
8139 else
8140 {
8141 #if !(defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0))
8142 return DMX_FILTER_STATUS_ERROR;
8143 #else
8144 DMX_MMFI_PATH mmpath = DMX_MMFI_PATH0;
8145
8146 if(ePath == DMX_FILEIN_TSIF2)
8147 mmpath = DMX_MMFI_PATH1;
8148
8149 return _MApi_DMX_MMFI_GetPlaybackTimeStamp(mmpath, pu32Stamp);
8150 #endif
8151 }
8152 #else // For TSP_VER_4_0
8153
8154 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping(ePath);
8155
8156 if(eEng == E_TSP_FILE_ENG_INVALID)
8157 return DMX_FILTER_STATUS_ERROR;
8158
8159 return (DRVTSP_OK== MDrv_TSP_FILE_Eng_TimeStampGetPlaybackStamp(eEng,pu32Stamp))? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR;
8160 #endif // End of TSP_VER_4_0
8161 }
8162
8163 DMX_FILTER_STATUS _MApi_DMX_Filein_Eng_MOBF_Enable(DMX_FILEIN_PATH ePath, MS_BOOL bEnable, MS_U32 u32key)
8164 {
8165 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
8166
8167 if(ePath == DMX_FILEIN_TSIF0)
8168 {
8169 return _MApi_DMX_Filein_MOBF_Enable(bEnable, u32key);
8170 }
8171 else
8172 {
8173 #if !(defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0))
8174 return DMX_FILTER_STATUS_ERROR;
8175 #else
8176 DMX_MMFI_PATH mmpath = DMX_MMFI_PATH0;
8177
8178 if(ePath == DMX_FILEIN_TSIF2)
8179 mmpath = DMX_MMFI_PATH1;
8180
8181 return _MApi_DMX_MMFI_MOBF_Enable(mmpath, bEnable, u32key);
8182 #endif
8183 }
8184 #else // For TSP_VER_4_0
8185 DMX_FILTER_STATUS eRet;
8186
8187 TSP_FILE_ENG eEng = _DMX_ApiDrv_FileinEngMapping(ePath);
8188
8189 if(eEng == E_TSP_FILE_ENG_INVALID)
8190 return DMX_FILTER_STATUS_ERROR;
8191
8192 _DMX_ENTRY();
8193 eRet = MDrv_TSP_FILE_Eng_MOBF_Enable(eEng, bEnable, u32key);
8194 _DMX_RETURN(eRet);
8195 #endif // End of TSP_VER_4_0
8196 }
8197
8198 //-------------------------------------------------------------------------------------------------
8199 /// Allocate DMX resource
8200 /// @param eResType \b IN: Resource type to allocate
8201 /// @param pRes \b OUT: Pointer to store resource content
8202 /// @return DMX_FILTER_STATUS_OK - Success
8203 /// @return DMX_FILTER_STATUS_ERROR - Failure
8204 /// @note
8205 /// Please use below resource content for the such resource item
8206 /// DMX_RES_STC_ENG: MS_U32 u32STCEng
8207 //-------------------------------------------------------------------------------------------------
8208 DMX_FILTER_STATUS _MApi_DMX_ResAllocate(DMX_RES_TYPE eResType, void *pRes)
8209 {
8210 #if(!(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))) // For TSP_VER_3_0 and TSP_VER_4_0
8211
8212 TSP_Result eRet = DRVTSP_OK;
8213 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
8214
8215 _DMX_ENTRY();
8216
8217 switch(eResType)
8218 {
8219 case DMX_RES_STC_ENG:
8220 eRet = MDrv_TSP_STC_Alloc((MS_U32*)pRes);
8221 break;
8222 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
8223
8224 case DMX_RES_FLOW_PB_LIVE:
8225 case DMX_RES_FLOW_PB_FILE:
8226 {
8227 MS_U32 u32PathId = 0;
8228 DRV_TSP_PATH_TYPE eDrvTspPathType = (eResType == DMX_RES_FLOW_PB_LIVE)? E_DRV_TSP_PATH_LIVE : E_DRV_TSP_PATH_FILE;
8229
8230 eRet = MDrv_TSP_Path_Alloc(eDrvTspPathType, &u32PathId);
8231 _DMX_ApiDrv_DmxFlowReverseMapping((TSP_TSIF)u32PathId, pRes);
8232 }
8233 break;
8234 case DMX_RES_FLOW_MMFI:
8235 {
8236 MS_U32 u32PathId = 0;
8237
8238 eRet = (MDrv_MMFI_Path_Alloc(&u32PathId) == DRVMMFI_OK)? DMX_FILTER_STATUS_OK : DMX_FILTER_STATUS_ERROR;
8239
8240 switch((DrvMMFI_Path)u32PathId)
8241 {
8242 case E_DRVMMFI_PATH0:
8243 *((MS_U32*)pRes) = DMX_FLOW_MMFI0;
8244 break;
8245 case E_DRVMMFI_PATH1:
8246 *((MS_U32*)pRes) = DMX_FLOW_MMFI1;
8247 break;
8248 default:
8249 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[%s] %d Type not support !!\n", __FUNCTION__, __LINE__));
8250 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
8251 }
8252 }
8253 break;
8254
8255 #endif // End of TSP_VER_4_0
8256 default:
8257 DMX_DBGMSG(DMX_DBG_ERR, ULOGD("DMX", "[%s] %d Type not support !!\n", __FUNCTION__, __LINE__));
8258 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
8259 }
8260
8261 if(eRet == DRVTSP_OK)
8262 {
8263 _DMX_RETURN(DMX_FILTER_STATUS_OK);
8264 }
8265 else if(eRet == DRVTSP_NOT_SUPPORTED)
8266 {
8267 _DMX_RETURN(DMX_FILTER_STATUS_NOT_SUPPORT);
8268 }
8269 else
8270 {
8271 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
8272 }
8273 #else
8274 return DMX_FILTER_STATUS_NOT_SUPPORT;
8275 #endif
8276 }
8277
8278 //-------------------------------------------------------------------------------------------------
8279 /// Free DMX resource
8280 /// @param eResType \b IN: Resource type to free
8281 /// @param pRes \b IN: Pointer to store resource content
8282 /// @return DMX_FILTER_STATUS_OK - Success
8283 /// @return DMX_FILTER_STATUS_ERROR - Failure
8284 /// @note
8285 /// Please use below resource content for the such resource item
8286 /// DMX_RES_STC_ENG: MS_U32 u32STCEng
8287 //-------------------------------------------------------------------------------------------------
8288 DMX_FILTER_STATUS _MApi_DMX_ResFree(DMX_RES_TYPE eResType, void *pRes)
8289 {
8290 #if(!(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))) // For TSP_VER_3_0 and TSP_VER_4_0
8291
8292 TSP_Result eRet = DRVTSP_OK;
8293 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
8294
8295 _DMX_ENTRY();
8296
8297 switch(eResType)
8298 {
8299 case DMX_RES_STC_ENG:
8300 eRet = MDrv_TSP_STC_Free(*((MS_U32*)pRes));
8301 break;
8302 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
8303
8304 case DMX_RES_FLOW_PB_LIVE:
8305 case DMX_RES_FLOW_PB_FILE:
8306 {
8307 DRV_TSP_PATH_TYPE eDrvTspPathType = (eResType == DMX_RES_FLOW_PB_LIVE)? E_DRV_TSP_PATH_LIVE : E_DRV_TSP_PATH_FILE;
8308 MS_U32 u32PathId = 0;
8309
8310 _DMX_ApiDrv_DmxFlowMapping(*((MS_U32*)pRes), &u32PathId);
8311 eRet = MDrv_TSP_Path_Free(eDrvTspPathType, (TSP_TSIF)u32PathId);
8312 }
8313 break;
8314 case DMX_RES_FLOW_MMFI:
8315 {
8316 DrvMMFI_Path ePath = E_DRVMMFI_PATH0;
8317
8318 switch(*(MS_U32*)pRes)
8319 {
8320 case DMX_FLOW_MMFI0:
8321 ePath = E_DRVMMFI_PATH0;
8322 break;
8323 case DMX_FLOW_MMFI1:
8324 ePath = E_DRVMMFI_PATH1;
8325 break;
8326 default:
8327 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[%s] %d Type not support !!\n", __FUNCTION__, __LINE__));
8328 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
8329 }
8330
8331 eRet = MDrv_MMFI_Path_Free(ePath);
8332 }
8333 break;
8334
8335 #endif // End of TSP_VER_4_0
8336 default:
8337 DMX_DBGMSG(DMX_DBG_ERR, ULOGD("DMX", "[%s] %d Type not support !!\n", __FUNCTION__, __LINE__));
8338 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
8339 }
8340
8341 if(eRet == DRVTSP_OK)
8342 {
8343 _DMX_RETURN(DMX_FILTER_STATUS_OK);
8344 }
8345 else if(eRet == DRVTSP_NOT_SUPPORTED)
8346 {
8347 _DMX_RETURN(DMX_FILTER_STATUS_NOT_SUPPORT);
8348 }
8349 else
8350 {
8351 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
8352 }
8353 #else
8354 return DMX_FILTER_STATUS_NOT_SUPPORT;
8355 #endif
8356 }
8357
8358 //-------------------------------------------------------------------------------------------------
8359 /// Get STC engine which PCR PID index mapping to
8360 /// @param PcrFltId \b IN: PCR PID index
8361 /// @param u32StcEng \b OUT: STC engine id
8362 /// @return DMX_FILTER_STATUS_OK - Success
8363 /// @return DMX_FILTER_STATUS_ERROR - Failure
8364 /// @note
8365 //-------------------------------------------------------------------------------------------------
8366 DMX_FILTER_STATUS _MApi_DMX_Pcr_Get_MapSTC(MS_U32 u32PcrFltId, MS_U32 *pu32StcEng)
8367 {
8368 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
8369 DMX_FILTER_STATUS ret = DMX_FILTER_STATUS_ERROR;
8370 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
8371
8372 _DMX_ENTRY();
8373
8374 if(MDrv_TSP_PcrId_To_StcId(u32PcrFltId, pu32StcEng) == DRVTSP_OK)
8375 {
8376 ret = DMX_FILTER_STATUS_OK;
8377 }
8378
8379 _DMX_RETURN(ret);
8380 #else
8381 return DMX_FILTER_STATUS_ERROR;
8382 #endif
8383 }
8384
8385 //-------------------------------------------------------------------------------------------------
8386 /// Get STC counter
8387 /// @param u8Eng \b IN: STC Engine ID
8388 /// @param pu32Stc32 \b OUT: STC counter (bit 32)
8389 /// @param pu32Stc \b OUT: STC counter (bit 31 to bit 0)
8390 /// @return DMX_FILTER_STATUS_OK - Success
8391 /// @return DMX_FILTER_STATUS_ERROR - Failure
8392 /// @note
8393 //-------------------------------------------------------------------------------------------------
8394 DMX_FILTER_STATUS _MApi_DMX_Stc_Eng_Get(MS_U8 u8Eng, MS_U32* pu32Stc32, MS_U32* pu32Stc)
8395 {
8396 DMX_FILTER_STATUS ret;
8397
8398 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
8399
8400 _DMX_ENTRY();
8401 ret = (DRVTSP_OK== MDrv_TSP_GetSTC(u8Eng, pu32Stc32, pu32Stc)? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR);
8402 _DMX_RETURN(ret);
8403 }
8404
8405 //-------------------------------------------------------------------------------------------------
8406 /// Set STC counter
8407 /// @param u8Eng \b IN: STC Engine ID
8408 /// @param u32Stc32 \b IN: STC counter (bit 32)
8409 /// @param u32Stc \b IN: STC counter (bit 31 to bit 0)
8410 /// @return DMX_FILTER_STATUS_OK - Success
8411 /// @return DMX_FILTER_STATUS_ERROR - Failure
8412 /// @note
8413 //-------------------------------------------------------------------------------------------------
8414 DMX_FILTER_STATUS _MApi_DMX_Stc_Eng_Set(MS_U8 u8Eng, MS_U32 u32Stc32, MS_U32 u32Stc)
8415 {
8416 DMX_FILTER_STATUS ret;
8417
8418 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
8419
8420 #if DMX_DEBUG
8421 if(u32DbgLogFlag & DMX_DBG_LOG_STC_CHANGE);
8422 dmx_dbg_print("[DMX STC]\teng[%d] STC[0x%x]\n", (MS_S32)u8Eng, u32Stc);
8423 #endif
8424
8425 _DMX_ENTRY();
8426 ret = (DRVTSP_OK== MDrv_TSP_SetSTC(u8Eng, u32Stc32, u32Stc))? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR;
8427 _DMX_RETURN(ret);
8428 }
8429
8430 //-------------------------------------------------------------------------------------------------
8431 /// Add or subtract STC Offset
8432 /// @param u8Eng \b IN: STC Engine ID
8433 /// @param u32Offset \b IN: STC offset value
8434 /// @param bAdd \b IN: If TRUE, add the offset value; otherwise subtract the offset value
8435 /// @return DMX_FILTER_STATUS_OK - Success
8436 /// @return DMX_FILTER_STATUS_ERROR - Failure
8437 /// @note
8438 //-------------------------------------------------------------------------------------------------
8439 DMX_FILTER_STATUS _MApi_DMX_Stc_Eng_SetOffset(MS_U32 u32Eng, MS_U32 u32Offset, MS_BOOL bAdd)
8440 {
8441 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
8442
8443 #if (defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0)))
8444
8445 if(bAdd == FALSE) //Not support subtracting yet
8446 {
8447 return DMX_FILTER_STATUS_ERROR;
8448 }
8449 #endif
8450
8451 _DMX_ENTRY();
8452 if(MDrv_TSP_SetSTCOffset(u32Eng, u32Offset, bAdd) == DRVTSP_OK)
8453 {
8454 _DMX_RETURN(DMX_FILTER_STATUS_OK);
8455 }
8456 else
8457 {
8458 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
8459 }
8460 }
8461
8462 //-------------------------------------------------------------------------------------------------
8463 /// Set STC control
8464 /// @param u8Eng \b IN: STC Engine ID
8465 /// @param eMode \b IN: STC update control options
8466 /// 0x00 -> Update STC by TSP FW
8467 /// 0x01 -> Update STC by HK
8468 /// 0x02 -> Update STC Once when PCR reset
8469 /// @return DMX_FILTER_STATUS_OK - Success
8470 /// @return DMX_FILTER_STATUS_ERROR - Failure
8471 /// @note
8472 //-------------------------------------------------------------------------------------------------
8473 DMX_FILTER_STATUS _MApi_DMX_STC_UpdateCtrl(MS_U8 u8Eng, eStcUpdateCtrlMode eMode)
8474 {
8475 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
8476
8477 if (MDrv_TSP_STC_UpdateCtrl(u8Eng, eMode) == DRVTSP_OK)
8478 {
8479 return DMX_FILTER_STATUS_OK;
8480 }
8481 return DMX_FILTER_STATUS_ERROR;
8482 }
8483
8484 //-------------------------------------------------------------------------------------------------
8485 /// Adjust STC Clock
8486 /// @param u32EngId \b IN: STC Engine ID
8487 /// @param bUpClk \b IN: If TRUE, Clk will be faster, and if FALSE, Clk will be slower
8488 /// @param u32Percentage \b IN: The percentage of STC clock ratio
8489 /// @return DMX_FILTER_STATUS_OK - Success
8490 /// @return DMX_FILTER_STATUS_ERROR - Failure
8491 /// @note
8492 //-------------------------------------------------------------------------------------------------
8493 DMX_FILTER_STATUS _MApi_DMX_Stc_Clk_Adjust(MS_U32 u32EngId, MS_BOOL bUpClk, MS_U32 u32Percentage)
8494 {
8495 DMX_FILTER_STATUS ret;
8496
8497 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
8498
8499 _DMX_ENTRY();
8500 ret = (DRVTSP_OK== MDrv_TSP_STCClk_Adjust(u32EngId, bUpClk, u32Percentage))? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR;
8501 _DMX_RETURN(ret);
8502 }
8503
8504 //-------------------------------------------------------------------------------------------------
8505 /// Select STC Engine (Only support in driver version 3.0)
8506 /// @param eFltSrc \b IN: Fliter Source type and Filter source ID
8507 /// @param u32StcEng \b IN: STC engine ID (0, 1)
8508 /// @return DMX_FILTER_STATUS_OK - Success
8509 /// @return DMX_FILTER_STATUS_ERROR - Failure
8510 /// @note
8511 //-------------------------------------------------------------------------------------------------
8512 DMX_FILTER_STATUS _MApi_DMX_Stc_Select(DMX_FILTER_TYPE eFltSrc, MS_U32 u32StcEng)
8513 {
8514 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0))
8515
8516 DMX_FILTER_STATUS ret;
8517 DrvTSP_FltType eFltType;
8518
8519 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
8520
8521 switch(eFltSrc & DMX_FILTER_SOURCE_TYPE_MASK)
8522 {
8523 case DMX_FILTER_SOURCE_TYPE_LIVE:
8524 eFltType = E_DRVTSP_FLT_SOURCE_TYPE_LIVE;
8525 break;
8526 case DMX_FILTER_SOURCE_TYPE_FILE:
8527 eFltType = E_DRVTSP_FLT_SOURCE_TYPE_FILE;
8528 break;
8529 case DMX_FILTER_SOURCE_TYPE_TS1:
8530 eFltType = E_DRVTSP_FLT_SOURCE_TYPE_TS1;
8531 break;
8532 case DMX_FILTER_SOURCE_TYPE_TS2:
8533 eFltType = E_DRVTSP_FLT_SOURCE_TYPE_TS2;
8534 break;
8535 case DMX_FILTER_SOURCE_TYPE_FILE1:
8536 eFltType = E_DRVTSP_FLT_SOURCE_TYPE_FILE1;
8537 break;
8538 case DMX_FILTER_SOURCE_TYPE_FILE2:
8539 eFltType = E_DRVTSP_FLT_SOURCE_TYPE_FILE2;
8540 break;
8541 default:
8542 return DMX_FILTER_STATUS_ERROR;
8543 }
8544
8545 eFltType |= (eFltSrc & DMX_FILTER_SOURCEID_MASK);
8546
8547 _DMX_ENTRY();
8548 ret = (DRVTSP_OK== MDrv_TSP_STC_Select(eFltType, u32StcEng)? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR);
8549 _DMX_RETURN(ret);
8550
8551 #else
8552
8553 return DMX_FILTER_STATUS_ERROR;
8554
8555 #endif
8556
8557 }
8558
8559 //-------------------------------------------------------------------------------------------------
8560 /// Get PCR
8561 /// @param pu32Pcr32 \b OUT: PCR counter (bit 32)
8562 /// @param pu32Pcr \b OUT: PCR counter (bit 31 to bit 0)
8563 /// @return DMX_FILTER_STATUS_OK - Success
8564 /// @return DMX_FILTER_STATUS_ERROR - Failure
8565 /// @note
8566 //-------------------------------------------------------------------------------------------------
8567 DMX_FILTER_STATUS _MApi_DMX_Pcr_Get(MS_U32* pu32Pcr32, MS_U32* pu32Pcr)
8568 {
8569 DMX_FILTER_STATUS ret;
8570
8571 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
8572
8573 _DMX_ENTRY();
8574 ret = (DRVTSP_OK== MDrv_TSP_GetPCR(0, pu32Pcr32, pu32Pcr)? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR);
8575 _DMX_RETURN(ret);
8576 }
8577
8578 //-------------------------------------------------------------------------------------------------
8579 /// Get PCR
8580 /// @param u32PcrEng \b INPUT: PCR Eng
8581 /// @param pu32Pcr32 \b OUT: PCR counter (bit 32)
8582 /// @param pu32Pcr \b OUT: PCR counter (bit 31 to bit 0)
8583 /// @return DMX_FILTER_STATUS_OK - Success
8584 /// @return DMX_FILTER_STATUS_ERROR - Failure
8585 /// @note
8586 //-------------------------------------------------------------------------------------------------
8587 DMX_FILTER_STATUS _MApi_DMX_Pcr_Eng_Get(MS_U8 u8PcrEng, MS_U32* pu32Pcr32, MS_U32* pu32Pcr)
8588 {
8589 DMX_FILTER_STATUS ret;
8590
8591 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
8592
8593 _DMX_ENTRY();
8594
8595 ret = (DRVTSP_OK== MDrv_TSP_GetPCR(u8PcrEng, pu32Pcr32, pu32Pcr)? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR);
8596
8597 _DMX_RETURN(ret);
8598 }
8599
8600 //--------------------------------------------------------------------------------------------------
8601 // Ask demuxer to process section/pvr data for Non-OS driver. Calling this function in OS environment causes nothing
8602 // @param u32FltId \b IN: Which filter id to process. 0xFFFFFFFF means process all filters
8603 // @param u32Timeout \b IN: Max time for TSP to process
8604 // @return DMX_FILTER_STATUS
8605 // @note
8606 //--------------------------------------------------------------------------------------------------
8607 DMX_FILTER_STATUS _MApi_DMX_Proc(MS_U32 u32DmxId, DMX_EVENT* pEvent) // for non-OS TSP scheduling
8608 {
8609 TSP_Result bRet = (TSP_Result)DRVTSP_FAIL;
8610
8611 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
8612
8613 _DMX_ENTRY();
8614
8615 if (0xFFFFFFFF != u32DmxId)
8616 {
8617 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
8618 MDrv_TSP_Proc(0, u32DmxId, &bRet, (DrvTSP_Event*)pEvent);
8619 #else
8620 bRet = MDrv_TSP_Proc(0, u32DmxId, (TSP_Event*)pEvent);
8621 #endif
8622 }
8623
8624 if (DRVTSP_OK == bRet)
8625 {
8626 _DMX_RETURN(DMX_FILTER_STATUS_OK);
8627 }
8628 else
8629 {
8630 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
8631 }
8632 }
8633
8634 //-------------------------------------------------------------------------------------------------
8635 // Invert Demux parallel input bit order
8636 // @param DmxFlow \b IN: DMX_FLOW_PLAYBACK for playback flow
8637 // DMX_FLOW_PVR for record flow
8638 // @param bInvert \b IN: Invert bit order of TS parallel in
8639 // TRUE for Invert
8640 // FALSE for not invert
8641 // @return DMX_FILTER_STATUS_OK - Success
8642 // @return DMX_FILTER_STATUS_ERROR - Failure
8643 // @note
8644 //------------------------------------------------------------------------------------------------
8645 DMX_FILTER_STATUS _MApi_DMX_Parl_Invert(DMX_FLOW DmxFlow, MS_BOOL bInvert)
8646 {
8647 TSP_Result ret = (TSP_Result)DRVTSP_FAIL;
8648
8649 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
8650 DrvTSP_If TspIf = E_DRVTSP_IF_NUM;
8651 #endif
8652
8653 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
8654
8655 _DMX_ENTRY();
8656
8657 #if(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0))
8658 switch(DmxFlow)
8659 {
8660 case DMX_FLOW_PVRCA:
8661 case DMX_FLOW_PLAYBACK:
8662 TspIf = E_DRVTSP_IF_TS0;
8663 break;
8664 case DMX_FLOW_PLAYBACK1:
8665 case DMX_FLOW_PVR:
8666 TspIf = E_DRVTSP_IF_TS1;
8667 break;
8668 case DMX_FLOW_PVRCA1:
8669 case DMX_FLOW_PVR1:
8670 TspIf = E_DRVTSP_IF_TS2;
8671 break;
8672 case DMX_FLOW_PVR2:
8673 TspIf = E_DRVTSP_IF_TS3;
8674 break;
8675 default:
8676 MS_ASSERT(0);
8677 break;
8678 }
8679 ret = MDrv_TSP_Parl_BitOrderSwap(0, TspIf, bInvert);
8680
8681 #elif(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
8682 switch(DmxFlow)
8683 {
8684 case DMX_FLOW_PLAYBACK:
8685 TspIf = E_DRVTSP_IF_PLAYBACK;
8686 break;
8687 case DMX_FLOW_PVR:
8688 TspIf = E_DRVTSP_IF_PVR0;
8689 break;
8690 default:
8691 MS_ASSERT(0);
8692 break;
8693 }
8694 ret = MDrv_TSP_Parl_BitOrderSwap(0, TspIf, bInvert);
8695
8696 #else // For TSP_VER_4_0
8697
8698 MS_U32 u32TsIf = 0;
8699
8700 if(_DMX_ApiDrv_DmxFlowMapping(DmxFlow, &u32TsIf) == FALSE)
8701 {
8702 return DMX_FILTER_STATUS_ERROR;
8703 }
8704
8705 TSP_TSIF eTSPTsif = MDrv_TSP_TsifMapping((TSP_TSIF)u32TsIf);
8706 ret = MDrv_TSP_Parl_BitOrderSwap(0, eTSPTsif, bInvert);
8707
8708 #endif // End of TSP_VER_4_0
8709
8710 if(DRVTSP_OK == ret)
8711 {
8712 _DMX_RETURN(DMX_FILTER_STATUS_OK);
8713 }
8714 else
8715 {
8716 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
8717 }
8718 }
8719
8720 //--------------------------------------------------------------------------------------------------
8721 /// Copy section data to assigned buffer
8722 /// @param u32DmxId \b IN: demux ID
8723 /// @param pu8Buf \b OUT: section buffer address
8724 /// @param u32BufSize \b IN: section buffer size
8725 /// @param pu32ActualSize \b IN: section data size
8726 /// @param pu32RmnSize \b OUT: section buffer remainning data size
8727 /// @param pfCheckCB \b IN: callback function to check data correct or not
8728 /// @return DMX_FILTER_STATUS
8729 /// @note
8730 //--------------------------------------------------------------------------------------------------
8731 DMX_FILTER_STATUS _MApi_DMX_CopyData(MS_U32 u32DmxId, MS_U8* pu8Buf, MS_U32 u32BufSize, MS_U32* pu32ActualSize, MS_U32* pu32RmnSize, DMX_CheckCb pfCheckCB)
8732 {
8733 DMX_FILTER_TYPE DmxFltType;
8734 DMX_FILTER_STATUS ret = DMX_FILTER_STATUS_ERROR;
8735
8736 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
8737 DMX_ASSERT(DMX_MAX_FLTID> u32DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, (int)u32DmxId)));
8738
8739 _DMX_ENTRY();
8740
8741 if(_pdmx_res->_FltList[u32DmxId].FltId == 0xFFFFFFFF)
8742 {
8743 //DMX_DBGMSG(DMX_DBG_ERR, ULOGD("DMX", "[%s][%d] Filte %d is already free\n", __FUNCTION__, __LINE__, (int)u8DmxId));
8744 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
8745 }
8746
8747 _FLT_LIST_TYPE_GET(u32DmxId, &DmxFltType);
8748 switch (DmxFltType & (~DMX_FILTER_FLT_MASK))
8749 {
8750 case DMX_FILTER_TYPE_SECTION:
8751 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
8752 case DMX_FILTER_TYPE_SECTION_NO_PUSI:
8753 case DMX_FILTER_TYPE_SECTION_VER:
8754 #endif
8755 ret = _DMX_GetSect(u32DmxId, pu8Buf, u32BufSize, pu32ActualSize, pu32RmnSize, pfCheckCB);
8756 break;
8757 case DMX_FILTER_TYPE_PES:
8758 case DMX_FILTER_TYPE_TELETEXT:
8759 case DMX_FILTER_TYPE_PACKET:
8760 ret = _DMX_GetRingBuffer(u32DmxId, pu8Buf, u32BufSize, pu32ActualSize, pu32RmnSize, pfCheckCB);
8761 break;
8762 default:
8763 MS_ASSERT(0);
8764 break;
8765 }
8766
8767 #if DMX_DEBUG
8768 {
8769 MS_BOOL bFltMonitor = FALSE;
8770 MS_U32 u32TmpS, u32TmpSize, u32TmpR, u32TmpW;
8771 dmx_dbg_IsFltMonitor(u32DmxId, bFltMonitor);
8772 MS_U32 i=0;
8773
8774 if((u32DbgLogFlag & (DMX_DBG_LOG_COPYDATA | DMX_DBG_LOG_COPYDATA1)) && bFltMonitor)
8775 {
8776 MDrv_TSP_SecFlt_GetBufStart(0, _pdmx_res->_FltList[u32DmxId].SecBufId, &u32TmpS);
8777 MDrv_TSP_SecFlt_GetBufSize(0, _pdmx_res->_FltList[u32DmxId].SecBufId, &u32TmpSize);
8778 MDrv_TSP_SecFlt_GetReadAddr(0, _pdmx_res->_FltList[u32DmxId].SecBufId, &u32TmpR);
8779 MDrv_TSP_SecFlt_GetWriteAddr(0, _pdmx_res->_FltList[u32DmxId].SecBufId, &u32TmpW);
8780
8781 dmx_dbg_print("[DMX CpData]\tFlt[%03d] Copied[%04d] Rmn[0x%08X] S[0x%08X] E[0x%08X] R[0x%08X] W[0x%08X]\n",
8782 (MS_S32)u32DmxId,
8783 (MS_S32)(*pu32ActualSize),
8784 (MS_S32)(*pu32RmnSize),
8785 u32TmpS,
8786 (u32TmpS + u32TmpSize),
8787 u32TmpR,
8788 u32TmpW);
8789 }
8790
8791 if((u32DbgLogFlag & DMX_DBG_LOG_COPYDATA1) && bFltMonitor)
8792 {
8793 if(pfSEC)
8794 {
8795 if(*pu32ActualSize != fwrite(pu8Buf, 1, *pu32ActualSize, pfSEC))
8796 {
8797 dmx_dbg_print("write file error, length %d\n", *pu32ActualSize);
8798 fclose(pfSEC);
8799 pfSEC = NULL;
8800 }
8801 }
8802 else
8803 {
8804 ULOGD("DMX", "[dump]\t");
8805 for(;i<MAX_NUM_CP_DATA_DUMP;i++)
8806 {
8807 if(i%16 == 0)
8808 ULOGD("DMX", "\n\t\t");
8809 ULOGD("DMX", "%02X ", pu8Buf[i]);
8810 }
8811 ULOGD("DMX", "\n");
8812 }
8813 }
8814 }
8815 #endif
8816
8817 _DMX_RETURN(ret);
8818 }
8819
8820 void _MApi_DMX_WriteProtect_Enable(MS_BOOL bEnable, MS_PHY* pphyStartAddr, MS_PHY* pphyEndAddr)
8821 {
8822 MDrv_TSP_WriteProtect_Enable(bEnable, pphyStartAddr, pphyEndAddr);
8823 }
8824
8825 void _MApi_DMX_OrzWriteProtect_Enable(MS_BOOL bEnable, MS_PHY phyStartAddr, MS_PHY phyEndAddr)
8826 {
8827 MDrv_TSP_OrzWriteProtect_Enable(bEnable, phyStartAddr, phyEndAddr);
8828 }
8829
8830 DMX_FILTER_STATUS _MApi_DMX_FlowEnable(DMX_FLOW DmxFlow, MS_BOOL bEnable)
8831 {
8832 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
8833
8834 DrvTSP_If e_TsIf;
8835
8836 _DMX_ENTRY();
8837
8838 switch(DmxFlow)
8839 {
8840 #if((defined(TSP_VERSION)) && (TSP_VERSION == TSP_VER_3_0))
8841 case DMX_FLOW_PLAYBACK:
8842 e_TsIf = E_DRVTSP_IF_TS0;
8843 break;
8844 case DMX_FLOW_PVR:
8845 e_TsIf = E_DRVTSP_IF_TS0;
8846 break;
8847 case DMX_FLOW_FILEIN_MM:
8848 e_TsIf = E_DRVTSP_IF_TS1;
8849 break;
8850
8851 #else
8852 case DMX_FLOW_PLAYBACK:
8853 e_TsIf = E_DRVTSP_IF_PLAYBACK;
8854 break;
8855 case DMX_FLOW_PVR:
8856 e_TsIf = E_DRVTSP_IF_PVR0;
8857 break;
8858 case DMX_FLOW_FILEIN_MM:
8859 e_TsIf = E_DRVTSP_IF_PVR1;
8860 break;
8861 #endif
8862
8863 case DMX_FLOW_PVRCA:
8864 case DMX_FLOW_FILEIN_MM3D:
8865 case DMX_FLOW_NUM:
8866 default:
8867 _DMX_RETURN(DMX_FILTER_STATUS_OK);
8868 }
8869
8870 MDrv_TSP_TSIF_Enable(e_TsIf , bEnable);
8871 _DMX_RETURN(DMX_FILTER_STATUS_OK);
8872 #else
8873 return DMX_FILTER_STATUS_ERROR;
8874 #endif
8875 }
8876
8877 //-------------------------------------------------------------------------------------------------
8878 /// Set/Get DScmbler engine id depend on TSIF path
8879 /// @param eTsIf \b IN: eTsIf
8880 /// @param pu32EngId \b IN/OUT: pointer to store dscmb engine id
8881 /// @param bSet \b IN: TRUE:Set dscmb engine id ; FALSE: Get dscmb engine id
8882 /// @note
8883 //-------------------------------------------------------------------------------------------------
8884 DMX_FILTER_STATUS _MApi_DMX_Flow_DscmbEng(DMX_TSIF eTsIf, MS_U32* pu32EngId, MS_BOOL bSet)
8885 {
8886 #if(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0))
8887
8888 DrvTSP_PKTDMXSrcType ePktDmxSrc = 0;
8889
8890 switch(eTsIf)
8891 {
8892 case DMX_TSIF_LIVE0:
8893 ePktDmxSrc = E_DRVTSP_PKTSRC_DEMUX0;
8894 break;
8895 case DMX_TSIF_LIVE1:
8896 case DMX_TSIF_FILE1:
8897 ePktDmxSrc = E_DRVTSP_PKTSRC_DEMUX1;
8898 break;
8899 case DMX_TSIF_LIVE2:
8900 case DMX_TSIF_FILE2:
8901 ePktDmxSrc = E_DRVTSP_PKTSRC_DEMUX2;
8902 break;
8903 case DMX_TSIF_FILE0:
8904 ePktDmxSrc = E_DRVTSP_PKTSRC_DEMUXFILE;
8905 break;
8906 default:
8907 *pu32EngId = 0xFF;
8908 return DMX_FILTER_STATUS_ERROR;
8909 }
8910
8911 _DMX_ENTRY();
8912 if(bSet == FALSE)
8913 {
8914 *pu32EngId = 0xFF;
8915 MDrv_TSP_GetDscmbEngIdx_BySource(ePktDmxSrc, pu32EngId);
8916 _DMX_RETURN(DMX_FILTER_STATUS_OK);
8917 }
8918 else
8919 {
8920 if(MDrv_TSP_Dscmb_Source(*pu32EngId, &ePktDmxSrc, TRUE) == DRVTSP_OK)
8921 {
8922 _DMX_RETURN(DMX_FILTER_STATUS_OK);
8923 }
8924 else
8925 {
8926 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
8927 }
8928 }
8929 #else
8930 return DMX_FILTER_STATUS_ERROR;
8931 #endif
8932 }
8933
8934 //-------------------------------------------------------------------------------------------------
8935 /// Set enable/disable drop scramble packet of fifo/pvr
8936 /// @param DmxFltType \b IN: DmxFltType
8937 /// @param bEnable \b IN: Enable
8938 /// @note
8939 //-------------------------------------------------------------------------------------------------
8940 DMX_FILTER_STATUS _MApi_DMX_DropScmbPkt(DMX_FILTER_TYPE DmxFltType, MS_BOOL bEnable)
8941 {
8942 #if (!(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))) // For TSP_VER_3_0 and TSP_VER_4_0
8943
8944 DrvTSP_FltType _Flt_type;
8945 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
8946
8947 _DMX_ENTRY();
8948
8949 switch (DmxFltType)
8950 {
8951 case DMX_FILTER_TYPE_VIDEO:
8952 _Flt_type = E_DRVTSP_FLT_TYPE_VIDEO;
8953 break;
8954 case DMX_FILTER_TYPE_VIDEO3D:
8955 _Flt_type = E_DRVTSP_FLT_TYPE_VIDEO3D;
8956 break;
8957 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
8958 case DMX_FILTER_TYPE_VIDEO3:
8959 _Flt_type = E_DRVTSP_FLT_TYPE_VIDEO3;
8960 break;
8961 case DMX_FILTER_TYPE_VIDEO4:
8962 _Flt_type = E_DRVTSP_FLT_TYPE_VIDEO4;
8963 break;
8964 case DMX_FILTER_TYPE_VIDEO5:
8965 _Flt_type = E_DRVTSP_FLT_TYPE_VIDEO5;
8966 break;
8967 case DMX_FILTER_TYPE_VIDEO6:
8968 _Flt_type = E_DRVTSP_FLT_TYPE_VIDEO6;
8969 break;
8970 case DMX_FILTER_TYPE_VIDEO7:
8971 _Flt_type = E_DRVTSP_FLT_TYPE_VIDEO7;
8972 break;
8973 case DMX_FILTER_TYPE_VIDEO8:
8974 _Flt_type = E_DRVTSP_FLT_TYPE_VIDEO8;
8975 break;
8976 #endif
8977 case DMX_FILTER_TYPE_AUDIO:
8978 _Flt_type = E_DRVTSP_FLT_TYPE_AUDIO;
8979 break;
8980 case DMX_FILTER_TYPE_AUDIO2:
8981 _Flt_type = E_DRVTSP_FLT_TYPE_AUDIO2;
8982 break;
8983 case DMX_FILTER_TYPE_AUDIO3:
8984 _Flt_type = E_DRVTSP_FLT_TYPE_AUDIO3;
8985 break;
8986 case DMX_FILTER_TYPE_AUDIO4:
8987 _Flt_type = E_DRVTSP_FLT_TYPE_AUDIO4;
8988 break;
8989 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
8990 case DMX_FILTER_TYPE_AUDIO5:
8991 _Flt_type = E_DRVTSP_FLT_TYPE_AUDIO5;
8992 break;
8993 case DMX_FILTER_TYPE_AUDIO6:
8994 _Flt_type = E_DRVTSP_FLT_TYPE_AUDIO6;
8995 break;
8996 #endif
8997 case DMX_FILTER_SOURCE_TYPE_PVR0:
8998 _Flt_type = E_DRVTSP_FLT_TYPE_PVR;
8999 break;
9000 case DMX_FILTER_SOURCE_TYPE_PVR1:
9001 _Flt_type = E_DRVTSP_FLT_TYPE_PVR1;
9002 break;
9003 default:
9004 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "Incorrect type for DropScmbPkt\n"));
9005 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
9006 }
9007
9008 if (MDrv_TSP_DropScmbPkt(_Flt_type, bEnable) == DRVTSP_OK)
9009 {
9010 _DMX_RETURN(DMX_FILTER_STATUS_OK);
9011 }
9012 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
9013
9014 #else
9015 return DMX_FILTER_STATUS_ERROR;
9016 #endif
9017 }
9018
9019 //-------------------------------------------------------------------------------------------------
9020 /// Configure output pad
9021 /// @param eOutPad \b IN: Select output pad
9022 /// @param eInSrcPad \b IN: Select input source pad
9023 /// @param bInParallel \b IN: TRUE: input source is paralleled; FALSE: input source is serial in
9024 /// @param u32ResvNum \b IN: Reserved value of the number of reserved parameters for future using
9025 /// @param pu32vRes \b IN: Reserved pointer to store parameters for future using
9026 /// @note
9027 /// Only EXT_PAD1 and EXT_PAD3 has output mode
9028 ///
9029 /// If output from S2P mode, input source should be external input pad only
9030 /// If output from TSO mode, eInputPad should be E_DRVTSP_PAD_TSO
9031 /// If input source is internal demod, output mode can be demod out or TSO out
9032 //-------------------------------------------------------------------------------------------------
9033 DMX_FILTER_STATUS _MApi_DMX_TsOutputPadCfg(DMX_FLOW_OUTPUT_PAD eOutPad, DMX_FLOW_INPUT eInSrcPad, MS_BOOL bInParallel, MS_U32 u32ResvNum, MS_U32 *pu32Resv)
9034 {
9035 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0))
9036
9037 DrvTSP_PadIn eInPad;
9038 MS_BOOL bEnable = TRUE;
9039 DrvTSP_PadOut eDrvOutPad = E_DRVTSP_OUTPAD_NONE;
9040
9041 switch(eOutPad)
9042 {
9043 case DMX_FLOW_OUTPUT_EXT_PAD1:
9044 eDrvOutPad = E_DRVTSP_PAD_EXT_INPUT1;
9045 break;
9046 case DMX_FLOW_OUTPUT_EXT_PAD3:
9047 eDrvOutPad = E_DRVTSP_PAD_EXT_INPUT3;
9048 break;
9049 default:
9050 return DMX_FILTER_STATUS_ERROR;
9051 }
9052
9053 switch(eInSrcPad)
9054 {
9055 case DMX_FLOW_INPUT_DEMOD:
9056 eInPad = E_DRVTSP_PAD_DEMOD;
9057 eDrvOutPad |= E_DRVTSP_OUTPAD_FROM_DMD;
9058 break;
9059 case DMX_FLOW_INPUT_EXT_INPUT0:
9060 eInPad = E_DRVTSP_PAD_EXT_INPUT0;
9061 eDrvOutPad |= E_DRVTSP_OUTPAD_FROM_S2P;
9062 break;
9063 case DMX_FLOW_INPUT_EXT_INPUT1:
9064 eInPad = E_DRVTSP_PAD_EXT_INPUT1;
9065 eDrvOutPad |= E_DRVTSP_OUTPAD_FROM_S2P;
9066 break;
9067 case DMX_FLOW_INPUT_EXT_INPUT2:
9068 eInPad = E_DRVTSP_PAD_EXT_INPUT2;
9069 eDrvOutPad |= E_DRVTSP_OUTPAD_FROM_S2P;
9070 break;
9071 case DMX_FLOW_INPUT_EXT_INPUT3:
9072 eInPad = E_DRVTSP_PAD_EXT_INPUT3;
9073 eDrvOutPad |= E_DRVTSP_OUTPAD_FROM_S2P;
9074 break;
9075 case DMX_FLOW_INPUT_EXT_INPUT4:
9076 eInPad = E_DRVTSP_PAD_EXT_INPUT4;
9077 eDrvOutPad |= E_DRVTSP_OUTPAD_FROM_S2P;
9078 break;
9079 case DMX_FLOW_INPUT_EXT_INPUT5:
9080 eInPad = E_DRVTSP_PAD_EXT_INPUT5;
9081 eDrvOutPad |= E_DRVTSP_OUTPAD_FROM_S2P;
9082 break;
9083 case DMX_FLOW_INPUT_TSO:
9084 eInPad = E_DRVTSP_PAD_TSO;
9085 eDrvOutPad |= E_DRVTSP_OUTPAD_FROM_TSO;
9086 break;
9087 case DMX_FLOW_INPUT_DISABLE:
9088 eInPad = E_DRVTSP_PAD_DEMOD;
9089 bEnable = FALSE;
9090 break;
9091 default:
9092 return DMX_FILTER_STATUS_ERROR;
9093 }
9094
9095 _DMX_ENTRY();
9096
9097 if(MDrv_TSP_OutputPadCfg(eDrvOutPad, eInPad, bInParallel, bEnable) != DRVTSP_OK)
9098 {
9099 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
9100 }
9101 else
9102 {
9103 _DMX_RETURN(DMX_FILTER_STATUS_OK);
9104 }
9105 #else
9106 return DMX_FILTER_STATUS_ERROR;
9107 #endif
9108 }
9109
9110 //-------------------------------------------------------------------------------------------------
9111 /// Configure output pad
9112 /// @param u16Val \b IN: Value of phase
9113 /// @param bEnable \b IN: Enable/Disable phase tuning
9114 /// @param u32S2pOpt \b IN: Option value
9115 /// @note
9116 /// Configure for S2P mode
9117 //-------------------------------------------------------------------------------------------------
9118 DMX_FILTER_STATUS _MApi_DMX_TsS2POutputClkPhase(MS_U16 u16Val, MS_BOOL bEnable, MS_U32 u32S2pOpt)
9119 {
9120 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0))
9121
9122 _DMX_ENTRY();
9123 if(MDrv_TSP_OutputClkPhase(0, u16Val, bEnable, u32S2pOpt) != DRVTSP_OK)
9124 {
9125 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
9126 }
9127 else
9128 {
9129 _DMX_RETURN(DMX_FILTER_STATUS_OK);
9130 }
9131 #else
9132 return DMX_FILTER_STATUS_ERROR;
9133 #endif
9134
9135 }
9136
9137 DMX_FILTER_STATUS _MApi_DMX_Read_DropPktCnt(MS_U16* pu16ADropCnt, MS_U16* pu16VDropCnt)
9138 {
9139 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
9140
9141 DMX_FILTER_STATUS ret;
9142
9143 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9144
9145 _DMX_ENTRY();
9146 ret = DRVTSP_OK== MDrv_TSP_ReadDropPktCnt(pu16ADropCnt, pu16VDropCnt)? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR;
9147 _DMX_RETURN(ret);
9148 #else
9149 return DMX_FILTER_STATUS_ERROR;
9150 #endif
9151 }
9152
9153 //--------------------------------------------------------------------------------------------------
9154 // Set demux filter owner
9155 // @param u8DmxIdStart \b IN: demux start ID
9156 // @param u8DmxIdEnd \b IN: demux end ID
9157 // @param bOwner \b IN: TRUE for owner, FALSE for not owner
9158 // @return DMX_FILTER_STATUS
9159 // @note
9160 //--------------------------------------------------------------------------------------------------
9161 DMX_FILTER_STATUS _MApi_DMX_SetOwner(MS_U32 u32DmxIdStart, MS_U32 u32DmxIdEnd, MS_BOOL bOwner)
9162 {
9163 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9164
9165 _DMX_ENTRY();
9166
9167 #if defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0))
9168 if (DRVTSP_OK != MDrv_TSP_Flt_SetOwner(0, u32DmxIdStart, u32DmxIdEnd, bOwner))
9169 {
9170 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
9171 }
9172 #endif
9173
9174 _DMX_RETURN(DMX_FILTER_STATUS_OK);
9175 }
9176
9177 //--------------------------------------------------------------------------------------------------
9178 // Get demux filter owner
9179 // @param u8DmxIdStart \b IN: demux ID
9180 // @param bOwner \b IN: pointer to store return value of owner flag
9181 // @return DMX_FILTER_STATUS
9182 // @note
9183 //--------------------------------------------------------------------------------------------------
9184 DMX_FILTER_STATUS _MApi_DMX_GetOwner(MS_U32 u32DmxId, MS_BOOL* pbOwner)
9185 {
9186 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9187
9188 _DMX_ENTRY();
9189
9190 #if defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0))
9191 *pbOwner = ((DRVTSP_OK == MDrv_TSP_PidFlt_ChkOwner(0, u32DmxId))? TRUE: FALSE);
9192 #else
9193 *pbOwner = (DRVTSP_OK == MDrv_TSP_FLT_ChkOwner(_Owner, u32DmxId)) ? ((_Owner)?TRUE:FALSE) : ((_Owner)?FALSE:TRUE);
9194 #endif
9195
9196 _DMX_RETURN(DMX_FILTER_STATUS_OK);
9197 }
9198
9199 DMX_FILTER_STATUS _MApi_DMX_GetAccess(MS_U32 u32Try)
9200 {
9201 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9202
9203 return ((DRVTSP_OK == MDrv_TSP_IsAccess(u32Try))? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR);
9204 }
9205
9206 DMX_FILTER_STATUS _MApi_DMX_ReleaseAccess(void)
9207 {
9208 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9209
9210 return ((DRVTSP_OK == MDrv_TSP_UnlockAccess())? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR);
9211 }
9212
9213 DMX_FILTER_STATUS _MApi_DMX_SetHK(MS_BOOL bIsHK)
9214 {
9215 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9216
9217 _pdmx_res->_u32IsHK = bIsHK;
9218
9219 #if defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0))
9220 return ((DRVTSP_OK == MDrv_TSP_SetHK(bIsHK))? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR);
9221 #else
9222 _Owner = (bIsHK) ? 0 : 1;
9223 return DMX_FILTER_STATUS_OK;
9224 #endif
9225 }
9226
9227 //--------------------------------------------------------------------------------------------------
9228 /// Reset AVFIFO
9229 /// @param DmxFltType \b IN: demux type
9230 /// @param bReset \b IN: section buffer size
9231 /// @return DMX_FILTER_STATUS
9232 /// @note
9233 //--------------------------------------------------------------------------------------------------
9234 DMX_FILTER_STATUS _MApi_DMX_AVFifo_Reset(DMX_FILTER_TYPE DmxFltType, MS_BOOL bReset)
9235 {
9236 DrvTSP_FltType _AVFifo_type;
9237
9238 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9239
9240 #if DMX_DEBUG
9241 if(u32DbgLogFlag & DMX_DBG_LOG_AVFIFO)
9242 {
9243 if(DmxFltType <= DMX_FILTER_TYPE_SECTION_VER)
9244 dmx_dbg_print("[DMX FIFO RST]\t[%s]\n", stDmxType[DmxFltType].str);
9245 else
9246 dmx_dbg_print("[DMX FIFO RST]\t[unknown %d]\n", (MS_S32)DmxFltType);
9247 }
9248 #endif
9249
9250 _DMX_ENTRY();
9251
9252 if(_DMX_ApiDrv_FltTypeMapping(DmxFltType, &_AVFifo_type) == FALSE)
9253 {
9254 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "Incorrect type for AVFIFO\n"));
9255 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
9256 }
9257
9258 if (MDrv_TSP_AVFifo_Reset(_AVFifo_type, bReset) == DRVTSP_OK)
9259 {
9260 _DMX_RETURN(DMX_FILTER_STATUS_OK);
9261 }
9262 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
9263 }
9264
9265 //--------------------------------------------------------------------------------------------------
9266 /// Get AVFIFO status(level)
9267 /// @param DmxFltType \b IN: demux type
9268 /// @param u32FifoLevel \b OUT: fifo level
9269 /// @return DMX_FILTER_STATUS
9270 /// @note
9271 //--------------------------------------------------------------------------------------------------
9272 DMX_FILTER_STATUS _MApi_DMX_AVFifo_Status(DMX_FILTER_TYPE DmxFltType, DMX_FIFO_STATUS* u32FifoLevel)
9273 {
9274 DrvTSP_FltType _AVFifo_type;
9275
9276 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9277
9278 _DMX_ENTRY();
9279
9280 if(_DMX_ApiDrv_FltTypeMapping(DmxFltType, &_AVFifo_type) == FALSE)
9281 {
9282 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "Incorrect type for AVFIFO\n"));
9283 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
9284 }
9285
9286 if (MDrv_TSP_AVFifo_Status(_AVFifo_type, u32FifoLevel) == DRVTSP_OK)
9287 {
9288 _DMX_RETURN(DMX_FILTER_STATUS_OK);
9289 }
9290 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
9291 }
9292
9293 //--------------------------------------------------------------------------------------------------
9294 /// Enable or disable AV FIFO block mechanism
9295 /// @param DmxFltType \b IN: demux type
9296 /// @param bEnable \b OUT: TRUR: Enable block mechanism, FALSE: Disable block mechanism
9297 /// @return DMX_FILTER_STATUS
9298 /// @note Not supprot for all chips
9299 //--------------------------------------------------------------------------------------------------
9300 #if (!(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))) // For TSP_VER_3_0 and TSP_VER_4_0
9301 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0))
9302 DMX_FILTER_STATUS _MApi_DMX_AVFifo_BlockEnable(DMX_FILTER_TYPE DmxFltType, MS_BOOL bEnable)
9303 {
9304 DrvTSP_FltType _AVFifo_type;
9305
9306 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9307
9308 _DMX_ENTRY();
9309
9310 switch (DmxFltType)
9311 {
9312 case DMX_FILTER_TYPE_VIDEO:
9313 _AVFifo_type = E_DRVTSP_FLT_TYPE_VIDEO;
9314 break;
9315 case DMX_FILTER_TYPE_AUDIO:
9316 _AVFifo_type = E_DRVTSP_FLT_TYPE_AUDIO;
9317 break;
9318 case DMX_FILTER_TYPE_AUDIO2:
9319 _AVFifo_type = E_DRVTSP_FLT_TYPE_AUDIO2;
9320 break;
9321 case DMX_FILTER_TYPE_VIDEO3D:
9322 _AVFifo_type = E_DRVTSP_FLT_TYPE_VIDEO3D;
9323 break;
9324 case DMX_FILTER_TYPE_AUDIO3:
9325 _AVFifo_type = E_DRVTSP_FLT_TYPE_AUDIO3;
9326 break;
9327 case DMX_FILTER_TYPE_AUDIO4:
9328 _AVFifo_type = E_DRVTSP_FLT_TYPE_AUDIO4;
9329 break;
9330 default:
9331 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "Incorrect type for AVFIFO\n"));
9332 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
9333 }
9334
9335 if (MDrv_TSP_AVFifo_BlockEnable(_AVFifo_type, bEnable) == DRVTSP_OK)
9336 {
9337 _DMX_RETURN(DMX_FILTER_STATUS_OK);
9338 }
9339 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
9340 }
9341 #else // For TSP_VER_4_0
9342 DMX_FILTER_STATUS _MApi_DMX_AVFifo_BlockEnable(DMX_FILTER_TYPE DmxFltType, MS_BOOL bEnable)
9343 {
9344 TSP_FltType eFlttype;
9345
9346 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9347
9348 _DMX_ENTRY();
9349
9350 if(_DMX_ApiDrv_FltTypeMapping(DmxFltType, &eFlttype) == FALSE)
9351 {
9352 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "Incorrect type for AVFIFO\n"));
9353 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
9354 }
9355
9356 if (MDrv_TSP_FIFO_BlockEnable(eFlttype, bEnable) == DRVTSP_OK)
9357 {
9358 _DMX_RETURN(DMX_FILTER_STATUS_OK);
9359 }
9360
9361 _DMX_RETURN(DMX_FILTER_STATUS_OK);
9362 }
9363 #endif // End of TSP_VER_4_0
9364 #endif // End of TSP_VER_3_0 and TSP_VER_4_0
9365
9366 /********************************************************************/
9367 /// Get DMX Version.
9368 ///@param ppVersion \b OUT: DMX Version
9369 ///@return DMX_FILTER_STATUS
9370 /********************************************************************/
9371 DMX_FILTER_STATUS _MApi_DMX_GetLibVer(const MSIF_Version **ppVersion)
9372 {
9373 if (!ppVersion)
9374 {
9375 return DMX_FILTER_STATUS_ERROR;
9376 }
9377 *ppVersion = &_api_dmx_version;
9378 return DMX_FILTER_STATUS_OK;
9379 }
9380
9381 //--------------------------------------------------------------------------------------------------
9382 /// Query DMX specific hardware capability
9383 /// @param DmxQueryType \b IN: query type
9384 /// @param pOutput \b OUT: answer of query type
9385 /// @return DMX_FILTER_STATUS
9386 /// @note
9387 //--------------------------------------------------------------------------------------------------
9388 DMX_FILTER_STATUS _MApi_DMX_GetCap(DMX_QUERY_TYPE DmxQueryType, void* pOutput)
9389 {
9390 MS_U32 u32size = 0;
9391
9392 DMX_ASSERT(DMX_CAP_NULL > DmxQueryType, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Capability type not Support!\n", __LINE__)));
9393
9394 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s][%d](0x%x, %p)\n", __FUNCTION__, __LINE__, DmxQueryType, pOutput));
9395
9396 //DMX share resource = DMX own resource + TSP resource + MMFI resource + TSO resource
9397 if(DmxQueryType == DMX_CAP_RESOURCE_SIZE)
9398 {
9399 *((MS_U32*)pOutput) = sizeof(DMX_RESOURCE_PRIVATE);
9400
9401 #if defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0))
9402 if(MDrv_TSP_GetCap(E_DRVTSP_CAP_RESOURCE_SIZE, (void*)(&u32size)) != DRVTSP_OK)
9403 return DMX_FILTER_STATUS_ERROR;
9404 #else
9405 if(MDrv_TSP_GetCap(E_TSP_CAP_RESOURCE_SIZE, (void*)(&u32size)) != DRVTSP_OK)
9406 return DMX_FILTER_STATUS_ERROR;
9407 #endif
9408 *((MS_U32*)pOutput) += u32size;
9409
9410 #if defined(MMFILEIN) || defined(MMFI_VD3D)
9411 if(MDrv_MMFI_GetCap(E_DRVMMFI_CAP_RESOURCE_SIZE, (void*)(&u32size)) != DRVMMFI_OK)
9412 return DMX_FILTER_STATUS_ERROR;
9413 *((MS_U32*)pOutput) += u32size;
9414 #endif
9415
9416 #ifdef TSIO_ENABLE
9417 if(MDrv_TSIO_GetCap(DRVTSIO_CAP_RESOURCE_SIZE, (void*)(&u32size)) != DRVTSIO_OK)
9418 return DMX_FILTER_STATUS_ERROR;
9419 *((MS_U32*)pOutput) += u32size;
9420 #endif
9421
9422 #ifdef TSO_ENABLE
9423 if(MDrv_TSO_GetCap(E_DRVTSO_CAP_RESOURCE_SIZE, (void*)(&u32size)) != DRVTSO_OK)
9424 return DMX_FILTER_STATUS_ERROR;
9425 *((MS_U32*)pOutput) += u32size;
9426 #endif
9427
9428 return DMX_FILTER_STATUS_OK;
9429 }
9430
9431 #if defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0))
9432
9433 if(MDrv_TSP_GetCap((DrvTSP_Cap)((MS_U32)DmxQueryType), pOutput) == DRVTSP_OK)
9434 {
9435 return DMX_FILTER_STATUS_OK;
9436 }
9437 else
9438 {
9439 return DMX_FILTER_STATUS_ERROR;
9440 }
9441 #else // For TSP_VER_4_0
9442
9443 if(MDrv_TSP_GetCap((TSP_Caps)((MS_U32)DmxQueryType), pOutput) == DRVTSP_OK)
9444 {
9445 return DMX_FILTER_STATUS_OK;
9446 }
9447 else
9448 {
9449 return DMX_FILTER_STATUS_ERROR;
9450 }
9451 #endif // End of TSP_VER_4_0
9452 }
9453
9454 //--------------------------------------------------------------------------------------------------
9455 /// Query DMX specific hardware capability by string type
9456 /// @param pstrQueryType \b IN: String of capability item
9457 /// @param s32Strlen \b IN: String size of capability item
9458 /// @param pOutput \b OUT: answer of query type
9459 /// @param pseOutSize \b OUT: Output data length
9460 /// @return DMX_FILTER_STATUS
9461 /// @note
9462 //--------------------------------------------------------------------------------------------------
9463 DMX_FILTER_STATUS _MApi_DMX_GetCap_Ex(char* pstrQueryType, MS_S32 s32Strlen, void* pOutput, MS_S32* ps32OutSize)
9464 {
9465 MS_U32 ii;
9466 char* ptr = pstrQueryType;
9467
9468 *ps32OutSize = 0;
9469
9470 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s][%d](%s, %p)\n", __FUNCTION__, __LINE__, pstrQueryType, pOutput));
9471 DMX_ASSERT((pstrQueryType != NULL), DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Capability type string is NULL!\n", __LINE__)));
9472 DMX_ASSERT((pOutput != NULL), DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Output data pointer is NULL!\n", __LINE__)));
9473 DMX_ASSERT((s32Strlen > 8), DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Input Staring type is wrong!\n", __LINE__)));
9474
9475 if(strncmp(ptr, "DMX_CAP_", 8) != 0)
9476 {
9477 return DMX_FILTER_STATUS_ERROR;
9478 }
9479
9480 ptr += 8;
9481 for(ii = 0; ii < DMX_CAP_NULL; ii++)
9482 {
9483 if(strcmp(ptr, _tblDmxCapStr[ii].strCap) == 0)
9484 break;
9485 }
9486 if(ii == DMX_CAP_NULL)
9487 {
9488 return DMX_FILTER_STATUS_ERROR;
9489 }
9490
9491 *ps32OutSize = _tblDmxCapStr[ii].OutputSize;
9492
9493 return _MApi_DMX_GetCap(_tblDmxCapStr[ii].eCapType, pOutput);
9494
9495 }
9496
9497 DMX_FILTER_STATUS _MApi_DMX_SetBurstLen(DMX_BURSTTYPE BurstType)
9498 {
9499 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9500
9501 if(MDrv_TSP_BurstLen(BurstType) == DRVTSP_OK)
9502 {
9503 return DMX_FILTER_STATUS_OK;
9504 }
9505 else
9506 {
9507 return DMX_FILTER_STATUS_ERROR;
9508 }
9509 }
9510
9511 DMX_FILTER_STATUS _MApi_DMX_GetFileInTimeStamp(MS_U32 *pu32FileInTS)
9512 {
9513 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9514
9515 MDrv_TSP_GetFileInTimeStamp(pu32FileInTS);
9516 return DMX_FILTER_STATUS_OK;
9517 }
9518
9519 DMX_FILTER_STATUS _MApi_DMX_Filein_GetReadAddr(MS_PHY* pphyRead)
9520 {
9521 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9522
9523 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
9524
9525 if(MDrv_TSP_File_GetReadAddr(pphyRead) != DRVTSP_OK)
9526 {
9527 return DMX_FILTER_STATUS_ERROR;
9528 }
9529 #endif
9530
9531 return DMX_FILTER_STATUS_OK;
9532 }
9533
9534 /********************************************************************/
9535 /// Disable 192 mode blovk scheme to bypass fill-in timestamp
9536 ///@param bbypass \b IN: If true, bypass file-in timestamp.
9537 /********************************************************************/
9538 void _MApi_DMX_BypassFileInTimeStamp(MS_BOOL bbypass)
9539 {
9540 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9541
9542 MDrv_TSP_File_192BlockScheme_En(!bbypass);
9543 }
9544
9545 DMX_FILTER_STATUS _MApi_DMX_GetDbgPortInfo(MS_U32 u32DbgSel,MS_U32* u32DbgInfo)
9546 {
9547 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9548
9549 MDrv_TSP_GetDbgPortInfo(u32DbgSel,u32DbgInfo);
9550 return DMX_FILTER_STATUS_OK;
9551 }
9552
9553 //[RESERVED] Unofficial function for A/V flow control by APP
9554 DMX_FILTER_STATUS _MApi_DMX_SetAVPause(MS_BOOL bSet)
9555 {
9556 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9557
9558 _DMX_ENTRY();
9559
9560 #if defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0)
9561 MDrv_TSP_SetAVPause(bSet);
9562 #else
9563 // @TODO: hand over the control to APP if problem on LIVE mode
9564 // There is no know-how indicates that DSCMB burst output will cuase A/V FIFO overflow due to slow A/V
9565 // parser or decoder. - Jerry
9566 #endif
9567
9568 _DMX_RETURN(DMX_FILTER_STATUS_OK);
9569 }
9570
9571 #if 0
9572 DMX_FILTER_STATUS MApi_DMX_ResetFileinTimestamp(void)
9573 {
9574 MDrv_TSP_ResetFileinTimestamp();
9575 return DMX_FILTER_STATUS_OK;
9576 }
9577 #endif
9578
9579 DMX_FILTER_STATUS _MApi_TSP_Get_FW_VER(MS_U32* u32FWVer)
9580 {
9581 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9582
9583 MDrv_TSP_Get_FW_VER(u32FWVer);
9584 return DMX_FILTER_STATUS_OK;
9585 }
9586
9587 /********************************************************************/
9588 /// Enable remove duplicate A/V packets
9589 /// @param bEnable \b IN: Enable or Disable
9590 /// @return DMX_FILTER_STATUS
9591 /********************************************************************/
9592 DMX_FILTER_STATUS _MApi_DMX_RemoveDupAVPkt(MS_BOOL bEnable)
9593 {
9594 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9595
9596 if(MDrv_TSP_RemoveDupAVPkt(bEnable) == DRVTSP_OK)
9597 {
9598 return DMX_FILTER_STATUS_OK;
9599 }
9600 else
9601 {
9602 return DMX_FILTER_STATUS_ERROR;
9603 }
9604 }
9605
9606 /********************************************************************/
9607 /// Enable remove duplicate A/V Fifo packets
9608 /// @param DmxFltType \b IN: demux type
9609 /// @param bEnable \b IN: Enable or Disable
9610 /// @return DMX_FILTER_STATUS
9611 /********************************************************************/
9612 DMX_FILTER_STATUS _MApi_DMX_RemoveDupAVFifoPkt(DMX_FILTER_TYPE DmxFltType, MS_BOOL bEnable)
9613 {
9614 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
9615
9616 DrvTSP_FltType DrvFltTye;
9617
9618 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9619
9620 switch (DmxFltType)
9621 {
9622 case DMX_FILTER_TYPE_VIDEO:
9623 DrvFltTye = E_DRVTSP_FLT_TYPE_VIDEO;
9624 break;
9625 case DMX_FILTER_TYPE_AUDIO:
9626 DrvFltTye = E_DRVTSP_FLT_TYPE_AUDIO;
9627 break;
9628 case DMX_FILTER_TYPE_AUDIO2:
9629 DrvFltTye = E_DRVTSP_FLT_TYPE_AUDIO2;
9630 break;
9631 case DMX_FILTER_TYPE_VIDEO3D:
9632 DrvFltTye = E_DRVTSP_FLT_TYPE_VIDEO3D;
9633 break;
9634 default:
9635 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "Incorrect type for AVFIFO\n"));
9636 return DMX_FILTER_STATUS_ERROR;
9637 }
9638
9639 if(MDrv_TSP_RemoveDupAVFifoPkt(DrvFltTye, bEnable) == DRVTSP_OK)
9640 {
9641 return DMX_FILTER_STATUS_OK;
9642 }
9643
9644 #endif
9645 return DMX_FILTER_STATUS_ERROR;
9646 }
9647
9648 /********************************************************************/
9649 /// Enable or Disable to remove TEI audio or video error packets.
9650 /// @param bEnable \b IN: Enable or Disable
9651 /// @return DMX_FILTER_STATUS
9652 /********************************************************************/
9653 DMX_FILTER_STATUS _MApi_DMX_TEI_RemoveErrorPkt(DMX_TEI_RmPktType eDmxPktType, MS_BOOL bEnable )
9654 {
9655 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9656
9657 #if (!(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))) // For TSP_VER_3_0 and TSP_VER_4_0
9658
9659 TSP_DRV_TEI_RmPktType eDrvPktType = E_TSP_DRV_TEI_REMOVE_AUDIO_PKT;
9660
9661 switch ( eDmxPktType )
9662 {
9663 case E_DMX_TEI_REMOVE_AUDIO_PKT:
9664 eDrvPktType = E_TSP_DRV_TEI_REMOVE_AUDIO_PKT;
9665 break;
9666 case E_DMX_TEI_REMOVE_VIDEO_PKT:
9667 eDrvPktType = E_TSP_DRV_TEI_REMOVE_VIDEO_PKT;
9668 break;
9669 case E_DMX_TEI_REMOVE_PKT0_LIVE:
9670 eDrvPktType = E_TSP_DRV_TEI_REMOVE_PKT0_LIVE;
9671 break;
9672 case E_DMX_TEI_REMOVE_PKT0_FILE:
9673 eDrvPktType = E_TSP_DRV_TEI_REMOVE_PKT0_FILE;
9674 break;
9675 case E_DMX_TEI_REMOVE_PKT1:
9676 eDrvPktType = E_TSP_DRV_TEI_REMOVE_PKT1;
9677 break;
9678 case E_DMX_TEI_REMOVE_PKT2:
9679 eDrvPktType = E_TSP_DRV_TEI_REMOVE_PKT2;
9680 break;
9681 default:
9682 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad TEI__TYPE %u\n", __LINE__, (unsigned int)eDmxPktType));
9683 return DMX_FILTER_STATUS_ERROR;
9684 }
9685
9686 if(MDrv_TSP_TEI_RemoveErrorPkt( eDrvPktType, bEnable ) == DRVTSP_OK)
9687 {
9688 return DMX_FILTER_STATUS_OK;
9689 }
9690 else
9691 {
9692 return DMX_FILTER_STATUS_ERROR;
9693 }
9694 #else
9695 return DMX_FILTER_STATUS_ERROR;
9696 #endif
9697 }
9698
9699 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
9700 static TSP_PktMode _DMX_ApiDrv_PacketModeMapping(DMX_PacketMode ePacketMode)
9701 {
9702 switch (ePacketMode)
9703 {
9704 case DMX_PKTMODE_188:
9705 return E_TSP_PKTMODE_188;
9706 case DMX_PKTMODE_192:
9707 return E_TSP_PKTMODE_192;
9708 case DMX_PKTMODE_204:
9709 return E_TSP_PKTMODE_204;
9710 case DMX_PKTMODE_130:
9711 return E_TSP_PKTMODE_130;
9712 case DMX_PKTMODE_134:
9713 return E_TSP_PKTMODE_134;
9714 case DMX_PKTMODE_MERG188: //[STB]: merge188 -> CI+
9715 return E_TSP_PKTMODE_CIPLUS;
9716 case DMX_PKTMODE_MERG192: //[STB]: merge192 -> ATS
9717 return E_TSP_PKTMODE_ATS;
9718 case DMX_PKTMODE_200: //[STB]: single/merge 200 -> OpenCable
9719 case DMX_PKTMODE_MERG200:
9720 return E_TSP_PKTMODE_OPENCABLE;
9721 case DMX_PKTMODE_MXL192:
9722 return E_TSP_PKTMODE_MXL192;
9723 case DMX_PKTMODE_MXL196:
9724 return E_TSP_PKTMODE_MXL196;
9725 case DMX_PKTMODE_MXL200:
9726 return E_TSP_PKTMODE_MXL200;
9727 default:
9728 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad packet mode %d\n", __LINE__, (int)ePacketMode));
9729 return E_TSP_PKTMODE_188;
9730 }
9731 }
9732 #endif // End of TSP_VER_4_0
9733
9734 //-------------------------------------------------------------------------------------------------
9735 /// Set Demux Flow packet mode
9736 /// @param DmxFlow \b IN: DMX_FLOW_PLAYBACK for playback flow
9737 /// DMX_FLOW_PVR: for recording flow
9738 /// DMX_FLOW_PVRCA: for CA recording flow
9739 /// Below Items are not support for all chips:
9740 /// DMX_FLOW_PVR1: for second recording flow.
9741 /// DMX_FLOW_FILEIN_MM: for file-in playback with independed audio path.
9742 /// DMX_FLOW_FILEIN_MM3D: for file-in playback with 2nd video input source .
9743 ///
9744 /// @param ePktMode \b IN: Packet mode of flow path
9745 /// DMX_PKTMODE_188: Normal 188 packet mode
9746 /// DMX_PKTMODE_192: Normal 192 packet mode
9747 /// DMX_PKTMODE_204: Normal 204 packet mode
9748 /// DMX_PKTMODE_130: RVU 130 packet mode
9749 /// DMX_PKTMODE_134: RVU 134 packet mode
9750 /// DMX_PKTMODE_200: Open cable 200 packet mode
9751 /// DMX_PKTMODE_MERG188: Merge stream 188 packet mode
9752 /// DMX_PKTMODE_MERG192: Merge stream 192 packet mode
9753 /// DMX_PKTMODE_MERG200: Merge stream 200 packet mode
9754 /// @return DMX_FILTER_STATUS_OK - Success
9755 /// @return DMX_FILTER_STATUS_ERROR - Failure
9756 /// @note
9757 //-------------------------------------------------------------------------------------------------
9758 DMX_FILTER_STATUS _MApi_DMX_SetPacketMode(DMX_FLOW DmxFlow, DMX_PacketMode ePktMode)
9759 {
9760 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d (%d, %d)\n", __FUNCTION__, __LINE__, (int)DmxFlow, (int)ePktMode));
9761
9762 _DMX_ENTRY();
9763
9764 #if(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
9765
9766 MS_U32 u32TSIf = 0;
9767
9768 switch(DmxFlow)
9769 {
9770 case DMX_FLOW_PLAYBACK:
9771 u32TSIf = 0;
9772 break;
9773 case DMX_FLOW_PVR:
9774 case DMX_FLOW_PVRCA:
9775 u32TSIf = 1;
9776 break;
9777 case DMX_FLOW_PVR1:
9778 u32TSIf = 2;
9779 break;
9780 default:
9781 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[%s][%d] DMX flow Not Support !!\n",__FUNCTION__,__LINE__));
9782 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
9783 }
9784
9785 if(MDrv_TSP_SetPacketMode(u32TSIf, (DrvTSP_PacketMode)ePktMode) != DRVTSP_OK)
9786 {
9787 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
9788 }
9789
9790 _DMX_RETURN(DMX_FILTER_STATUS_OK);
9791
9792 #elif(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
9793
9794 MS_U32 u32TSIf = 0;
9795
9796 TSP_Result eRes = E_TSP_OK;
9797
9798 if(!_DMX_ApiDrv_DmxFlowMapping(DmxFlow,&u32TSIf))
9799 {
9800 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%s][%06d] _DMX_ApiDrv_DmxFlowMapping() fail \n", __FUNCTION__, __LINE__));
9801 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
9802 }
9803
9804 if((eRes = MDrv_TSP_SetPacketMode((TSP_TSIF)u32TSIf, _DMX_ApiDrv_PacketModeMapping(ePktMode))) != DRVTSP_OK)
9805 {
9806 if(eRes == E_TSP_FAIL_NOT_SUPPORTED)
9807 {
9808 _DMX_RETURN(DMX_FILTER_STATUS_NOT_SUPPORT);
9809 }
9810 else
9811 {
9812 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
9813 }
9814 }
9815
9816 _DMX_RETURN(DMX_FILTER_STATUS_OK);
9817
9818 #endif // End of TSP_VER_4_0
9819
9820 _DMX_RETURN(DMX_FILTER_STATUS_NOT_SUPPORT);
9821 }
9822
9823 //-------------------------------------------------------------------------------------------------
9824 /// Set Sync Byte value to Stream source ID or TS source ID
9825 /// @param u32SrcID \b IN: Index of stream source id or TS source id
9826 /// Stream source ID is from 0 ~7
9827 /// TS source ID is mapping TSIF index
9828 /// @param u8SyncByte \b IN: Sync byte, defalut value is 0x47
9829 ///
9830 /// @return DMX_FILTER_STATUS_OK - Success
9831 /// @return DMX_FILTER_STATUS_ERROR - Failure
9832 /// @note
9833 //-------------------------------------------------------------------------------------------------
9834 DMX_FILTER_STATUS _MApi_DMX_SetMergeStrSyncByte(MS_U32 u32SrcID, MS_U8 u8SyncByte)
9835 {
9836 #if(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
9837
9838 _DMX_ENTRY();
9839
9840 if(MDrv_TSP_SetMergeStrSyncByte(u32SrcID, u8SyncByte) != DRVTSP_OK)
9841 {
9842 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
9843 }
9844
9845 _DMX_RETURN(DMX_FILTER_STATUS_OK);
9846
9847 #else
9848
9849 return DMX_FILTER_STATUS_ERROR;
9850
9851 #endif
9852 }
9853
9854 /********************************************************************/
9855 /// Change DMX filter source type
9856 /// @param u8DmxId \b IN: DMX filter ID
9857 /// @param DmxFltSrcType \b IN: DMX filter Source Type and filter source id
9858 /// @return DMX_FILTER_STATUS
9859 /********************************************************************/
9860 DMX_FILTER_STATUS _MApi_DMX_Change_FilterSource(MS_U32 u32DmxId, DMX_FILTER_TYPE DmxFltSrcType)
9861 {
9862 _DMX_ENTRY();
9863
9864 MS_U32 u32TSPFltSource = DmxFltSrcType & ((MS_U32)DMX_FILTER_FLT_MASK);
9865
9866 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
9867 u32TSPFltSource = _DMX_ApiDrv_FltSrcMapping(u32TSPFltSource);
9868 #endif
9869
9870 MDrv_TSP_PidFlt_ChangeSource(0, u32DmxId, u32TSPFltSource);
9871
9872 _DMX_RETURN(DMX_FILTER_STATUS_OK);
9873 }
9874
9875 //-------------------------------------------------------------------------------------------------
9876 /// Set memory buffer information for TSP AEON to print debug message
9877 /// @param phyAddr \b IN: physical address of buffer
9878 /// @param u32Size \b IN: size of buffer
9879 /// @param u32DbgWord \b IN: control word to filter debug message
9880 /// @return DMX_FILTER_STATUS_OK - Success
9881 /// @return DMX_FILTER_STATUS_ERROR - Failure
9882 /// @note
9883 //-------------------------------------------------------------------------------------------------
9884 DMX_FILTER_STATUS _MApi_DMX_SetFwDbgParam(MS_PHY phyAddr, MS_U32 u32Size, MS_U32 u32DbgWord)
9885 {
9886 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d, u32Addr = 0x%x, u32Size = 0x%x\n", __FUNCTION__, __LINE__, (unsigned int)phyAddr, (unsigned int)u32Size));
9887
9888 #if defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0))
9889 DMX_ASSERT((!(phyAddr & 0x3) && !(u32Size & 0x3)), DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] memory address 0x%x size 0x%x not alignment\n",
9890 __LINE__, (unsigned int)phyAddr, (unsigned int)u32Size)));
9891
9892 memset((void*)((MS_VIRT)phyAddr), 0x0, u32Size);
9893
9894 if(DRVTSP_OK == MDrv_TSP_SetFwDBGParam(phyAddr, u32Size, u32DbgWord))
9895 {
9896 return DMX_FILTER_STATUS_OK;
9897 }
9898 else
9899 {
9900 return DMX_FILTER_STATUS_ERROR;
9901 }
9902 #else
9903 return DMX_FILTER_STATUS_ERROR;
9904 #endif
9905 }
9906
9907 DMX_FILTER_STATUS _MApi_DMX_SetDbgLevel(DMX_DBGMSG_LEVEL level)
9908 {
9909 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
9910 DrvTSP_DbgLevel drvLayerLevel = E_DRVTSP_DBG_L1;
9911 #endif
9912
9913 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
9914
9915 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9916
9917 switch (level)
9918 {
9919 case DMX_DBG_ERR:
9920 case DMX_DBG_WARN:
9921 case DMX_DBG_INFO:
9922 case DMX_DBG_FUNC:
9923 drvLayerLevel = E_DRVTSP_DBG_L1;
9924 break;
9925 case DMX_DBG_NONE:
9926 drvLayerLevel = E_DRVTSP_DBG_Release;
9927 break;
9928 default:
9929 break;
9930 }
9931
9932 MDrv_TSP_SetDbgLevel(drvLayerLevel);
9933
9934 #else // For TSP_VER_4_0
9935
9936 DMX_DBGMSG(DMX_DBG_FUNC, printf("[%s] %d\n", __FUNCTION__, __LINE__));
9937 TSP_DbgLevel eDrvTspDbgLevel = E_TSP_DBG_ERROR;
9938
9939 switch(level)
9940 {
9941 case DMX_DBG_NONE:
9942 eDrvTspDbgLevel = E_TSP_DBG_NONE;
9943 break;
9944 case DMX_DBG_ERR:
9945 eDrvTspDbgLevel = E_TSP_DBG_ERROR;
9946 break;
9947 case DMX_DBG_WARN:
9948 eDrvTspDbgLevel = E_TSP_DBG_WARNING;
9949 break;
9950 case DMX_DBG_INFO:
9951 eDrvTspDbgLevel = E_TSP_DBG_INFO;
9952 break;
9953 case DMX_DBG_FUNC:
9954 eDrvTspDbgLevel = E_TSP_DBG_TRACK;
9955 break;
9956
9957 default:
9958 break;
9959
9960 }
9961 printf("level = %d\n",level);
9962 MDrv_TSP_SetDbgLevel(eDrvTspDbgLevel);
9963
9964 #endif // End of TSP_VER_4_0
9965
9966 _u32DMXDbgLevel = level;
9967 return DMX_FILTER_STATUS_OK;
9968 }
9969
9970 //--------------------------------------------------------------------------------------------------
9971 /// Enable or Disable STC64 bit mode. Defalut is STC33 mode.
9972 /// @param bEnable \b IN: Enable or Disable STC64 mode
9973 /// @return DMX_FILTER_STATUS
9974 /// @note
9975 //--------------------------------------------------------------------------------------------------
9976 DMX_FILTER_STATUS _MApi_DMX_STC64_Mode_Enable(MS_BOOL bEnable)
9977 {
9978 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
9979
9980 #ifdef STC64_SUPPORT
9981 MDrv_TSP_STC64_Mode_Enable(bEnable);
9982 return DMX_FILTER_STATUS_OK;
9983 #else
9984 return DMX_FILTER_STATUS_ERROR;
9985 #endif
9986 }
9987
9988 //-------------------------------------------------------------------------------------------------
9989 /// Open a demux filter and attach to a existed filter and buffer
9990 /// @param DmxFltType \b IN: the filter information to allocate
9991 /// @param pu8DmxId \b OUT: the available demux filer Id
9992 /// @param u8TargetDmxId \b IN: the target demux filer Id
9993 /// @return DMX_FILTER_STATUS_OK - Success
9994 /// @return DMX_FILTER_STATUS_ERROR - Failure
9995 /// @note
9996 /// @note API for U4 TSP N filter to 1 Buffer HW architecture.
9997 //-------------------------------------------------------------------------------------------------
9998 DMX_FILTER_STATUS _MApi_DMX_Open_MultiFlt(DMX_FILTER_TYPE DmxFltType , MS_U8* pu8DmxId, MS_U8 u8TargetDmxId)
9999 {
10000 #if (defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0)))
10001
10002 ULOGE("DMX", "[%s] Function Not support!! \n",__FUNCTION__);
10003 return DMX_FILTER_STATUS_ERROR ;
10004
10005 #else // For TSP_VER_4_0
10006
10007 MS_U32 FltId= 0xFFFFFFFF;
10008 MS_U32 BufId= _pdmx_res->_FltList[u8TargetDmxId].SecBufId;
10009 DMX_FILTER_TYPE TgtDmxFltType;
10010 MS_U32 u32TSPFltSource = DmxFltType & DMX_FILTER_FLT_MASK ;
10011 DrvTSP_FltType eTspFltType = E_DRVTSP_FLT_TYPE_VIDEO;
10012
10013 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10014 DMX_ASSERT(DMX_MAX_FLTID> u8TargetDmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Target Demux id %d\n", __LINE__, u8TargetDmxId)));
10015
10016 _DMX_ENTRY();
10017
10018 ULOGD("DMX", "input Filter Type = %08X \n",(unsigned int)DmxFltType);
10019
10020 DmxFltType = DmxFltType & (DMX_FILTER_TYPE)(~DMX_FILTER_FLT_MASK);
10021 _FLT_LIST_TYPE_GET(u8TargetDmxId,&TgtDmxFltType);
10022
10023 ULOGD("DMX", "Get FlType %08X \n",(unsigned int)TgtDmxFltType);
10024
10025 switch (TgtDmxFltType)
10026 {
10027 case DMX_FILTER_TYPE_SECTION:
10028 eTspFltType= E_DRVTSP_FLT_TYPE_SECTION;
10029 break;
10030 case DMX_FILTER_TYPE_TELETEXT:
10031 eTspFltType= E_DRVTSP_FLT_TYPE_TELETEXT;
10032 break;
10033 case DMX_FILTER_TYPE_PES:
10034 eTspFltType= E_DRVTSP_FLT_TYPE_PES;
10035 break;
10036 case DMX_FILTER_TYPE_PACKET:
10037 eTspFltType= E_DRVTSP_FLT_TYPE_PACKET;
10038 break;
10039 case DMX_FILTER_TYPE_PCR:
10040 eTspFltType= E_DRVTSP_FLT_TYPE_PCR;
10041 break;
10042 }
10043
10044 if( DmxFltType != TgtDmxFltType)
10045 {
10046 ULOGE("DMX", "[MAPI DMX][%06d] MultiFlt Type mismatch %u\n", __LINE__, (unsigned int)FltId);
10047 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
10048 }
10049
10050 if (DRVTSP_OK!= MDrv_TSP_PidFlt_Alloc(_Owner , (DrvTSP_FltType)(eTspFltType|u32TSPFltSource), &FltId))
10051 {
10052 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
10053 }
10054 DMX_ASSERT2(FltId< DMX_MAX_FLTID, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad FltId %u\n", __LINE__, (unsigned int)FltId)));
10055
10056 ULOGD("DMX", "MultiFlt FltId = %u \n",(unsigned int)FltId);
10057
10058 MDrv_TSP_PidFlt_SelSecFlt(0, FltId, BufId);
10059
10060 ULOGD("DMX", "MultiFlt AttachBuffer flt %u Buf %u\n",(unsigned int)FltId,(unsigned int)BufId);
10061
10062 _FLT_LIST_SECFLT_TYPE_SET(FltId, FltId, BufId, TgtDmxFltType);
10063 *pu8DmxId = (MS_U8)FltId;
10064
10065 _DMX_RETURN( DMX_FILTER_STATUS_OK);
10066 #endif // End of TSP_VER_4_0
10067 }
10068
10069 /********************************************************************/
10070 /// Get interrupt count
10071 ///@param pu32Count \b OUT: interrupt count
10072 ///@return DMX_FILTER_STATUS
10073 /********************************************************************/
10074 DMX_FILTER_STATUS _MApi_DMX_Get_Intr_Count(MS_U32* pu32Count)
10075 {
10076 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10077
10078 #if defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0))
10079 MDrv_TSP_Get_Intr_Count(pu32Count);
10080 return DMX_FILTER_STATUS_OK;
10081 #else
10082 return DMX_FILTER_STATUS_ERROR;
10083 #endif
10084 }
10085
10086 DMX_FILTER_STATUS _MApi_DMX_Drop_Enable(MS_BOOL bSet)
10087 {
10088 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10089
10090 return DMX_FILTER_STATUS_ERROR;
10091 }
10092
10093 //-------------------------------------------------------------------------------------------------
10094 /// Check if MMFilein no memory transfer is under going
10095 /// @param ePath \b IN: MM File-in Path
10096 /// @return TRUE if busy, FALSE otherwise
10097 /// @note
10098 //-------------------------------------------------------------------------------------------------
10099 MS_BOOL _MApi_DMX_MMFI_Filein_IsIdle(DMX_MMFI_PATH ePath)
10100 {
10101 #if defined(MMFILEIN)
10102
10103 DrvMMFI_FileinState FileinState = E_DRVMMFI_STATE_UNKNOWN;
10104
10105 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10106
10107 if (DRVMMFI_OK!= MDrv_MMFI_File_GetState((DrvMMFI_Path)ePath, &FileinState))
10108 {
10109 DMX_ASSERT(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Call MDrv_MMFI_File_GetState fail\n", __LINE__)));
10110 }
10111 return (E_DRVMMFI_STATE_IDLE== FileinState);
10112 #else
10113 return FALSE;
10114 #endif
10115 }
10116
10117 //-------------------------------------------------------------------------------------------------
10118 /// Check if MMFilein memory transfer is under going
10119 /// @param ePath \b IN: MM File-in Path
10120 /// @return TRUE if busy, FALSE otherwise
10121 /// @note
10122 //-------------------------------------------------------------------------------------------------
10123 MS_BOOL _MApi_DMX_MMFI_Filein_IsBusy(DMX_MMFI_PATH ePath)
10124 {
10125 #if defined(MMFILEIN)
10126 DrvMMFI_FileinState FileinState = E_DRVMMFI_STATE_UNKNOWN;
10127
10128 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10129
10130 if (DRVMMFI_OK!= MDrv_MMFI_File_GetState((DrvMMFI_Path)ePath, &FileinState))
10131 {
10132 DMX_ASSERT(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Call MDrv_MMFI_File_GetState fail\n", __LINE__)));
10133 }
10134 return (E_DRVMMFI_STATE_BUSY== FileinState);
10135 #else
10136 return FALSE;
10137 #endif
10138 }
10139
10140 //-------------------------------------------------------------------------------------------------
10141 /// Reset MMFilein Command queue
10142 /// @param ePath \b IN: MM File-in Path
10143 /// @return DMX_FILTER_STATUS_OK - Success
10144 /// @return DMX_FILTER_STATUS_ERROR - Failure
10145 /// @note
10146 //-------------------------------------------------------------------------------------------------
10147 DMX_FILTER_STATUS _MApi_DMX_MMFI_Filein_CMDQ_Reset(DMX_MMFI_PATH ePath)
10148 {
10149 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10150
10151 #if defined(MMFILEIN)
10152
10153 if(MDrv_MMFI_File_CmdQ_Reset((DrvMMFI_Path)ePath) == DRVMMFI_OK)
10154 {
10155 #ifdef DMX_RESET_FI_TIMESTAMP
10156 if(_pdmx_res->_bPlayTimestampEnable[ePath+1] == TRUE)
10157 {
10158 _DMX_MMFI_ENTRY();
10159 MDrv_MMFI_File_SetAddr(ePath, _pdmx_res->_phyFI192DummyBufAddr);
10160 MDrv_MMFI_File_SetSize(ePath, _pdmx_res->_u32FI192DummyBufSize);
10161 MDrv_MMFI_File_Start(ePath);
10162 _DMX_MMFI_RETURN(DMX_FILTER_STATUS_OK);
10163 }
10164 #endif
10165
10166 return DMX_FILTER_STATUS_OK;
10167 }
10168 else
10169 {
10170 return DMX_FILTER_STATUS_ERROR;
10171 }
10172 #else
10173 return DMX_FILTER_STATUS_ERROR;
10174 #endif
10175 }
10176
10177 //-------------------------------------------------------------------------------------------------
10178 /// Resume to get bit stream by memeory
10179 /// @param ePath \b IN: MM File-in Path
10180 /// @param pu32EmptySlot \b OUT: Empty slot
10181 /// @return DMX_FILTER_STATUS_OK - Success
10182 /// @return DMX_FILTER_STATUS_ERROR - Failure
10183 /// @note
10184 //-------------------------------------------------------------------------------------------------
10185 DMX_FILTER_STATUS _MApi_DMX_MMFI_Filein_CMDQ_GetEmptyNum(DMX_MMFI_PATH ePath, MS_U32 *pu32EmptySlot)
10186 {
10187 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10188
10189 #ifdef MMFILEIN
10190 MDrv_MMFI_File_CmdQ_GetSlot((DrvMMFI_Path)ePath, pu32EmptySlot);
10191 return DMX_FILTER_STATUS_OK;
10192 #else
10193 return DMX_FILTER_STATUS_ERROR;
10194 #endif
10195 }
10196
10197 //-------------------------------------------------------------------------------------------------
10198 /// Start to get bit stream by memeory
10199 /// @param eDst \b IN: file in destination path
10200 /// @param pBuf \b IN: the memory containing the bit stream
10201 /// @param u32BufSize \b IN: the size the memory to get
10202 /// @return DMX_FILTER_STATUS_OK - Success
10203 /// @return DMX_FILTER_STATUS_ERROR - Failure
10204 /// @note
10205 //-------------------------------------------------------------------------------------------------
10206 DMX_FILTER_STATUS _MApi_DMX_MMFI_Filein_Start(DMX_MMFI_DST eDst, MS_PHY pBuf, MS_U32 u32BufSize)
10207 {
10208 #if !(defined(MMFILEIN))
10209 return DMX_FILTER_STATUS_ERROR;
10210 #else
10211
10212 #if defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0)
10213 DrvMMFI_Path path= E_DRVMMFI_PATH0;
10214 #else
10215 DrvTSP_FileinMode FileMode = E_DRVTSP_FILEIN_MODE_ENG0_TS;
10216 DrvMMFI_Path path= E_DRVMMFI_PTH_AUDIO;
10217 #endif
10218
10219 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10220
10221 _DMX_MMFI_ENTRY();
10222
10223 if(MDrv_MMFI_File_ModeEnable((DrvMMFI_FileinMode)eDst, TRUE) != DRVMMFI_OK)
10224 {
10225 _DMX_MMFI_RETURN(DMX_FILTER_STATUS_ERROR);
10226 }
10227
10228 #if !(defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0))
10229 switch(eDst & (~DMX_MMFI1_PES_TYPE_MASK))
10230 {
10231 case DMX_MMFI_PES_NO_BYPASS_TS:
10232 FileMode = E_DRVTSP_FILEIN_MODE_ENG0_TS;
10233 break;
10234 case DMX_MMFI_PES_PS_AU:
10235 FileMode = E_DRVTSP_FILEIN_MODE_ENG0_APES;
10236 break;
10237 case DMX_MMFI_PES_PS_AUB:
10238 FileMode = E_DRVTSP_FILEIN_MODE_ENG0_A2PES;
10239 break;
10240
10241 #if defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0)
10242 case DMX_MMFI_PES_PS_VD:
10243 FileMode = E_DRVTSP_FILEIN_MODE_ENG0_VPES;
10244 break;
10245 #endif //end MMFI_VER_2_0
10246
10247 #ifdef MMFI_VD3D
10248 case DMX_MMFI_PES_PS_V3D:
10249 FileMode = E_DRVTSP_FILEIN_MODE_ENG0_V3DPES;
10250 break;
10251 #endif //end MMFI_VD3D
10252 default:
10253 break;
10254 }
10255
10256 MDrv_TSP_File_PS_Path_Enable(FileMode);
10257
10258 #endif
10259
10260 #if defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0)
10261
10262 switch(eDst & (~DMX_MMFI1_PES_TYPE_MASK))
10263 {
10264 case DMX_MMFI_PES_PS_AU:
10265 MDrv_TSP_AVFifo_BlockEnable(E_DRVTSP_FLT_TYPE_AUDIO, FALSE);
10266 break;
10267 case DMX_MMFI_PES_PS_AUB:
10268 MDrv_TSP_AVFifo_BlockEnable(E_DRVTSP_FLT_TYPE_AUDIO2, FALSE);
10269 break;
10270 case DMX_MMFI_PES_PS_VD:
10271 MDrv_TSP_AVFifo_BlockEnable(E_DRVTSP_FLT_TYPE_VIDEO, FALSE);
10272 break;
10273 #ifdef MMFI_VD3D
10274 case DMX_MMFI_PES_PS_V3D:
10275 MDrv_TSP_AVFifo_BlockEnable(E_DRVTSP_FLT_TYPE_VIDEO3D, FALSE);
10276 break;
10277 #endif //end MMFI_VD3D
10278 case DMX_MMFI_PES_PS_AUC:
10279 MDrv_TSP_AVFifo_BlockEnable(E_DRVTSP_FLT_TYPE_AUDIO3, FALSE);
10280 break;
10281 case DMX_MMFI_PES_PS_AUD:
10282 MDrv_TSP_AVFifo_BlockEnable(E_DRVTSP_FLT_TYPE_AUDIO4, FALSE);
10283 break;
10284 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
10285 case DMX_MMFI_PES_PS_AUE:
10286 MDrv_TSP_AVFifo_BlockEnable(E_DRVTSP_FLT_TYPE_AUDIO5, FALSE);
10287 break;
10288 case DMX_MMFI_PES_PS_AUF:
10289 MDrv_TSP_AVFifo_BlockEnable(E_DRVTSP_FLT_TYPE_AUDIO6, FALSE);
10290 break;
10291 case DMX_MMFI_PES_PS_VD3:
10292 MDrv_TSP_AVFifo_BlockEnable(E_DRVTSP_FLT_TYPE_VIDEO3, FALSE);
10293 break;
10294 case DMX_MMFI_PES_PS_VD4:
10295 MDrv_TSP_AVFifo_BlockEnable(E_DRVTSP_FLT_TYPE_VIDEO4, FALSE);
10296 break;
10297 case DMX_MMFI_PES_PS_VD5:
10298 MDrv_TSP_AVFifo_BlockEnable(E_DRVTSP_FLT_TYPE_VIDEO5, FALSE);
10299 break;
10300 case DMX_MMFI_PES_PS_VD6:
10301 MDrv_TSP_AVFifo_BlockEnable(E_DRVTSP_FLT_TYPE_VIDEO6, FALSE);
10302 break;
10303 case DMX_MMFI_PES_PS_VD7:
10304 MDrv_TSP_AVFifo_BlockEnable(E_DRVTSP_FLT_TYPE_VIDEO7, FALSE);
10305 break;
10306 case DMX_MMFI_PES_PS_VD8:
10307 MDrv_TSP_AVFifo_BlockEnable(E_DRVTSP_FLT_TYPE_VIDEO8, FALSE);
10308 break;
10309 #endif
10310 default:
10311 break;
10312 }
10313
10314 if(eDst & DMX_MMFI1_PES_TYPE_MASK)
10315 {
10316 path= E_DRVMMFI_PATH1;
10317 }
10318 #else //MMFI_VER_2_0
10319 #ifdef MMFI_VD3D
10320 if((eDst == DMX_MMFI_PES_V3DPID_BYPASS) || (eDst == DMX_MMFI_PES_NO_BYPASS_V3D)
10321 || (eDst == DMX_MMFI_PES_PS_V3D))
10322 {
10323 path = E_DRVMMFI_PATH_VD3D;
10324 }
10325 #endif
10326
10327 #endif
10328
10329 #ifdef SECURE_PVR_ENABLE
10330 _pdmx_res->_stSecBuf.u32BufId = ((MS_U8)path) & 0xFF;
10331 _pdmx_res->_stSecBuf.u32BufOpt = 0;
10332 _pdmx_res->_stSecBuf.phyBufAddr = pBuf;
10333 _pdmx_res->_stSecBuf.u32BufSize = u32BufSize;
10334 if(MDrv_TSP_Ree_SendTeeCmd(E_DRVTSP_REE_TO_TEE_CMD_SET_MMFIBuf, (void*)&(_pdmx_res->_stSecBuf), sizeof(DrvTSP_SecureBuf)) != DRVTSP_OK)
10335 {
10336 _DMX_MMFI_RETURN(DMX_FILTER_STATUS_ERROR);
10337 }
10338 #else
10339 if (DRVMMFI_OK != MDrv_MMFI_File_SetAddr(path, pBuf))
10340 {
10341 _DMX_MMFI_RETURN(DMX_FILTER_STATUS_ERROR);
10342 }
10343 if (DRVMMFI_OK != MDrv_MMFI_File_SetSize(path, u32BufSize))
10344 {
10345 _DMX_MMFI_RETURN(DMX_FILTER_STATUS_ERROR);
10346 }
10347 #endif //SECURE_PVR_ENABLE
10348
10349 if (DRVMMFI_OK!= MDrv_MMFI_File_Start(path))
10350 {
10351 _DMX_MMFI_RETURN(DMX_FILTER_STATUS_ERROR);
10352 }
10353
10354 _DMX_MMFI_RETURN(DMX_FILTER_STATUS_OK);
10355
10356 #endif //!(defined(MMFILEIN))
10357 }
10358
10359 //-------------------------------------------------------------------------------------------------
10360 /// Set up parameters for input bit stream from memory
10361 /// @param ePath \b IN: MM File-in Path
10362 /// @param pFileinInfo \b IN: the file in parameters
10363 /// @return DMX_FILTER_STATUS_OK - Success
10364 /// @return DMX_FILTER_STATUS_ERROR - Failure
10365 /// @note
10366 //-------------------------------------------------------------------------------------------------
10367 DMX_FILTER_STATUS _MApi_DMX_MMFI_Filein_Info(DMX_MMFI_PATH ePath, DMX_Filein_info *pFileinInfo)
10368 {
10369 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10370
10371 #ifdef MMFILEIN
10372 _DMX_MMFI_ENTRY();
10373 MDrv_MMFI_File_SetPacketMode((DrvMMFI_Path)ePath, (DrvMMFI_PacketMode)pFileinInfo->PKT_Mode);
10374 MDrv_MMFI_File_SetTimer((DrvMMFI_Path)ePath, (MS_U8)(pFileinInfo->Rate & 0xFF));
10375 _DMX_MMFI_RETURN(DMX_FILTER_STATUS_OK);
10376
10377 #else
10378
10379 return DMX_FILTER_STATUS_ERROR;
10380
10381 #endif
10382 }
10383
10384 //-------------------------------------------------------------------------------------------------
10385 /// Disable 192 mode blovk scheme to bypass fill-in timestamp
10386 /// @param ePath \b IN: MM File-in Path
10387 /// @param bbypass \b IN: If true, bypass file-in timestamp.
10388 //-------------------------------------------------------------------------------------------------
10389 void _MApi_DMX_MMFI_Filein_BypassTimeStamp(DMX_MMFI_PATH ePath, MS_BOOL bbypass)
10390 {
10391 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10392
10393 #ifdef MMFILEIN
10394 _DMX_MMFI_ENTRY();
10395 MDrv_MMFI_File_192BlockScheme_En((DrvMMFI_Path)ePath, !bbypass);
10396 MsOS_ReleaseMutex(_pdmx_res->_Dmx_MMFI_Mutex);
10397 #endif
10398 }
10399
10400 //-------------------------------------------------------------------------------------------------
10401 /// Free the PID of MM Filein
10402 /// @param ePath \b IN: MM File-in Path
10403 /// @param pu32FileInTS \b OUT: pointer for timestamp value
10404 /// @return DMX_FILTER_STATUS_OK - Success
10405 /// @return DMX_FILTER_STATUS_ERROR - Failure
10406 /// @note
10407 //-------------------------------------------------------------------------------------------------
10408 DMX_FILTER_STATUS _MApi_DMX_MMFI_GetFileInTimeStamp(DMX_MMFI_PATH ePath, MS_U32 *pu32FileInTS)
10409 {
10410 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10411
10412 #ifdef MMFILEIN
10413 MDrv_MMFI_GetFileInTimeStamp((DrvMMFI_Path)ePath, pu32FileInTS);
10414 return DMX_FILTER_STATUS_OK;
10415 #else
10416 return DMX_FILTER_STATUS_ERROR;
10417 #endif
10418 }
10419
10420 //-------------------------------------------------------------------------------------------------
10421 /// Set the PID to be MM File-in
10422 /// @param Pid \b IN: The target PID for MM Filein
10423 /// @param pu8DmxId \b OUT: The demux filter Id for this MMFilein PID
10424 /// @return DMX_FILTER_STATUS_OK - Success
10425 /// @return DMX_FILTER_STATUS_ERROR - Failure
10426 /// @note
10427 //-------------------------------------------------------------------------------------------------
10428 DMX_FILTER_STATUS _MApi_DMX_MMFI_Pid_Open(DMX_MMFI_FLTTYPE flttype, MS_U16 u16Pid, MS_U8* pu8DmxId)
10429 {
10430 #ifndef MMFILEIN
10431 return DMX_FILTER_STATUS_ERROR;
10432 #else
10433
10434 DrvMMFI_FltType type = E_DRVMMFI_FLTTYPE_NONE;
10435
10436 #if defined(MMFI_VERSION) && (MMFI_VERSION == MMFI_VER_2_0)
10437 DrvMMFI_Path epath = E_DRVMMFI_PATH0;
10438
10439 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
10440 TSP_TSId eTspTSid = E_TSP_TSID_INVALID;
10441 TSP_FileMode eFifoType = E_TSP_FILE_2_TSP;
10442 #endif
10443
10444 #endif
10445
10446 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10447
10448 _DMX_MMFI_ENTRY();
10449
10450 switch(flttype & ~(DMX_MMFI1_FLTTYPE_MASK))
10451 {
10452 case DMX_MMFI_FLTTYPE_AUD:
10453 type = E_DRVMMFI_FLTTYPE_AUD;
10454 break;
10455 case DMX_MMFI_FLTTYPE_AUDB:
10456 type = E_DRVMMFI_FLTTYPE_AUDB;
10457 break;
10458 #ifdef MMFI_VD3D
10459 case DMX_MMFI_FLTTYPE_VD3D:
10460 type = E_DRVMMFI_FLTTYPE_VD3D;
10461 break;
10462 #endif
10463 #if defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0)
10464 case DMX_MMFI_FLTTYPE_VD:
10465 type = E_DRVMMFI_FLTTYPE_VD;
10466 break;
10467 case DMX_MMFI_FLTTYPE_AUDC:
10468 type = E_DRVMMFI_FLTTYPE_AUDC;
10469 break;
10470 case DMX_MMFI_FLTTYPE_AUDD:
10471 type = E_DRVMMFI_FLTTYPE_AUDD;
10472 break;
10473 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
10474 case DMX_MMFI_FLTTYPE_AUDE:
10475 type = E_DRVMMFI_FLTTYPE_AUDE;
10476 break;
10477 case DMX_MMFI_FLTTYPE_AUDF:
10478 type = E_DRVMMFI_FLTTYPE_AUDF;
10479 break;
10480 case DMX_MMFI_FLTTYPE_VD3:
10481 type = E_DRVMMFI_FLTTYPE_VD3;
10482 break;
10483 case DMX_MMFI_FLTTYPE_VD4:
10484 type = E_DRVMMFI_FLTTYPE_VD4;
10485 break;
10486 case DMX_MMFI_FLTTYPE_VD5:
10487 type = E_DRVMMFI_FLTTYPE_VD5;
10488 break;
10489 case DMX_MMFI_FLTTYPE_VD6:
10490 type = E_DRVMMFI_FLTTYPE_VD6;
10491 break;
10492 case DMX_MMFI_FLTTYPE_VD7:
10493 type = E_DRVMMFI_FLTTYPE_VD7;
10494 break;
10495 case DMX_MMFI_FLTTYPE_VD8:
10496 type = E_DRVMMFI_FLTTYPE_VD8;
10497 break;
10498 #endif
10499 #endif
10500 default:
10501 _DMX_MMFI_RETURN(DMX_FILTER_STATUS_ERROR);
10502 break;
10503 }
10504
10505 #if defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0)
10506 if(flttype & DMX_MMFI1_FLTTYPE_MASK)
10507 {
10508 epath = E_DRVMMFI_PATH1;
10509 }
10510 if(MDrv_MMFI_PidFlt_Alloc(epath, type, pu8DmxId) == DRVMMFI_FAIL)
10511 {
10512 _DMX_MMFI_RETURN(DMX_FILTER_STATUS_ERROR);
10513 }
10514 #if defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0))
10515
10516 MDrv_TSP_AVFifo_SourceSelect((MS_U32)epath + (MS_U32)E_DRVTSP_PKTSRC_DEMUXMMFI0, (MS_U32)(flttype & ~(DMX_MMFI1_FLTTYPE_MASK)));
10517
10518 #else // For TSP_VER_4_0
10519 switch(epath)
10520 {
10521 case E_DRVMMFI_PATH0:
10522 eTspTSid = E_TSP_TSID_MMFI0;
10523 break;
10524 case E_DRVMMFI_PATH1:
10525 eTspTSid = E_TSP_TSID_MMFI1;
10526 break;
10527 default:
10528 _DMX_MMFI_RETURN(DMX_FILTER_STATUS_ERROR);
10529 break;
10530 }
10531
10532 switch(type)
10533 {
10534 case E_DRVMMFI_FLTTYPE_AUD:
10535 eFifoType = E_TSP_FILE_2_AUDIO;
10536 break;
10537 case E_DRVMMFI_FLTTYPE_AUDB:
10538 eFifoType = E_TSP_FILE_2_AUDIO2;
10539 break;
10540 case E_DRVMMFI_FLTTYPE_AUDC:
10541 eFifoType = E_TSP_FILE_2_AUDIO3;
10542 break;
10543 case E_DRVMMFI_FLTTYPE_AUDD:
10544 eFifoType = E_TSP_FILE_2_AUDIO4;
10545 break;
10546 case E_DRVMMFI_FLTTYPE_AUDE:
10547 eFifoType = E_TSP_FILE_2_AUDIO5;
10548 break;
10549 case E_DRVMMFI_FLTTYPE_AUDF:
10550 eFifoType = E_TSP_FILE_2_AUDIO6;
10551 break;
10552 case E_DRVMMFI_FLTTYPE_VD:
10553 eFifoType = E_TSP_FILE_2_VIDEO;
10554 break;
10555 case E_DRVMMFI_FLTTYPE_VD3D:
10556 eFifoType = E_TSP_FILE_2_VIDEO3D;
10557 break;
10558 case E_DRVMMFI_FLTTYPE_VD3:
10559 eFifoType = E_TSP_FILE_2_VIDEO3;
10560 break;
10561 case E_DRVMMFI_FLTTYPE_VD4:
10562 eFifoType = E_TSP_FILE_2_VIDEO4;
10563 break;
10564 case E_DRVMMFI_FLTTYPE_VD5:
10565 eFifoType = E_TSP_FILE_2_VIDEO5;
10566 break;
10567 case E_DRVMMFI_FLTTYPE_VD6:
10568 eFifoType = E_TSP_FILE_2_VIDEO6;
10569 break;
10570 case E_DRVMMFI_FLTTYPE_VD7:
10571 eFifoType = E_TSP_FILE_2_VIDEO7;
10572 break;
10573 case E_DRVMMFI_FLTTYPE_VD8:
10574 eFifoType = E_TSP_FILE_2_VIDEO8;
10575 break;
10576 default:
10577 _DMX_MMFI_RETURN(DMX_FILTER_STATUS_ERROR);
10578 break;
10579 }
10580
10581 MDrv_TSP_AVFifo_SourceSelect(eTspTSid,eFifoType);
10582
10583 #endif // End of TSP_VER_4_0
10584
10585 #else //else MMFI_VER_2_0
10586
10587 if(MDrv_MMFI_PidFlt_Alloc(type, pu8DmxId) == DRVMMFI_FAIL)
10588 {
10589 _DMX_MMFI_RETURN(DMX_FILTER_STATUS_ERROR);
10590 }
10591 #endif //endif MMFI_VER_2_0
10592
10593 if(MDrv_MMFI_PidFlt_SetPid(*pu8DmxId, u16Pid) == DRVMMFI_FAIL)
10594 {
10595 _DMX_MMFI_RETURN(DMX_FILTER_STATUS_ERROR);
10596 }
10597 if(MDrv_MMFI_PidFlt_Enable(*pu8DmxId, TRUE) == DRVMMFI_FAIL)
10598 {
10599 _DMX_MMFI_RETURN(DMX_FILTER_STATUS_ERROR);
10600 }
10601
10602 _DMX_MMFI_RETURN(DMX_FILTER_STATUS_OK);
10603 #endif // End of MMFILEIN
10604 }
10605
10606 //-------------------------------------------------------------------------------------------------
10607 /// Free the PID of MM Filein
10608 /// @param u8DmxId \b IN: The demux filter Id from MApi_DMX_Pvr_Pid_Open
10609 /// @return DMX_FILTER_STATUS_OK - Success
10610 /// @return DMX_FILTER_STATUS_ERROR - Failure
10611 /// @note
10612 //-------------------------------------------------------------------------------------------------
10613 DMX_FILTER_STATUS _MApi_DMX_MMFI_Pid_Close(MS_U8 u8DmxId)
10614 {
10615 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10616
10617 #ifndef MMFILEIN
10618 return DMX_FILTER_STATUS_ERROR;
10619 #else
10620
10621 if(MDrv_MMFI_PidFlt_Free(u8DmxId) == DRVMMFI_FAIL)
10622 {
10623 return (DMX_FILTER_STATUS_ERROR);
10624 }
10625
10626 return (DMX_FILTER_STATUS_OK);
10627 #endif
10628 }
10629
10630 //-------------------------------------------------------------------------------------------------
10631 /// Get MMFilein Command queue fifo level
10632 /// @param ePath \b IN: MM File-in Path
10633 /// @param pu8CmdQStatus \b OUT: fifo level, 0~3
10634 /// @return DMX_FILTER_STATUS
10635 /// @note
10636 //-------------------------------------------------------------------------------------------------
10637 DMX_FILTER_STATUS _MApi_DMX_MMFI_Filein_CMDQ_FIFOWriteLevel(DMX_MMFI_PATH ePath, MS_U8 *pu8CmdQStatus)
10638 {
10639 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10640
10641 #ifndef MMFILEIN
10642 return DMX_FILTER_STATUS_ERROR;
10643 #else
10644 MDrv_MMFI_File_CmdQFifo_Status((DrvMMFI_Path)ePath, pu8CmdQStatus);
10645 return DMX_FILTER_STATUS_OK;
10646 #endif
10647 }
10648
10649 //-------------------------------------------------------------------------------------------------
10650 /// Abort to get bit stream by memeory
10651 /// @param ePath \b IN: MM File-in Path
10652 /// @return DMX_FILTER_STATUS_OK - Success
10653 /// @return DMX_FILTER_STATUS_ERROR - Failure
10654 /// @note
10655 //-------------------------------------------------------------------------------------------------
10656 DMX_FILTER_STATUS _MApi_DMX_MMFI_Abort(DMX_MMFI_PATH ePath)
10657 {
10658 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10659
10660 #ifndef MMFILEIN
10661 return DMX_FILTER_STATUS_ERROR;
10662 #else
10663 if (DRVMMFI_OK!= MDrv_MMFI_File_Abort((DrvMMFI_Path)ePath))
10664 {
10665 return DMX_FILTER_STATUS_ERROR;
10666 }
10667 return DMX_FILTER_STATUS_OK;
10668 #endif
10669 }
10670
10671 //-------------------------------------------------------------------------------------------------
10672 /// Set MMFI playback timestamp
10673 /// @param ePath \b IN: MM File-in Path
10674 /// @param u32pcr2 \b IN: LPCR2 value
10675 /// @return DMX_FILTER_STATUS_OK - Success
10676 /// @return DMX_FILTER_STATUS_ERROR - Failure
10677 /// @note
10678 //-------------------------------------------------------------------------------------------------
10679 DMX_FILTER_STATUS _MApi_DMX_MMFI_SetPlaybackTimeStamp(DMX_MMFI_PATH ePath, MS_U32 u32pcr2)
10680 {
10681 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10682
10683 #ifndef MMFILEIN
10684 return DMX_FILTER_STATUS_ERROR;
10685 #else
10686 _DMX_MMFI_ENTRY();
10687 MDrv_MMFI_SetPlaybackTimeStamp((DrvMMFI_Path)ePath, u32pcr2);
10688 _DMX_MMFI_RETURN(DMX_FILTER_STATUS_OK);
10689 #endif
10690 }
10691
10692 //-------------------------------------------------------------------------------------------------
10693 /// Get MMFI Playback timestamp
10694 /// @param ePath \b IN: MM File-in Path
10695 /// @param pu32pcr2 \b OUT: pointer to store LCPR2 value
10696 /// @return DMX_FILTER_STATUS_OK - Success
10697 /// @return DMX_FILTER_STATUS_ERROR - Failure
10698 /// @note
10699 //-------------------------------------------------------------------------------------------------
10700 DMX_FILTER_STATUS _MApi_DMX_MMFI_GetPlaybackTimeStamp(DMX_MMFI_PATH ePath, MS_U32 *pu32pcr2)
10701 {
10702 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10703
10704 #ifndef MMFILEIN
10705 return DMX_FILTER_STATUS_ERROR;
10706 #else
10707 MDrv_MMFI_GetPlaybackTimeStamp((DrvMMFI_Path)ePath, pu32pcr2);
10708 return DMX_FILTER_STATUS_OK;
10709 #endif
10710 }
10711
10712 //-------------------------------------------------------------------------------------------------
10713 /// Enable remove duplicate A/V packets
10714 /// @param bEnable \b IN: Enable or Disable
10715 /// @return DMX_FILTER_STATUS
10716 //-------------------------------------------------------------------------------------------------
10717 DMX_FILTER_STATUS _MApi_DMX_MMFI_RemoveDupAVPkt(MS_BOOL bEnable)
10718 {
10719 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10720
10721 #ifdef MMFILEIN
10722 if(MDrv_MMFI_RemoveDupAVPkt(bEnable) == DRVMMFI_OK)
10723 {
10724 return DMX_FILTER_STATUS_OK;
10725 }
10726 #endif
10727 return DMX_FILTER_STATUS_ERROR;
10728 }
10729
10730 //-------------------------------------------------------------------------------------------------
10731 /// Enable MMFI timestamp mode
10732 /// @param ePath \b IN: MM File-in Path
10733 /// @return DMX_FILTER_STATUS
10734 //-------------------------------------------------------------------------------------------------
10735 DMX_FILTER_STATUS _MApi_DMX_MMFI_TimeStampEnable(DMX_MMFI_PATH ePath)
10736 {
10737 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10738
10739 #ifndef MMFILEIN
10740 return DMX_FILTER_STATUS_ERROR;
10741 #else
10742 if(MDrv_MMFI_File_192Mode_En((DrvMMFI_Path)ePath, TRUE) == TRUE)
10743 {
10744 #ifdef DMX_RESET_FI_TIMESTAMP
10745 _pdmx_res->_bPlayTimestampEnable[ePath+1UL] = TRUE;
10746 #endif
10747
10748 return DMX_FILTER_STATUS_OK;
10749 }
10750 return DMX_FILTER_STATUS_ERROR;
10751 #endif
10752 }
10753
10754 //-------------------------------------------------------------------------------------------------
10755 /// Disable MMFI timestamp mode
10756 /// @param ePath \b IN: MM File-in Path
10757 /// @return DMX_FILTER_STATUS
10758 //-------------------------------------------------------------------------------------------------
10759 DMX_FILTER_STATUS _MApi_DMX_MMFI_TimeStampDisable(DMX_MMFI_PATH ePath)
10760 {
10761 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10762
10763 #ifndef MMFILEIN
10764 return DMX_FILTER_STATUS_ERROR;
10765 #else
10766 if(MDrv_MMFI_File_192Mode_En((DrvMMFI_Path)ePath, FALSE) == TRUE)
10767 {
10768 #ifdef DMX_RESET_FI_TIMESTAMP
10769 _pdmx_res->_bPlayTimestampEnable[ePath+1] = FALSE;
10770 #endif
10771
10772 return DMX_FILTER_STATUS_OK;
10773 }
10774 return DMX_FILTER_STATUS_ERROR;
10775 #endif
10776 }
10777
10778 DMX_FILTER_STATUS _MApi_DMX_MMFI_MOBF_Enable(DMX_MMFI_PATH ePath, MS_BOOL bEnable, MS_U32 u32key)
10779 {
10780 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10781
10782 #ifdef MM_MOBF
10783 MDrv_MMFI_Set_MOBF_FileinKey((DrvMMFI_Path)ePath, u32key);
10784 MDrv_MMFI_MOBF_FileIn_Enable((DrvMMFI_Path)ePath, bEnable);
10785 return DMX_FILTER_STATUS_OK;
10786 #else
10787 return DMX_FILTER_STATUS_ERROR;
10788 #endif
10789 }
10790
10791 #if !(defined(MMFI_VERSION) && (MMFI_VERSION >= MMFI_VER_2_0))
10792 DMX_FILTER_STATUS MApi_DMX_MMFI_MOBF_SetLevel(DMX_MMFI_PATH epath, MS_U8 u8level)
10793 {
10794 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10795
10796 #ifdef MM_MOBF
10797 MDrv_MMFI_MOBF_FileIn_SetLevel((DrvMMFI_Path)epath, u8level);
10798 return DMX_FILTER_STATUS_OK;
10799 #else
10800 return DMX_FILTER_STATUS_ERROR;
10801 #endif
10802 }
10803 #endif //MMFI_VER_2_0
10804
10805 DMX_FILTER_STATUS _MApi_DMX_MMFI_TimeStampClk(DMX_MMFI_PATH ePath, DMX_TimeStamp_Clk eClk)
10806 {
10807 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10808
10809 #ifdef MMFILEIN
10810 if(DRVMMFI_OK == MDrv_MMFI_File_SetTimeStampClk((DrvMMFI_Path)ePath, (MS_U32)eClk))
10811 {
10812 return DMX_FILTER_STATUS_OK;
10813 }
10814 else
10815 {
10816 return DMX_FILTER_STATUS_ERROR;
10817 }
10818
10819 #else
10820 return DMX_FILTER_STATUS_ERROR;
10821 #endif
10822 }
10823
10824 //-------------------------------------------------------------------------------------------------
10825 /// Enable MOBF encrypt
10826 /// @param bEnable \b IN: PVR MOBF Enable/Disable
10827 /// @param u32key0 \b IN: MOBF encrypt key0
10828 /// @param u32key1 \b IN: MOBF encrypt key1
10829 /// @return DMX_FILTER_STATUS_OK - Success
10830 /// @return DMX_FILTER_STATUS_ERROR - Failure
10831 /// @note
10832 //-------------------------------------------------------------------------------------------------
10833 DMX_FILTER_STATUS _MApi_DMX_Pvr_MOBF_Enable(MS_BOOL bEnable, MS_U32 u32key0, MS_U32 u32key1)
10834 {
10835 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10836
10837 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0))
10838 if(bEnable == TRUE)
10839 {
10840 MDrv_TSP_Set_MOBF_Set(1, u32key0, u32key1);
10841 }
10842 else
10843 {
10844 MDrv_TSP_Set_MOBF_Set(1, 0, 0);
10845 }
10846 return DMX_FILTER_STATUS_OK;
10847 #elif(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
10848 if(!bEnable)
10849 {
10850 MDrv_TSP_MOBF_PVR_Enable(FALSE);
10851 return DMX_FILTER_STATUS_OK;
10852 }
10853
10854 MDrv_TSP_Set_MOBF_PVRKey(u32key0, u32key1);
10855 MDrv_TSP_MOBF_PVR_Enable(TRUE);
10856 return DMX_FILTER_STATUS_OK;
10857 #else
10858 return DMX_FILTER_STATUS_ERROR;
10859 #endif
10860
10861
10862 }
10863
10864 //-------------------------------------------------------------------------------------------------
10865 /// Enable MOBF encrypt
10866 /// @param u8Eng \b IN: MOBF Engine ID
10867 /// @param bEnable \b IN: PVR MOBF Enable/Disable
10868 /// @param u32key0 \b IN: MOBF encrypt key0
10869 /// @param u32key1 \b IN: MOBF encrypt key1
10870 /// @return DMX_FILTER_STATUS_OK - Success
10871 /// @return DMX_FILTER_STATUS_ERROR - Failure
10872 /// @note
10873 //-------------------------------------------------------------------------------------------------
10874 DMX_FILTER_STATUS _MApi_DMX_Pvr_Eng_MOBF_Enable(MS_U8 u8Eng, MS_BOOL bEnable, MS_U32 u32key0, MS_U32 u32key1)
10875 {
10876 #if defined(MOBF_ENABLE)
10877
10878 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10879
10880 #if(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0))
10881 if(bEnable == TRUE)
10882 {
10883 MDrv_TSP_Set_MOBF_Set(u8Eng+1, u32key0, u32key1);
10884 }
10885 else
10886 {
10887 MDrv_TSP_Set_MOBF_Set(u8Eng+1, 0, 0);
10888 }
10889 return DMX_FILTER_STATUS_OK;
10890
10891 #elif(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
10892
10893 MS_U32 u32MobfKey0 = u32key0, u32MobfKey1 = u32key1;
10894
10895 if(bEnable == FALSE)
10896 {
10897 u32MobfKey0 = 0;
10898 u32MobfKey1 = 0;
10899 }
10900
10901 if(u8Eng == 0)
10902 {
10903 MDrv_TSP_Set_MOBF_PVRKey(u32MobfKey0, u32MobfKey1);
10904 }
10905 else
10906 {
10907 MDrv_TSP_Set_MOBF_PVR1Key(u32MobfKey0, u32MobfKey1);
10908 }
10909
10910 return DMX_FILTER_STATUS_OK;
10911
10912 #else // For TSP_VER_4_0
10913
10914 MDrv_TSP_PVR_Eng_MOBF_Enable(u8Eng, bEnable, u32key0);
10915 return DMX_FILTER_STATUS_OK;
10916
10917 #endif // End of TSP_VER_4_0
10918
10919 #else
10920
10921 return DMX_FILTER_STATUS_ERROR;
10922
10923 #endif
10924 }
10925
10926 //-------------------------------------------------------------------------------------------------
10927 /// Enable MOBF decrypt key
10928 /// @param bEnable \b IN: File-in MOBF Enable/Disable
10929 /// @param u32key \b IN: MOBF dyncrypt u32key
10930 /// @return DMX_FILTER_STATUS_OK - Success
10931 /// @return DMX_FILTER_STATUS_ERROR - Failure
10932 /// @note
10933 //-------------------------------------------------------------------------------------------------
10934 DMX_FILTER_STATUS _MApi_DMX_Filein_MOBF_Enable(MS_BOOL bEnable, MS_U32 u32key)
10935 {
10936 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10937
10938 #if(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_3_0))
10939 if(bEnable == TRUE)
10940 {
10941 MDrv_TSP_Set_MOBF_Set(0, u32key, 0);
10942 }
10943 else
10944 {
10945 MDrv_TSP_Set_MOBF_Set(0, 0, 0);
10946 }
10947 return DMX_FILTER_STATUS_OK;
10948
10949 #elif(defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0))
10950 if(!bEnable)
10951 {
10952 MDrv_TSP_MOBF_FileIn_Enable(FALSE);
10953 return DMX_FILTER_STATUS_OK;
10954 }
10955
10956 MDrv_TSP_Set_MOBF_FileinKey(u32key);
10957 MDrv_TSP_MOBF_FileIn_Enable(TRUE);
10958 return DMX_FILTER_STATUS_OK;
10959
10960 #else
10961 return DMX_FILTER_STATUS_ERROR;
10962 #endif
10963 }
10964
10965 /********************************************************************/
10966 /// Enable or Disable VQ
10967 ///@param bEnable \b IN: Enable/Disable
10968 ///@return DMX_FILTER_STATUS
10969 /********************************************************************/
10970 DMX_FILTER_STATUS _MApi_DMX_VQ_Enable(MS_BOOL bEnable)
10971 {
10972 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
10973
10974 #if (defined(VQ_ENABLE) && (defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0))))
10975 _DMX_ENTRY();
10976 MDrv_TSP_VQueEnable(bEnable);
10977
10978 #if (defined(TS2_IF_SUPPORT) && (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_1_0)))
10979 _pdmx_res->_bVQEnabled = bEnable;
10980 #endif
10981
10982 _DMX_RETURN(DMX_FILTER_STATUS_OK);
10983 #else
10984 return DMX_FILTER_STATUS_ERROR;
10985 #endif //VQ_ENABLE
10986 }
10987
10988 /********************************************************************/
10989 ///MApi_DMX_FilterFlowSwitch : Switch filter source from one channel to another.
10990 ///@param SrcFlow, TgtFlow
10991 /// TSP1.0:
10992 /// DMX_FILTER_SOURCE_TYPE_LIVE
10993 /// DMX_FILTER_SOURCE_TYPE_TS1
10994 /// TSP2.0:
10995 /// DMX_FILTER_SOURCE_TYPE_PLAYBACK
10996 /// DMX_FILTER_SOURCE_TYPE_PVR0
10997 /// DMX_FILTER_SOURCE_TYPE_PVR1
10998 /// TSP3.0:
10999 /// DMX_FILTER_SOURCE_TYPE_LIVE
11000 /// DMX_FILTER_SOURCE_TYPE_FILE
11001 /// DMX_FILTER_SOURCE_TYPE_TS1
11002 /// DMX_FILTER_SOURCE_TYPE_TS2
11003 /// DMX_FILTER_SOURCE_TYPE_TS3
11004 ///@return DMX_FILTER_STATUS
11005 /********************************************************************/
11006 DMX_FILTER_STATUS _MApi_DMX_LiveSrcSwitch(DMX_FILTER_TYPE TgtFlow)
11007 {
11008 _DMX_ENTRY();
11009
11010 MDrv_TSP_FLT_LiveSrcSwitch(TgtFlow&DMX_FILTER_SOURCE_TYPE_MASK);
11011
11012 _DMX_RETURN(DMX_FILTER_STATUS_OK);
11013 }
11014
11015 /********************************************************************/
11016 /// Enable or Disable Audio AB S
11017 ///@param bEnable \b IN: Enable/Disable
11018 ///@return DMX_FILTER_STATUS
11019 /********************************************************************/
11020 DMX_FILTER_STATUS _MApi_DMX_AU_BD_Mode_Enable(MS_BOOL bEnable)
11021 {
11022 _DMX_ENTRY();
11023
11024 if(MDrv_TSP_AU_BD_Mode_Enable(bEnable) == DRVTSP_OK)
11025 {
11026 _DMX_RETURN(DMX_FILTER_STATUS_OK);
11027 }
11028 else
11029 {
11030 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
11031 }
11032 }
11033
11034 //-------------------------------------------------------------------------------------------------
11035 /// Set up parameters for input bit stream from memory of TSO path
11036 /// @param u8Eng \b IN: TSO engine ID
11037 /// @param pFileinInfo \b IN: the file in parameters
11038 /// @return DMX_FILTER_STATUS_OK - Success
11039 /// @return DMX_FILTER_STATUS_ERROR - Failure
11040 /// @note
11041 //-------------------------------------------------------------------------------------------------
11042 DMX_FILTER_STATUS _MApi_DMX_TSO_Filein_Info(MS_U8 u8Eng, DMX_Filein_info *pFileinInfo)
11043 {
11044 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11045
11046 #ifdef TSO_ENABLE
11047 _DMX_TSO_ENTRY();
11048 MDrv_TSO_SetPacketMode(u8Eng, (DrvTSO_PacketMode)(pFileinInfo->PKT_Mode));
11049 MDrv_TSO_Filein_Rate(u8Eng, (MS_U16)(pFileinInfo->Rate & 0xFFFF));
11050 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11051 #else
11052 return DMX_FILTER_STATUS_ERROR;
11053 #endif
11054 }
11055
11056 //-------------------------------------------------------------------------------------------------
11057 /// Check if no memory transfer is under going of TSO path
11058 /// @param u8Eng \b IN: TSO engine ID
11059 /// @return TRUE if idle, FALSE otherwise
11060 /// @note
11061 //-------------------------------------------------------------------------------------------------
11062 MS_BOOL _MApi_DMX_TSO_Filein_IsIdle(MS_U8 u8Eng)
11063 {
11064 #ifdef TSO_ENABLE
11065 DMX_TSOMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11066
11067 DrvTSO_FileinState TsoFileinState;
11068
11069 if (DRVTSO_OK!= MDrv_TSO_Filein_GetState(u8Eng, &TsoFileinState))
11070 {
11071 DMX_ASSERT(0, DMX_DBGMSG(DMX_DBG_ERR, ULOGD("DMX", "[MAPI DMX][%06d] Call MDrv_TSO_Filein_GetState fail\n", __LINE__)));
11072 }
11073
11074 return (E_DRVTSO_STATE_IDLE == TsoFileinState);
11075 #else
11076
11077 return FALSE;
11078
11079 #endif
11080 }
11081
11082 //-------------------------------------------------------------------------------------------------
11083 /// Get TSO file-in CMDQ empty number
11084 /// @param u8Eng \b IN: TSO engine ID
11085 /// @return DMX_FILTER_STATUS_OK - Success
11086 /// @return DMX_FILTER_STATUS_ERROR - Failure
11087 /// @note
11088 //-------------------------------------------------------------------------------------------------
11089 DMX_FILTER_STATUS _MApi_DMX_TSO_Filein_CMDQ_GetEmptyNum(MS_U8 u8Eng, MS_U32 *pu32EmptySlot)
11090 {
11091 DMX_TSOMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11092
11093 #ifdef TSO_ENABLE
11094 MDrv_TSO_Filein_CmdQ_GetSlot(u8Eng, pu32EmptySlot);
11095 #endif
11096
11097 return DMX_FILTER_STATUS_OK;
11098 }
11099
11100 //-------------------------------------------------------------------------------------------------
11101 /// Get TSO file-in CMDQ reset
11102 /// @param u8Eng \b IN: TSO engine ID
11103 /// @return DMX_FILTER_STATUS_OK - Success
11104 /// @return DMX_FILTER_STATUS_ERROR - Failure
11105 /// @note
11106 //-------------------------------------------------------------------------------------------------
11107 DMX_FILTER_STATUS _MApi_DMX_TSO_Filein_CMDQ_Reset(MS_U8 u8Eng)
11108 {
11109 DMX_TSOMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11110
11111 #ifdef TSO_ENABLE
11112 _DMX_TSO_ENTRY();
11113 MDrv_TSO_Filein_CmdQ_Reset(u8Eng);
11114 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11115 #endif
11116
11117 return DMX_FILTER_STATUS_OK;
11118 }
11119
11120
11121 //-------------------------------------------------------------------------------------------------
11122 /// Start to get bit stream by memeory of TSO path
11123 /// @param u8Eng \b IN: TSO engine ID
11124 /// @param pBuf \b IN: the memory containing the bit stream
11125 /// @param u32BufSize \b IN: the size the memory to get
11126 /// @return DMX_FILTER_STATUS_OK - Success
11127 /// @return DMX_FILTER_STATUS_ERROR - Failure
11128 /// @note
11129 //-------------------------------------------------------------------------------------------------
11130 DMX_FILTER_STATUS _MApi_DMX_TSO_Filein_Start(MS_U8 u8Eng, MS_PHY pBuf, MS_U32 u32BufSize)
11131 {
11132 DMX_TSOMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11133
11134 #ifdef TSO_ENABLE
11135 _DMX_TSO_ENTRY();
11136 if (DRVTSO_OK != MDrv_TSO_Filein_SetAddr(u8Eng, pBuf))
11137 {
11138 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11139 }
11140 if (DRVTSO_OK != MDrv_TSO_Filein_SetSize(u8Eng, u32BufSize))
11141 {
11142 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11143 }
11144 if (DRVTSO_OK!= MDrv_TSO_Filein_Start(u8Eng))
11145 {
11146 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11147 }
11148 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11149
11150 #else
11151
11152 return DMX_FILTER_STATUS_ERROR;
11153
11154 #endif
11155 }
11156
11157 //-------------------------------------------------------------------------------------------------
11158 /// Stop to get bit stream by memeory of TSO path
11159 /// @param u8Eng \b IN: TSO engine ID
11160 /// @return DMX_FILTER_STATUS_OK - Success
11161 /// @return DMX_FILTER_STATUS_ERROR - Failure
11162 /// @note
11163 //-------------------------------------------------------------------------------------------------
11164 DMX_FILTER_STATUS _MApi_DMX_TSO_Filein_Stop(MS_U8 u8Eng)
11165 {
11166 DMX_TSOMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11167
11168 #ifdef TSO_ENABLE
11169 _DMX_TSO_ENTRY();
11170 if (DRVTSO_OK != MDrv_TSO_Filein_Stop(u8Eng))
11171 {
11172 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11173 }
11174
11175 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11176 #else
11177
11178 return DMX_FILTER_STATUS_ERROR;
11179
11180 #endif
11181 }
11182
11183 //-------------------------------------------------------------------------------------------------
11184 /// Set TSO playback time stamp
11185 /// @param u8Eng \b IN: TSO engine ID
11186 /// @param u32Stamp \b OUT: pointer to store timestamp value
11187 /// @return DMX_FILTER_STATUS_OK - Success
11188 /// @return DMX_FILTER_STATUS_ERROR - Failure
11189 /// @note
11190 //-------------------------------------------------------------------------------------------------
11191 DMX_FILTER_STATUS _MApi_DMX_TSO_SetPlaybackTimeStamp(MS_U8 u8Eng, MS_U32 u32Stamp)
11192 {
11193 DMX_TSOMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d (%u)\n", __FUNCTION__, __LINE__, (unsigned int)u32Stamp));
11194
11195 #ifdef TSO_ENABLE
11196 _DMX_TSO_ENTRY();
11197 if(DRVTSO_OK != MDrv_TSO_SetPlaybackTimeStamp(u8Eng, u32Stamp))
11198 {
11199 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11200 }
11201
11202 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11203
11204 #else
11205 return DMX_FILTER_STATUS_ERROR;
11206 #endif
11207 }
11208
11209 //-------------------------------------------------------------------------------------------------
11210 /// Get TSO playback time stamp
11211 /// @param u8Eng \b IN: TSO engine ID
11212 /// @param pu32Stamp \b OUT: pointer to store timestamp value
11213 /// @return DMX_FILTER_STATUS_OK - Success
11214 /// @return DMX_FILTER_STATUS_ERROR - Failure
11215 /// @note
11216 //-------------------------------------------------------------------------------------------------
11217 DMX_FILTER_STATUS _MApi_DMX_TSO_GetPlaybackStamp(MS_U8 u8Eng, MS_U32* pu32Stamp)
11218 {
11219 DMX_TSOMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d (0x%lx)\n", __FUNCTION__, __LINE__, (unsigned long)pu32Stamp));
11220
11221 #ifdef TSO_ENABLE
11222 return ((DRVTSO_OK== MDrv_TSO_GetPlaybackTimeStamp(u8Eng, pu32Stamp))? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR);
11223 #else
11224 return DMX_FILTER_STATUS_ERROR;
11225 #endif
11226 }
11227
11228 //-------------------------------------------------------------------------------------------------
11229 /// Get TSO file-in time stamp
11230 /// @param u8Eng \b IN: TSO engine ID
11231 /// @param pu32Stamp \b OUT: pointer to store timestamp value
11232 /// @return DMX_FILTER_STATUS_OK - Success
11233 /// @return DMX_FILTER_STATUS_ERROR - Failure
11234 /// @note
11235 //-------------------------------------------------------------------------------------------------
11236 DMX_FILTER_STATUS _MApi_DMX_TSO_GetFileInTimeStamp(MS_U8 u8Eng, MS_U32 *pu32Stamp)
11237 {
11238 DMX_TSOMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11239
11240 #ifdef TSO_ENABLE
11241 MDrv_TSO_GetFileInTimeStamp(u8Eng, pu32Stamp);
11242 //ULOGD("DMX", "MApi_DMX_TSO_GetFileInTimeStamp %x\n", (int)(*pu32Stamp));
11243 #endif
11244 return DMX_FILTER_STATUS_OK;
11245 }
11246
11247 //-------------------------------------------------------------------------------------------------
11248 /// Get TSO file-in read address
11249 /// @param u8Eng \b IN: TSO engine ID
11250 /// @param pu32Read \b OUT: pointer to store read address
11251 /// @return DMX_FILTER_STATUS_OK - Success
11252 /// @return DMX_FILTER_STATUS_ERROR - Failure
11253 /// @note
11254 //-------------------------------------------------------------------------------------------------
11255 DMX_FILTER_STATUS _MApi_DMX_TSO_Filein_GetReadAddr(MS_U8 u8Eng, MS_PHY* pphyRead)
11256 {
11257 DMX_TSOMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11258
11259 #ifdef TSO_ENABLE
11260 _DMX_TSO_ENTRY();
11261 if(MDrv_TSO_Filein_GetReadAddr(u8Eng, pphyRead) != DRVTSO_OK)
11262 {
11263 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11264 }
11265 else
11266 {
11267 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11268 }
11269 #else
11270 return DMX_FILTER_STATUS_OK;
11271 #endif
11272
11273 }
11274
11275 //-------------------------------------------------------------------------------------------------
11276 /// Disable 192 mode block scheme to bypass fill-in timestamp
11277 /// @param bbypass \b IN: If true, bypass file-in timestamp.
11278 /// @return DMX_FILTER_STATUS_OK - Success
11279 /// @return DMX_FILTER_STATUS_ERROR - Failure
11280 /// @note
11281 //-------------------------------------------------------------------------------------------------
11282 DMX_FILTER_STATUS _MApi_DMX_TSO_BypassFileInTimeStamp(MS_U8 u8Eng, MS_BOOL bbypass)
11283 {
11284 DMX_TSOMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11285
11286 #ifdef TSO_ENABLE
11287 _DMX_TSO_ENTRY();
11288 if(DRVTSO_OK == MDrv_TSO_Filein_192BlockScheme_En(u8Eng, !bbypass))
11289 {
11290 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11291 }
11292 else
11293 {
11294 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11295 }
11296
11297 #endif
11298
11299 return DMX_FILTER_STATUS_OK;
11300 }
11301
11302 //-------------------------------------------------------------------------------------------------
11303 /// Enable TSO file in time stamp
11304 /// @return DMX_FILTER_STATUS_OK - Success
11305 /// @return DMX_FILTER_STATUS_ERROR - Failure
11306 /// @note
11307 //-------------------------------------------------------------------------------------------------
11308 DMX_FILTER_STATUS _MApi_DMX_TSO_TimeStampEnable(MS_U8 u8Eng)
11309 {
11310 DMX_TSOMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11311
11312 #ifdef TSO_ENABLE
11313 _DMX_TSO_ENTRY()
11314 if(DRVTSO_OK== MDrv_TSO_Filein_192Mode_En(u8Eng, TRUE))
11315 {
11316 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11317 }
11318 else
11319 {
11320 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11321 }
11322
11323 #else
11324 return DMX_FILTER_STATUS_ERROR;
11325 #endif
11326 }
11327
11328 //-------------------------------------------------------------------------------------------------
11329 /// Disable TSO file in time stamp
11330 /// @return DMX_FILTER_STATUS_OK - Success
11331 /// @return DMX_FILTER_STATUS_ERROR - Failure
11332 /// @note
11333 //-------------------------------------------------------------------------------------------------
11334 DMX_FILTER_STATUS _MApi_DMX_TSO_TimeStampDisable(MS_U8 u8Eng)
11335 {
11336 DMX_TSOMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11337
11338 #ifdef TSO_ENABLE
11339 _DMX_TSO_ENTRY();
11340 if(DRVTSO_OK== MDrv_TSO_Filein_192Mode_En(u8Eng, FALSE))
11341 {
11342 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11343 }
11344 else
11345 {
11346 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11347 }
11348 #else
11349
11350 return DMX_FILTER_STATUS_ERROR;
11351 #endif
11352 }
11353
11354 //-------------------------------------------------------------------------------------------------
11355 /// Set TSO Out Clock
11356 /// @param u8Eng \b IN: TSO engine ID
11357 /// @param eTsOutClk \b IN: TSO out clock select
11358 /// @param eTsOutClkSrc \b IN: TSO out clock source select
11359 /// @param u16DivNum \b IN: If select DMPLLDIV source, setting Divide number
11360 /// @param bClkInv \b IN: If Out Clock invert
11361 /// @return TSO_Result
11362 /// @note
11363 /// If eTsOutClk is E_DMX_TSO_OUTCLK_DIV2N, eTsOutClkSrc could be E_DMX_TSO_OUTCLKSRC_172M_2N/E_DMX_TSO_OUTCLKSRC_288M_2N/E_DMX_TSO_OUTCLKSRC_432M_2N,
11364 /// and user should set u16DivNum to generate final output clock.
11365 /// If eTsOutClk is E_DMX_TSO_OUTCLK_DIVN, eTsOutClkSrc could be E_DMX_TSO_OUTCLKSRC_216M_N, and user should set u16DivNum to generate final output clock.
11366 /// If eTsOutClk is E_DMX_TSO_OUTCLK_PTSOOUT/E_DMX_TSO_OUTCLK_PTSOOUT_DIV8, eTsOutClkSrc could be E_DMX_TSO_OUTCLKSRC_P_TS0IN/E_DMX_TSO_OUTCLKSRC_P_TS1IN, etc,
11367 /// and this colck is from external pad
11368 /// E_DMX_TSO_OUTCLK_62M/E_DMX_TSO_OUTCLK_54M/E_DMX_TSO_OUTCLK_27M/E_DMX_TSO_OUTCLK_Dmd are constant values of output clock.
11369 //-------------------------------------------------------------------------------------------------
11370 DMX_FILTER_STATUS _MApi_DMX_TSO_SetOutClk(MS_U8 u8Eng, DMX_TSO_OutClk eTsOutClk, DMX_TSO_OutClkSrc eTsOutClkSrc, MS_U16 u16DivNum, MS_BOOL bClkInv)
11371 {
11372 DMX_TSOMSG(DMX_DBG_FUNC, ULOGE("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11373
11374 #ifdef TSO_ENABLE
11375 _DMX_TSO_ENTRY();
11376 if(DRVTSO_OK== MDrv_TSO_SetOutClk(u8Eng, (DrvTSO_OutClk)eTsOutClk, (DrvTSO_OutClkSrc)eTsOutClkSrc, u16DivNum, bClkInv))
11377 {
11378 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11379 }
11380 else
11381 {
11382 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11383 }
11384 #else
11385 return DMX_FILTER_STATUS_ERROR;
11386 #endif
11387
11388 }
11389
11390 //-------------------------------------------------------------------------------------------------
11391 /// Enable or disable TSO output
11392 /// @param u8Eng \b IN: TSO engine ID
11393 /// @param bEnable \b IN: TRUE is enable, FALSE is disable
11394 /// @return TSO_Result
11395 /// @note
11396 //-------------------------------------------------------------------------------------------------
11397 DMX_FILTER_STATUS _MApi_DMX_TSO_OutputEnable(MS_U8 u8Eng, MS_BOOL bEnable)
11398 {
11399 #ifdef TSO_ENABLE
11400 _DMX_TSO_ENTRY();
11401
11402 if(MDrv_TSO_OutputEnable(u8Eng, bEnable) != DRVTSO_OK)
11403 {
11404 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11405 }
11406 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11407 #else
11408 return DMX_FILTER_STATUS_ERROR;
11409 #endif
11410
11411 }
11412
11413 //TSO2
11414 //-------------------------------------------------------------------------------------------------
11415 /// Set or get local stream ID of TSO Out
11416 /// @param u8Eng \b IN: TSO engine ID
11417 /// @param eIf \b IN: TSO input TSIF
11418 /// @param pu8StrId \b IN or OUT: pointer to store local stream ID, default value is 0x47
11419 /// @param bSet \b IN: If TRUE, set local stream id, otherwise get local stream id
11420 /// @return TSO_Result
11421 /// @note
11422 //-------------------------------------------------------------------------------------------------
11423 DMX_FILTER_STATUS _MApi_DMX_TSO_LocalStreamId(MS_U8 u8Eng, DMX_TSIF eIf, MS_U8* pu8StrId, MS_BOOL bSet)
11424 {
11425 DMX_TSOMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11426
11427 #ifdef TSO_20_ENABLE
11428 DrvTSO_If eTsoIf = E_DRVTSO_IF_LIVE0;
11429
11430 switch(eIf)
11431 {
11432 case DMX_TSIF_LIVE0:
11433 eTsoIf = E_DRVTSO_IF_LIVE0;
11434 break;
11435 case DMX_TSIF_LIVE1:
11436 eTsoIf = E_DRVTSO_IF_LIVE1;
11437 break;
11438 case DMX_TSIF_LIVE2:
11439 eTsoIf = E_DRVTSO_IF_LIVE2;
11440 break;
11441 case DMX_TSIF_FILE0:
11442 eTsoIf = E_DRVTSO_IF_FILE0;
11443 break;
11444 case DMX_TSIF_FILE1:
11445 eTsoIf = E_DRVTSO_IF_FILE1;
11446 break;
11447 default:
11448 return DMX_FILTER_STATUS_ERROR;
11449 }
11450
11451 _DMX_TSO_ENTRY();
11452 if(DRVTSO_OK== MDrv_TSO_LocalStreamId(u8Eng, eTsoIf, pu8StrId, bSet))
11453 {
11454 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11455 }
11456 else
11457 {
11458 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11459 }
11460 #else
11461 return DMX_FILTER_STATUS_ERROR;
11462 #endif
11463
11464 }
11465
11466 //-------------------------------------------------------------------------------------------------
11467 /// Set TSO virtual queue buffer
11468 /// @param u8Eng \b IN: TSO engine ID
11469 /// @param u32Addr \b IN: TSO VQ buffer address
11470 /// @param u32BufSize \b IN: TSO VQ buffer size
11471 /// @return TSO_Result
11472 /// @note
11473 //-------------------------------------------------------------------------------------------------
11474 DMX_FILTER_STATUS _MApi_DMX_TSO_SVQBuf_Set(MS_U8 u8Eng, MS_PHY phyAddr, MS_U32 u32BufSize)
11475 {
11476 DMX_TSOMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11477 #ifdef TSO_20_ENABLE
11478 _DMX_TSO_ENTRY();
11479 if(DRVTSO_OK == MDrv_TSO_Set_SVQBuf(0, phyAddr, u32BufSize))
11480 {
11481 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11482 }
11483 else
11484 {
11485 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11486 }
11487 #else
11488 return DMX_FILTER_STATUS_ERROR;
11489 #endif
11490 }
11491
11492 //-------------------------------------------------------------------------------------------------
11493 ///TSO (TS output) Demux Flow input sources configure getting and setting
11494 /// @param eFlow \b IN: DMX TSO playback flow, DMX_FLOW_TSO_PLAYBACK/DMX_FLOW_TSO_PLAYBACK1
11495 /// @param eTSOInIf \b IN: TSO input interface, DMX_TSIF_LIVE0/DMX_TSIF_LIVE1/DMX_TSIF_LIVE2/DMX_TSIF_FILE0/DMX_TSIF_FILE1
11496 ///
11497 /// @param stInputInfo.Input \b IN\OUT: TSO input interface source, enum item of DMX_FLOW_INPUT
11498 /// @param stInputInfo.bClkInv \b IN\OUT: If TSO input interface source is from demod, please set clock invert type
11499 /// @param stInputInfo.bExtSync \b IN\OUT: If TSO input interface source is from demod, please set external sync type
11500 /// @param stInputInfo.bParallel \b IN\OUT: If TSO input interface source is from demod, please set parallel or serial type
11501 ///
11502 /// @param u8LocalStrId \b IN\OUT: The local stream ID (TS output sync byte) value, default is 0x47
11503 /// @param bBypassAll \b IN\OUT: TRUE means bypass all ts data for TSO playback; FALSE means tso will output ts data by PIDs
11504 /// @param bEnable \b IN\OUT: TRUE means enable TSO input now; FALSE means disable this TSO input fource
11505 ///
11506 /// @return DMX_FILTER_STATUS_OK - Success
11507 /// @return DMX_FILTER_STATUS_ERROR - Failure
11508 ///
11509 /// @note This API is for TSO2 HW architecture
11510 /// @note Serval TSO input will be merge to be one TSO output. This API is for configuring one of TSO input
11511 /// @note If there are 3 TSO input source, you shold call this API 3 times for every TSO input path configure
11512 //-------------------------------------------------------------------------------------------------
11513 DMX_FILTER_STATUS _MApi_DMX_TSO_Flow_InputCfg(DMX_TSO_InputCfg* pstInputCfg)
11514 {
11515 DMX_TSOMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11516
11517 #ifdef TSO_20_ENABLE
11518
11519 if(pstInputCfg->bSet == TRUE)
11520 {
11521 _DMX_TSO_ENTRY();
11522
11523 if(_TSO_Flow_InputCfg(pstInputCfg) == TRUE)
11524 {
11525 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11526 }
11527 else
11528 {
11529 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11530 }
11531 }
11532 else
11533 {
11534 DrvTSO_If stIf;
11535 MS_U8 u8Eng = 0;
11536 DrvTSO_If_Set stIfSet;
11537
11538 if(pstInputCfg->eFlow == DMX_FLOW_TSO_PLAYBACK)
11539 {
11540 u8Eng = 0;
11541 }
11542 else if(pstInputCfg->eFlow == DMX_FLOW_TSO_PLAYBACK1)
11543 {
11544 u8Eng = 1;
11545 }
11546 else
11547 {
11548 return DMX_FILTER_STATUS_ERROR;
11549 }
11550
11551 switch(pstInputCfg->eTSOInIf)
11552 {
11553 case DMX_TSIF_LIVE0:
11554 stIf = E_DRVTSO_IF_LIVE0;
11555 break;
11556 case DMX_TSIF_LIVE1:
11557 stIf = E_DRVTSO_IF_LIVE1;
11558 break;
11559 case DMX_TSIF_LIVE2:
11560 stIf = E_DRVTSO_IF_LIVE2;
11561 break;
11562 case DMX_TSIF_LIVE3:
11563 stIf = E_DRVTSO_IF_LIVE3;
11564 break;
11565 case DMX_TSIF_FILE0:
11566 stIf = E_DRVTSO_IF_FILE0;
11567 break;
11568 case DMX_TSIF_FILE1:
11569 stIf = E_DRVTSO_IF_FILE1;
11570 break;
11571 default:
11572 return DMX_FILTER_STATUS_ERROR;
11573 }
11574
11575 if((pstInputCfg->eTSOInIf == DMX_TSIF_FILE0) && (pstInputCfg->eTSOInIf == DMX_TSIF_FILE1))
11576 {
11577 pstInputCfg->stInputInfo.Input = DMX_FLOW_INPUT_MEM;
11578 return DMX_FILTER_STATUS_OK;
11579 }
11580
11581 _DMX_TSO_ENTRY();
11582
11583 if(MDrv_TSO_LocalStreamId(u8Eng, stIf, &(pstInputCfg->u8LocalStrId), FALSE) == FALSE)
11584 {
11585 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11586 }
11587
11588 if(MDrv_TSO_GetTSIFStatus(u8Eng, stIf, &stIfSet, &pstInputCfg->bBypassAll, &pstInputCfg->bEnable) != DRVTSO_OK)
11589 {
11590 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11591 }
11592
11593 switch(stIfSet.ePad)
11594 {
11595 case E_DRVTSO_PAD_EXT_INPUT0:
11596 pstInputCfg->stInputInfo.Input = DMX_FLOW_INPUT_EXT_INPUT0;
11597 break;
11598 case E_DRVTSO_PAD_EXT_INPUT1:
11599 pstInputCfg->stInputInfo.Input = DMX_FLOW_INPUT_EXT_INPUT1;
11600 break;
11601 case E_DRVTSO_PAD_EXT_INPUT2:
11602 pstInputCfg->stInputInfo.Input = DMX_FLOW_INPUT_EXT_INPUT2;
11603 break;
11604 case E_DRVTSO_PAD_EXT_INPUT3:
11605 pstInputCfg->stInputInfo.Input = DMX_FLOW_INPUT_EXT_INPUT3;
11606 break;
11607 case E_DRVTSO_PAD_EXT_INPUT4:
11608 pstInputCfg->stInputInfo.Input = DMX_FLOW_INPUT_EXT_INPUT4;
11609 break;
11610 case E_DRVTSO_PAD_EXT_INPUT5:
11611 pstInputCfg->stInputInfo.Input = DMX_FLOW_INPUT_EXT_INPUT5;
11612 break;
11613 case E_DRVTSO_PAD_DEMOD:
11614 pstInputCfg->stInputInfo.Input = DMX_FLOW_INPUT_DEMOD;
11615 break;
11616 default:
11617 pstInputCfg->stInputInfo.Input = DMX_FLOW_INPUT_MEM;
11618 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11619 }
11620 pstInputCfg->stInputInfo.bClkInv = stIfSet.bClkInv;
11621 pstInputCfg->stInputInfo.bExtSync = stIfSet.bExtSync;
11622 pstInputCfg->stInputInfo.bParallel = stIfSet.bParallel;
11623
11624 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11625
11626 }
11627 #else
11628 return DMX_FILTER_STATUS_ERROR;
11629 #endif
11630
11631 }
11632
11633 //-------------------------------------------------------------------------------------------------
11634 ///TSO (TS output) Demux Flow output path configure
11635 /// @param eFlow \b IN: DMX TSO playback flow, DMX_FLOW_TSO_PLAYBACK/DMX_FLOW_TSO_PLAYBACK1
11636 /// @param eOutPad \b IN: TSO output pad select, DMX_FLOW_OUTPUT_EXT_PAD1/DMX_FLOW_OUTPUT_EXT_PAD3///
11637 /// @param u16OutPktSize \b IN/OUT: TSO output packet size. default vale is 188 bytes
11638 /// @param bEnable \b IN/OUT: TRUE means enable TSO output now; FALSE means disable TSO output
11639 ///
11640 /// @param bDefOutClk \b IN: TURE means using default clock setting given by driver; FALSE means set output clock by user parameters
11641 /// @param bOutClkInv \b IN/OUT: Set inver type of TSO output clock
11642 /// @param eTsoOutClk \b IN/OUT: Select TSO output clock, enum item of DMX_TSO_OutClk
11643 /// @param eTsoOutClkSrc \b IN/OUT: Select TSO output clock source, enum item of DMX_TSO_OutClkSrc
11644 /// @param u16DivNum \b IN/OUT: If TSO output clock source is E_DMX_TSO_OUTCLK_DIV2N/E_DMX_TSO_OUTCLK_DIVN, set this value for clock generatng.
11645 /// Other clock sources will not use this parameter
11646 ///
11647 /// @return DMX_FILTER_STATUS_OK - Success
11648 /// @return DMX_FILTER_STATUS_ERROR - Failure
11649 ///
11650 /// @note This API is for TSO2 HW architecture
11651 /// @note Serval TSO input will be merge to be one TSO output. This API is for configuring TSO output path
11652 /// @note TSO output clock source selection, please also refer to MApi_DMX_TSO_SetOutClk API
11653 //-------------------------------------------------------------------------------------------------
11654 DMX_FILTER_STATUS _MApi_DMX_TSO_Flow_OutputCfg(DMX_TSO_OutputCfg* pstOutputCfg)
11655 {
11656 DMX_TSOMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11657
11658 #ifdef TSO_20_ENABLE
11659
11660 if(pstOutputCfg->bSet == TRUE)
11661 {
11662 _DMX_TSO_ENTRY();
11663 if(_TSO_Flow_OutputCfg(pstOutputCfg) == TRUE)
11664 {
11665 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11666 }
11667 else
11668 {
11669 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11670 }
11671 }
11672 else
11673 {
11674 MS_U8 u8Eng = 0;
11675 DrvTSO_PadOut eOutPad = E_DRVTSO_PAD_NONE;
11676 DrvTSO_OutClk eOutClk = 0xFF;
11677 DrvTSO_OutClkSrc eOutClkSrc = 0xFF;
11678
11679 switch(pstOutputCfg->eFlow)
11680 {
11681 case DMX_FLOW_TSO_PLAYBACK:
11682 u8Eng = 0;
11683 break;
11684 case DMX_FLOW_TSO_PLAYBACK1:
11685 u8Eng = 1;
11686 break;
11687 default:
11688 return DMX_FILTER_STATUS_ERROR;
11689 }
11690
11691 _DMX_TSO_ENTRY();
11692 if(MDrv_TSO_OutputPktSize(u8Eng, &(pstOutputCfg->u16OutPktSize), FALSE) != DRVTSO_OK)
11693 {
11694 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11695 }
11696 if(MDrv_TSO_OutputPad(0, &eOutPad, FALSE) != DRVTSO_OK)
11697 {
11698 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11699 }
11700
11701 if(pstOutputCfg->bDefOutClk == TRUE)
11702 {
11703 pstOutputCfg->eTsoOutClk = E_DRVTSO_OUTCLK_DIV2N;
11704 pstOutputCfg->eTsoOutClkSrc = E_DRVTSO_OUTCLKSRC_172M_2N;
11705 pstOutputCfg->u16DivNum = 0x0F;
11706 pstOutputCfg->bOutClkInv = FALSE;
11707 }
11708 else
11709 {
11710 if(MDrv_TSO_GetOutClk(u8Eng, &eOutClk, &eOutClkSrc, &(pstOutputCfg->u16DivNum), &(pstOutputCfg->bOutClkInv)) != DRVTSO_OK)
11711 {
11712 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11713 }
11714 switch(eOutClk)
11715 {
11716 case E_DRVTSO_OUTCLK_DIV2N:
11717 pstOutputCfg->eTsoOutClk = E_DMX_TSO_OUTCLK_DIV2N;
11718 break;
11719 case E_DRVTSO_OUTCLK_DIVN:
11720 pstOutputCfg->eTsoOutClk = E_DMX_TSO_OUTCLK_DIVN;
11721 break;
11722 case E_DRVTSO_OUTCLK_62M:
11723 pstOutputCfg->eTsoOutClk = E_DMX_TSO_OUTCLK_62M;
11724 break;
11725 case E_DRVTSO_OUTCLK_54M:
11726 pstOutputCfg->eTsoOutClk = E_DMX_TSO_OUTCLK_54M;
11727 break;
11728 case E_DRVTSO_OUTCLK_PTSOOUT:
11729 pstOutputCfg->eTsoOutClk = E_DMX_TSO_OUTCLK_PTSOOUT;
11730 break;
11731 case E_DRVTSO_OUTCLK_PTSOOUT_DIV8:
11732 pstOutputCfg->eTsoOutClk = E_DMX_TSO_OUTCLK_PTSOOUT_DIV8;
11733 break;
11734 case E_DRVTSO_OUTCLK_Dmd:
11735 pstOutputCfg->eTsoOutClk = E_DMX_TSO_OUTCLK_Dmd;
11736 break;
11737 case E_DRVTSO_OUTCLK_27M:
11738 pstOutputCfg->eTsoOutClk = E_DMX_TSO_OUTCLK_27M;
11739 break;
11740 default:
11741 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11742 }
11743 switch(eOutClkSrc)
11744 {
11745 case E_DRVTSO_OUTCLKSRC_172M_2N:
11746 pstOutputCfg->eTsoOutClkSrc = E_DMX_TSO_OUTCLKSRC_172M_2N;
11747 break;
11748 case E_DRVTSO_OUTCLKSRC_288M_2N:
11749 pstOutputCfg->eTsoOutClkSrc = E_DMX_TSO_OUTCLKSRC_288M_2N;
11750 break;
11751 case E_DRVTSO_OUTCLKSRC_432M_2N:
11752 pstOutputCfg->eTsoOutClkSrc = E_DMX_TSO_OUTCLKSRC_432M_2N;
11753 break;
11754 case E_DRVTSO_OUTCLKSRC_216M_N:
11755 pstOutputCfg->eTsoOutClkSrc = E_DMX_TSO_OUTCLKSRC_216M_N;
11756 break;
11757 case E_DRVTSO_OUTCLKSRC_P_TS0IN:
11758 pstOutputCfg->eTsoOutClkSrc = E_DMX_TSO_OUTCLKSRC_P_TS0IN;
11759 break;
11760 case E_DRVTSO_OUTCLKSRC_P_TS1IN:
11761 pstOutputCfg->eTsoOutClkSrc = E_DMX_TSO_OUTCLKSRC_P_TS1IN;
11762 break;
11763 case E_DRVTSO_OUTCLKSRC_P_TS2IN:
11764 pstOutputCfg->eTsoOutClkSrc = E_DMX_TSO_OUTCLKSRC_P_TS2IN;
11765 break;
11766 case E_DRVTSO_OUTCLKSRC_P_TS3IN:
11767 pstOutputCfg->eTsoOutClkSrc = E_DMX_TSO_OUTCLKSRC_P_TS3IN;
11768 break;
11769 case E_DRVTSO_OUTCLKSRC_P_TS4IN:
11770 pstOutputCfg->eTsoOutClkSrc = E_DMX_TSO_OUTCLKSRC_P_TS4IN;
11771 break;
11772 case E_DRVTSO_OUTCLKSRC_P_TS5IN:
11773 pstOutputCfg->eTsoOutClkSrc = E_DMX_TSO_OUTCLKSRC_P_TS5IN;
11774 break;
11775 default:
11776 break;
11777 }
11778 }
11779
11780 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11781 }
11782 #else
11783 return DMX_FILTER_STATUS_ERROR;
11784 #endif
11785
11786 }
11787
11788 //-------------------------------------------------------------------------------------------------
11789 ///TSO configuration
11790 /// @param pstTsoCfg \b IN/OUT: Pointer to store configure data
11791 /// @return DMX_FILTER_STATUS_OK - Success
11792 /// @return DMX_FILTER_STATUS_ERROR - Failure
11793 ///
11794 /// @note This API is for TSO2 HW architecture
11795 //-------------------------------------------------------------------------------------------------
11796 DMX_FILTER_STATUS _MApi_DMX_TSO_Configure(DMX_TSO_Cfg* pstTsoCfg)
11797 {
11798 DMX_TSOMSG(DMX_DBG_FUNC, printf("[%s] %d\n", __FUNCTION__, __LINE__));
11799
11800 #ifdef TSO_20_ENABLE
11801
11802 DrvTSO_Cfg stDrvTsoCfg;
11803 memset(&stDrvTsoCfg, 0x0, sizeof(stDrvTsoCfg));
11804
11805 stDrvTsoCfg.u32TsoEng = pstTsoCfg->u32TsoEng;
11806 stDrvTsoCfg.bSet = pstTsoCfg->bSet;
11807 stDrvTsoCfg.eCfgCmd = pstTsoCfg->eCfgCmd;
11808 stDrvTsoCfg.u32CmdData0 = pstTsoCfg->u32CmdData0;
11809
11810 if(MDrv_TSO_Configure(&stDrvTsoCfg) == DRVTSO_OK)
11811 {
11812 return DMX_FILTER_STATUS_OK;
11813 }
11814 else
11815 {
11816 return DMX_FILTER_STATUS_ERROR;
11817 }
11818
11819 #else
11820 return DMX_FILTER_STATUS_ERROR;
11821 #endif
11822
11823 }
11824
11825 //-------------------------------------------------------------------------------------------------
11826 ///TSO (TS output) input pid filter open
11827 /// @param u8Eng \b IN: TSO engine ID
11828 /// @param eTSOInSrc \b IN: TSO PID filter source
11829 /// @param u16Pid \b IN: PID value of TSO PID filter
11830 /// @param pu16DmxId \b IN: Pointer to store PID filter ID
11831 ///
11832 /// @return DMX_FILTER_STATUS_OK - Success
11833 /// @return DMX_FILTER_STATUS_ERROR - Failure
11834 ///
11835 /// @note
11836 //-------------------------------------------------------------------------------------------------
11837 DMX_FILTER_STATUS _MApi_DMX_TSO_Pid_Open(MS_U8 u8Eng, DMX_TSIF eTSOInSrc, MS_U16 u16Pid, MS_U16* pu16DmxId)
11838 {
11839 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s][%d](%x, %x, %x, %p)\n", __FUNCTION__, __LINE__, (unsigned int)u8Eng, eTSOInSrc, u16Pid, pu16DmxId));
11840
11841 #ifdef TSO_20_ENABLE
11842 DrvTSO_If eTsoif = E_DRVTSO_IF_LIVE0;
11843
11844 switch(eTSOInSrc)
11845 {
11846 case DMX_TSIF_LIVE0:
11847 eTsoif = E_DRVTSO_IF_LIVE0;
11848 break;
11849 case DMX_TSIF_LIVE1:
11850 eTsoif = E_DRVTSO_IF_LIVE1;
11851 break;
11852 case DMX_TSIF_LIVE2:
11853 eTsoif = E_DRVTSO_IF_LIVE2;
11854 break;
11855 case DMX_TSIF_LIVE3:
11856 eTsoif = E_DRVTSO_IF_LIVE3;
11857 break;
11858 case DMX_TSIF_FILE0:
11859 eTsoif = E_DRVTSO_IF_FILE0;
11860 break;
11861 case DMX_TSIF_FILE1:
11862 eTsoif = E_DRVTSO_IF_FILE1;
11863 break;
11864 default:
11865 return DMX_FILTER_STATUS_ERROR;
11866 }
11867
11868 _DMX_TSO_ENTRY();
11869 if(MDrv_TSO_PidFlt_Alloc(u8Eng, pu16DmxId) != DRVTSO_OK)
11870 {
11871 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11872 }
11873 if(MDrv_TSO_PidFlt_SetPid(u8Eng, *pu16DmxId, u16Pid) != DRVTSO_OK)
11874 {
11875 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11876 }
11877 if(MDrv_TSO_PidFlt_SetChSrc(u8Eng, *pu16DmxId, eTsoif) != DRVTSO_OK)
11878 {
11879 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11880 }
11881
11882 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11883
11884 #else
11885 return DMX_FILTER_STATUS_ERROR;
11886 #endif
11887
11888 }
11889
11890 //-------------------------------------------------------------------------------------------------
11891 ///TSO (TS output) input pid filter close
11892 /// @param u8Eng \b IN: TSO engine ID
11893 /// @param u16DmxId \b IN: TSO PID filter source
11894 ///
11895 /// @return DMX_FILTER_STATUS_OK - Success
11896 /// @return DMX_FILTER_STATUS_ERROR - Failure
11897 ///
11898 /// @note
11899 //-------------------------------------------------------------------------------------------------
11900 DMX_FILTER_STATUS _MApi_DMX_TSO_Pid_Close(MS_U8 u8Eng, MS_U16 u16DmxId)
11901 {
11902 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s][%d](%x, %d) \n", __FUNCTION__, __LINE__, (unsigned int)u8Eng, u16DmxId));
11903
11904 #ifdef TSO_20_ENABLE
11905 _DMX_TSO_ENTRY();
11906
11907 if(MDrv_TSO_PidFlt_Free(u8Eng, u16DmxId) != DRVTSO_OK)
11908 {
11909 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
11910 }
11911 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
11912
11913 #else
11914 return DMX_FILTER_STATUS_ERROR;
11915 #endif
11916
11917 }
11918
11919 //FIQ API
11920 DMX_FILTER_STATUS _MApi_DMX_FQ_SetFltRushPass(MS_U32 u32DmxId, MS_U8 u8Enable)
11921 {
11922 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11923 #ifdef FQ_ENABLE
11924 _DMX_ENTRY();
11925 DMX_ASSERT2(DMX_MAX_FLTID > u32DmxId, DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%06d] Bad Demux id %d\n", __LINE__, (int)u32DmxId)));
11926
11927 MDrv_TSP_PidFlt_SetFltRushPass(0, u32DmxId, u8Enable);
11928 _FLT_LIST_PID_SET(u32DmxId, u8Enable);
11929
11930 _DMX_RETURN(DMX_FILTER_STATUS_OK);
11931 #else
11932 return DMX_FILTER_STATUS_ERROR;
11933 #endif
11934 }
11935
11936 //-------------------------------------------------------------------------------------------------
11937 /// Initialize Demux API for FQ Enable
11938 /// @param param \b IN: Init FQ Setting
11939 /// @return DMX_FILTER_STATUS_ERROR - Failure
11940 /// @note if want to use FQ, please call this API after calling MApi_DMX_Init. (FQ does not support for all chip)
11941 //-------------------------------------------------------------------------------------------------
11942 DMX_FILTER_STATUS _MApi_DMX_FQ_Init(MS_U32 u32FQEng, DMX_FQ_Info* pFQInfo)
11943 {
11944 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11945
11946 #ifdef FQ_ENABLE
11947 _DMX_ENTRY();
11948
11949 if(!pFQInfo)
11950 {
11951 ULOGE("DMX", "ERROR!! pFQInfo is NULL!!\n");
11952 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
11953 }
11954
11955 if(pFQInfo->u32BufSize % 192)
11956 {
11957 ULOGE("DMX", "ERROR!! u32BufSize is not 192 aligned!!\n");
11958 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
11959 }
11960
11961 if(MDrv_FQ_Init(u32FQEng, pFQInfo->u8AddrMode) != DRVFQ_OK)
11962 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
11963
11964 MDrv_TSP_FQ_SetMuxSwitch(u32FQEng, _pdmx_res->_eFqSrc);
11965 MDrv_FQ_SetBuffer(u32FQEng, pFQInfo->u32BufStart, pFQInfo->u32BufSize);
11966 MDrv_FQ_Start(u32FQEng, TRUE);
11967 _DMX_RETURN(DMX_FILTER_STATUS_OK);
11968 #else
11969 return DMX_FILTER_STATUS_ERROR;
11970 #endif
11971 }
11972
11973 DMX_FILTER_STATUS _MApi_DMX_FQ_Exit(MS_U32 u32FQEng)
11974 {
11975 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11976 #ifdef FQ_ENABLE
11977 _DMX_ENTRY();
11978 MDrv_FQ_Start(u32FQEng, FALSE);
11979 MDrv_FQ_Exit(u32FQEng);
11980 _DMX_RETURN(DMX_FILTER_STATUS_OK);
11981 #else
11982 return DMX_FILTER_STATUS_ERROR;
11983 #endif
11984 }
11985
11986 DMX_FILTER_STATUS _MApi_DMX_FQ_RushEnable(MS_U32 u32FQEng)
11987 {
11988 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
11989 #ifdef FQ_ENABLE
11990 _DMX_ENTRY();
11991 MDrv_FQ_RushEnable(u32FQEng);
11992 _DMX_RETURN(DMX_FILTER_STATUS_OK);
11993 #else
11994 return DMX_FILTER_STATUS_ERROR;
11995 #endif
11996 }
11997
11998 DMX_FILTER_STATUS _MApi_DMX_FQ_SkipRushData(MS_U32 u32FQEng, DMX_FQ_SkipPath eSkipPath)
11999 {
12000 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
12001 #ifdef FQ_ENABLE
12002 _DMX_ENTRY();
12003
12004 MDrv_FQ_SkipRushData(u32FQEng, (MS_U32)eSkipPath);
12005
12006 _DMX_RETURN(DMX_FILTER_STATUS_OK);
12007 #else
12008 return DMX_FILTER_STATUS_ERROR;
12009 #endif
12010 }
12011
12012 DMX_FILTER_STATUS _MApi_DMX_FQ_Configure(DMX_FQ_Cfg* pstFqCfg)
12013 {
12014 #ifdef FQ_ENABLE
12015
12016 MS_U32 u32Ret = DMX_FILTER_STATUS_OK;
12017 DrvFQ_SrcIf eFQSrcif = E_DRVFQ_SRC_TSIF0;
12018
12019 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
12020
12021 _DMX_ENTRY();
12022
12023 if(E_DMX_FQ_CFG_SEL_SRCMUX == pstFqCfg->eCfgCmd)
12024 {
12025 if(pstFqCfg->bSet)
12026 {
12027 switch(pstFqCfg->eFqSrcSel)
12028 {
12029 case DMX_TSIF_LIVE0:
12030 eFQSrcif = E_DRVFQ_SRC_TSIF0;
12031 break;
12032 case DMX_TSIF_LIVE1:
12033 eFQSrcif = E_DRVFQ_SRC_TSIF1;
12034 break;
12035 case DMX_TSIF_LIVE2:
12036 eFQSrcif = E_DRVFQ_SRC_TSIF2;
12037 break;
12038 case DMX_TSIF_LIVE3:
12039 eFQSrcif = E_DRVFQ_SRC_TSIF3;
12040 break;
12041 default:
12042 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
12043 }
12044
12045 _pdmx_res->_eFqSrc = eFQSrcif;
12046
12047 if(DRVTSP_OK != MDrv_TSP_FQ_SetMuxSwitch(pstFqCfg->u32FQEng,eFQSrcif))
12048 u32Ret = DMX_FILTER_STATUS_ERROR;
12049 }
12050 else
12051 {
12052 if(DRVTSP_OK != MDrv_TSP_FQ_GetMuxSwitch(pstFqCfg->u32FQEng,&eFQSrcif))
12053 u32Ret = DMX_FILTER_STATUS_ERROR;
12054
12055 pstFqCfg->eFqSrcSel = 0xFF;
12056 switch(eFQSrcif)
12057 {
12058 case E_DRVFQ_SRC_TSIF0:
12059 pstFqCfg->eFqSrcSel = DMX_TSIF_LIVE0;
12060 break;
12061 case E_DRVFQ_SRC_TSIF1:
12062 pstFqCfg->eFqSrcSel = DMX_TSIF_LIVE1;
12063 break;
12064 case E_DRVFQ_SRC_TSIF2:
12065 pstFqCfg->eFqSrcSel = DMX_TSIF_LIVE2;
12066 break;
12067 case E_DRVFQ_SRC_TSIF3:
12068 pstFqCfg->eFqSrcSel = DMX_TSIF_LIVE3;
12069 break;
12070 default:
12071 u32Ret = DMX_FILTER_STATUS_ERROR;
12072 break;
12073 }
12074 }
12075 }
12076 else if(E_DMX_FQ_CFG_FLT_NULL_PKT == pstFqCfg->eCfgCmd)
12077 {
12078 if(DRVTSP_OK != MDrv_TSP_FQ_FltNullPkt(pstFqCfg->u32FQEng, pstFqCfg->bSet))
12079 u32Ret = DMX_FILTER_STATUS_NOT_SUPPORT;
12080 }
12081 else
12082 {
12083 u32Ret = DMX_FILTER_STATUS_NOT_SUPPORT;
12084 }
12085
12086 _DMX_RETURN(u32Ret);
12087
12088 #else
12089 return DMX_FILTER_STATUS_NOT_SUPPORT;
12090 #endif
12091 }
12092
12093 DMX_FILTER_STATUS _MApi_DMX_FQ_SetRushAddr(MS_U32 u32FQEng, MS_PHY phyRushAddr)
12094 {
12095 #ifdef FQ_ENABLE
12096
12097 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
12098
12099 _DMX_ENTRY();
12100
12101 if(DRVFQ_OK == MDrv_FQ_SetRushAddr(u32FQEng, phyRushAddr))
12102 {
12103 _DMX_RETURN(DMX_FILTER_STATUS_OK);
12104 }
12105 else
12106 {
12107 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
12108 }
12109
12110 #else
12111 return DMX_FILTER_STATUS_NOT_SUPPORT;
12112 #endif
12113 }
12114
12115 DMX_FILTER_STATUS _MApi_DMX_FQ_ReadGet(MS_U32 u32FQEng,MS_PHY* pphyRead)
12116 {
12117 #ifdef FQ_ENABLE
12118
12119 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
12120
12121 _DMX_ENTRY();
12122
12123 if(DRVFQ_OK == MDrv_FQ_GetReadAddr(u32FQEng, pphyRead))
12124 {
12125 _DMX_RETURN(DMX_FILTER_STATUS_OK);
12126 }
12127 else
12128 {
12129 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
12130 }
12131
12132 #else
12133 return DMX_FILTER_STATUS_NOT_SUPPORT;
12134 #endif
12135 }
12136
12137 DMX_FILTER_STATUS _MApi_DMX_FQ_WriteGet(MS_U32 u32FQEng,MS_PHY* pphyWrite)
12138 {
12139 #ifdef FQ_ENABLE
12140
12141 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
12142
12143 _DMX_ENTRY();
12144
12145 if(DRVFQ_OK == MDrv_FQ_GetWriteAddr(u32FQEng, pphyWrite))
12146 {
12147 _DMX_RETURN(DMX_FILTER_STATUS_OK);
12148 }
12149 else
12150 {
12151 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
12152 }
12153
12154 #else
12155 return DMX_FILTER_STATUS_NOT_SUPPORT;
12156 #endif
12157 }
12158
12159 DMX_FILTER_STATUS _MApi_DMX_Get_PipeId(DMX_PIPEID_GROUP eGroup, DMX_GENERAL_ENGID EngId, MS_U32 *pu32PipeId)
12160 {
12161 DMX_DBGMSG(DMX_DBG_FUNC, printf("[%s] %d\n", __FUNCTION__, __LINE__));
12162
12163 MS_U32 u32FileEng = 0;
12164
12165 *pu32PipeId = DMX_PIPE_NULL;
12166
12167 switch(eGroup)
12168 {
12169 case DMX_PIPEID_GRP_PVR:
12170 *pu32PipeId = DMX_PIPE_PVR_0 + (MS_U32)(EngId.PvrEng);
12171 break;
12172 case DMX_PIPEID_GRP_FILE:
12173 u32FileEng = (MS_U32)(EngId.FileinPath);
12174 *pu32PipeId = DMX_PIPE_FILE_0 + u32FileEng;
12175 break;
12176 case DMX_PIPEID_GRP_MMFI:
12177 *pu32PipeId = DMX_PIPE_MMFI_0 + (MS_U32)(EngId.MmfiPath);
12178 break;
12179
12180 default:
12181 return DMX_FILTER_STATUS_ERROR;
12182 }
12183
12184 return DMX_FILTER_STATUS_OK;
12185 }
12186
12187 //-------------------------------------------------------------------------------------------------
12188 /// Hardware general config for driver interface
12189 /// @return DMX_FILTER_STATUS_OK - Success
12190 /// @return DMX_FILTER_STATUS_ERROR - Failure
12191 /// @note
12192 //-------------------------------------------------------------------------------------------------
12193 DMX_FILTER_STATUS _MApi_DMX_CMD_Run(MS_U32 u32Cmd, MS_U32 u32Config, MS_U32 u32DataNum, void *pData)
12194 {
12195 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
12196
12197 switch(u32Cmd)
12198 {
12199 case DMX_CMD_SET_LIB_MODE:
12200 _pdmx_res->_u32LibMode = u32Config;
12201 break;
12202
12203 case DMX_CMD_SET_PESCPY_CONT_MODE:
12204 _u32PESCpy_ContMode = u32Config;
12205 return DMX_FILTER_STATUS_OK;
12206
12207 case DMX_CMD_ENABLE_INIT_REF_CNT:
12208 _pdmx_res->_bEnableInitRefCnt = (MS_BOOL)u32Config;
12209 return DMX_FILTER_STATUS_OK;
12210
12211 default:
12212 break;
12213 }
12214
12215 if(MDrv_TSP_CMD_Run(u32Cmd, u32Config, u32DataNum, pData) != DRVTSP_OK)
12216 return DMX_FILTER_STATUS_ERROR;
12217 else
12218 return DMX_FILTER_STATUS_OK;
12219 }
12220
12221 //-------------------------------------------------------------------------------------------------
12222 // Debug Table
12223 //-------------------------------------------------------------------------------------------------
12224
12225 #ifdef DEBUG_TABLE_SUPPORT
12226 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
12227 static DrvTSP_Debug_Cmd _DMX_ApiDrv_DebugCmdMapping(DMX_DEBUG_CMD eCmd)
12228 {
12229 switch (eCmd)
12230 {
12231 case DMX_DEBUG_CMD_NONE:
12232 return E_DRVTSP_DEBUG_CMD_NONE;
12233 case DMX_DEBUG_CMD_CLEAR:
12234 return E_DRVTSP_DEBUG_CMD_CLEAR;
12235 case DMX_DEBUG_CMD_ENABLE:
12236 return E_DRVTSP_DEBUG_CMD_ENABLE;
12237 case DMX_DEBUG_CMD_DISABLE:
12238 return E_DRVTSP_DEBUG_CMD_DISABLE;
12239 default:
12240 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[%s][%d] UnSupported Debug DMX_DEBUG_CMD !!\n",__FUNCTION__,__LINE__));
12241 return DMX_DEBUG_CMD_NONE;
12242 }
12243 }
12244
12245 static DrvTSP_AVFIFO _DMX_ApiDrv_DebugFifoMapping(DMX_DEBUG_FIFO eFIFO)
12246 {
12247 switch (eFIFO)
12248 {
12249 case DMX_DEBUG_FIFO_VIDEO:
12250 return E_DRVTSP_AVFIFO_VIDEO;
12251 case DMX_DEBUG_FIFO_VIDEO3D:
12252 return E_DRVTSP_AVFIFO_VIDEO3D;
12253 case DMX_DEBUG_FIFO_VIDEO3:
12254 return E_DRVTSP_AVFIFO_VIDEO3;
12255 case DMX_DEBUG_FIFO_VIDEO4:
12256 return E_DRVTSP_AVFIFO_VIDEO4;
12257 case DMX_DEBUG_FIFO_VIDEO5:
12258 return E_DRVTSP_AVFIFO_VIDEO5;
12259 case DMX_DEBUG_FIFO_VIDEO6:
12260 return E_DRVTSP_AVFIFO_VIDEO6;
12261 case DMX_DEBUG_FIFO_VIDEO7:
12262 return E_DRVTSP_AVFIFO_VIDEO7;
12263 case DMX_DEBUG_FIFO_VIDEO8:
12264 return E_DRVTSP_AVFIFO_VIDEO8;
12265 case DMX_DEBUG_FIFO_AUDIO:
12266 return E_DRVTSP_AVFIFO_AUDIO;
12267 case DMX_DEBUG_FIFO_AUDIOB:
12268 return E_DRVTSP_AVFIFO_AUDIOB;
12269 case DMX_DEBUG_FIFO_AUDIOC:
12270 return E_DRVTSP_AVFIFO_AUDIOC;
12271 case DMX_DEBUG_FIFO_AUDIOD:
12272 return E_DRVTSP_AVFIFO_AUDIOD;
12273 case DMX_DEBUG_FIFO_AUDIOE:
12274 return E_DRVTSP_AVFIFO_AUDIOE;
12275 case DMX_DEBUG_FIFO_AUDIOF:
12276 return E_DRVTSP_AVFIFO_AUDIOF;
12277 default:
12278 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[%s][%d] UnSupported Debug DMX_DEBUG_FIFO !!\n",__FUNCTION__,__LINE__));
12279 return E_DRVTSP_AVFIFO_INVALID;
12280 }
12281 }
12282 #endif
12283 #endif
12284
12285 //-------------------------------------------------------------------------------------------------
12286 /// Get dis-continue count by ts source and specific FIFO.
12287 /// @param pDmxInfo \b IN: set control parameter to get related tsif packet count.
12288 /// @param pu32Cnt \b OUT: dis-continue packet count
12289 /// @return DMX_FILTER_STATUS_OK - Success
12290 /// @return DMX_FILTER_STATUS_ERROR - Failure
12291 /// @note
12292 //-------------------------------------------------------------------------------------------------
12293 DMX_FILTER_STATUS _MApi_DMX_Get_DisContiCnt(DMX_DisContiCnt_info* pDmxInfo, MS_U32 *pu32Cnt)
12294 {
12295 #ifdef DEBUG_TABLE_SUPPORT
12296
12297 DMX_FILTER_STATUS ret;
12298 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
12299
12300 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0)))
12301
12302 DrvTSP_DisContiCnt_info tspInfo;
12303
12304 _DMX_ENTRY();
12305
12306 memset(&tspInfo, 0, sizeof(DrvTSP_DisContiCnt_info));
12307 tspInfo.TspCmd = pDmxInfo->TspCmd;
12308 tspInfo.TspFifo = pDmxInfo->TspFifo;
12309 tspInfo.TspSrc = pDmxInfo->TspSrc;
12310
12311 ret = (DRVTSP_OK == MDrv_TSP_Get_DisContiCnt(&tspInfo, pu32Cnt)? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR);
12312
12313 _DMX_RETURN(ret);
12314
12315 #else // For TSP_VER_4_0
12316
12317 DrvTSP_Debug_Cmd eDbgCmd = _DMX_ApiDrv_DebugCmdMapping(pDmxInfo->TspCmd);
12318 DrvTSP_AVFIFO eDbgAV = _DMX_ApiDrv_DebugFifoMapping(pDmxInfo->TspFifo);
12319 DrvTSP_Flow eDbgFlow = E_DRVTSP_FLOW_INVALID;
12320
12321 switch(pDmxInfo->TspSrc)
12322 {
12323 case DMX_DEBUG_SRC_TS0:
12324 eDbgFlow = E_DRVTSP_FLOW_LIVE0;
12325 break;
12326 case DMX_DEBUG_SRC_TS1:
12327 eDbgFlow = E_DRVTSP_FLOW_LIVE1;
12328 break;
12329 case DMX_DEBUG_SRC_TS2:
12330 eDbgFlow = E_DRVTSP_FLOW_LIVE2;
12331 break;
12332 case DMX_DEBUG_SRC_TS3:
12333 eDbgFlow = E_DRVTSP_FLOW_LIVE3;
12334 break;
12335 case DMX_DEBUG_SRC_FILE0:
12336 eDbgFlow = E_DRVTSP_FLOW_FILE0;
12337 break;
12338 case DMX_DEBUG_SRC_FILE1:
12339 eDbgFlow = E_DRVTSP_FLOW_FILE1;
12340 break;
12341 case DMX_DEBUG_SRC_FILE2:
12342 eDbgFlow = E_DRVTSP_FLOW_FILE2;
12343 break;
12344 case DMX_DEBUG_SRC_FILE3:
12345 eDbgFlow = E_DRVTSP_FLOW_FILE3;
12346 break;
12347 case DMX_DEBUG_SRC_TS4:
12348 case DMX_DEBUG_SRC_FILE4:
12349 eDbgFlow = E_DRVTSP_FLOW_LIVE4;
12350 break;
12351 case DMX_DEBUG_SRC_TS5:
12352 case DMX_DEBUG_SRC_FILE5:
12353 eDbgFlow = E_DRVTSP_FLOW_LIVE5;
12354 break;
12355 case DMX_DEBUG_SRC_TS6:
12356 case DMX_DEBUG_SRC_FILE6:
12357 eDbgFlow = E_DRVTSP_FLOW_LIVE6;
12358 break;
12359 case DMX_DEBUG_SRC_MMFI0:
12360 eDbgFlow = E_DRVTSP_FLOW_MMFI0;
12361 break;
12362 case DMX_DEBUG_SRC_MMFI1:
12363 eDbgFlow = E_DRVTSP_FLOW_MMFI1;
12364 break;
12365 default:
12366 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[%s][%d] UnSupported Debug Flow !!\n",__FUNCTION__,__LINE__));
12367 return DMX_FILTER_STATUS_ERROR;
12368 }
12369
12370 _DMX_ENTRY();
12371
12372 ret = (DRVTSP_OK == MDrv_TSP_Get_DisContiCnt(eDbgCmd, eDbgAV, eDbgFlow, pu32Cnt)? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR);
12373 _DMX_RETURN(ret);
12374
12375 #endif // End of TSP_VER_4_0
12376
12377 return DMX_FILTER_STATUS_ERROR;
12378 #else
12379 return DMX_FILTER_STATUS_ERROR;
12380 #endif
12381 }
12382
12383 //-------------------------------------------------------------------------------------------------
12384 ///Get drop packet count by ts source and specific FIFO.
12385 /// @param pDmxInfo \b IN: set control parameter to get related source packet count.
12386 /// @param pu32Cnt \b OUT: drop packet count
12387 /// @return DMX_FILTER_STATUS_OK - Success
12388 /// @return DMX_FILTER_STATUS_ERROR - Failure
12389 /// @note
12390 //-------------------------------------------------------------------------------------------------
12391 DMX_FILTER_STATUS _MApi_DMX_Get_DropPktCnt(DMX_DropPktCnt_info* pDmxInfo, MS_U32 *pu32Cnt)
12392 {
12393 #ifdef DEBUG_TABLE_SUPPORT
12394
12395 DMX_FILTER_STATUS ret;
12396 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
12397
12398
12399 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0)))
12400
12401 DrvTSP_DropPktCnt_info tspInfo;
12402
12403 _DMX_ENTRY();
12404
12405 memset(&tspInfo, 0, sizeof(DrvTSP_DropPktCnt_info));
12406 tspInfo.TspCmd = pDmxInfo->TspCmd;
12407 tspInfo.TspFifo = pDmxInfo->TspFifo;
12408 tspInfo.TspSrc = pDmxInfo->TspSrc;
12409
12410 ret = (DRVTSP_OK == MDrv_TSP_Get_DropPktCnt(&tspInfo, pu32Cnt)? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR);
12411 _DMX_RETURN(ret);
12412
12413 #else // For TSP_VER_4_0
12414
12415 DrvTSP_Debug_Cmd eDbgCmd = _DMX_ApiDrv_DebugCmdMapping(pDmxInfo->TspCmd);
12416 DrvTSP_AVFIFO eDbgAV = _DMX_ApiDrv_DebugFifoMapping(pDmxInfo->TspFifo);
12417 DrvTSP_Flow eDbgFlow = E_DRVTSP_FLOW_INVALID;
12418
12419 switch(pDmxInfo->TspSrc)
12420 {
12421 case DMX_DEBUG_SRC_TS0:
12422 eDbgFlow = E_DRVTSP_FLOW_LIVE0;
12423 break;
12424 case DMX_DEBUG_SRC_TS1:
12425 eDbgFlow = E_DRVTSP_FLOW_LIVE1;
12426 break;
12427 case DMX_DEBUG_SRC_TS2:
12428 eDbgFlow = E_DRVTSP_FLOW_LIVE2;
12429 break;
12430 case DMX_DEBUG_SRC_TS3:
12431 eDbgFlow = E_DRVTSP_FLOW_LIVE3;
12432 break;
12433 case DMX_DEBUG_SRC_FILE0:
12434 eDbgFlow = E_DRVTSP_FLOW_FILE0;
12435 break;
12436 case DMX_DEBUG_SRC_FILE1:
12437 eDbgFlow = E_DRVTSP_FLOW_FILE1;
12438 break;
12439 case DMX_DEBUG_SRC_FILE2:
12440 eDbgFlow = E_DRVTSP_FLOW_FILE2;
12441 break;
12442 case DMX_DEBUG_SRC_FILE3:
12443 eDbgFlow = E_DRVTSP_FLOW_FILE3;
12444 break;
12445 case DMX_DEBUG_SRC_TS4:
12446 case DMX_DEBUG_SRC_FILE4:
12447 eDbgFlow = E_DRVTSP_FLOW_LIVE4;
12448 break;
12449 case DMX_DEBUG_SRC_TS5:
12450 case DMX_DEBUG_SRC_FILE5:
12451 eDbgFlow = E_DRVTSP_FLOW_LIVE5;
12452 break;
12453 case DMX_DEBUG_SRC_TS6:
12454 case DMX_DEBUG_SRC_FILE6:
12455 eDbgFlow = E_DRVTSP_FLOW_LIVE6;
12456 break;
12457 case DMX_DEBUG_SRC_MMFI0:
12458 eDbgFlow = E_DRVTSP_FLOW_MMFI0;
12459 break;
12460 case DMX_DEBUG_SRC_MMFI1:
12461 eDbgFlow = E_DRVTSP_FLOW_MMFI1;
12462 break;
12463 default:
12464 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX","[%s][%d] UnSupported Debug Flow !!\n",__FUNCTION__,__LINE__));
12465 return DMX_FILTER_STATUS_ERROR;
12466 break;
12467 }
12468
12469 _DMX_ENTRY();
12470 ret = (DRVTSP_OK == MDrv_TSP_Get_DropPktCnt(eDbgCmd, eDbgAV, eDbgFlow, pu32Cnt)? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR);
12471 _DMX_RETURN(ret);
12472
12473 #endif // End of TSP_VER_4_0
12474
12475 return DMX_FILTER_STATUS_ERROR;
12476 #else
12477 return DMX_FILTER_STATUS_ERROR;
12478 #endif
12479 }
12480
12481 //-------------------------------------------------------------------------------------------------
12482 ///Get locked packet count by ts source and specific FIFO.
12483 /// @param pDmxInfo \b IN: set control parameter to get related tsif packet count.
12484 /// @param pu32Cnt \b OUT: Lock packet count
12485 /// @return DMX_FILTER_STATUS_OK - Success
12486 /// @return DMX_FILTER_STATUS_ERROR - Failure
12487 /// @note
12488 //-------------------------------------------------------------------------------------------------
12489 DMX_FILTER_STATUS _MApi_DMX_Get_LockPktCnt(DMX_LockPktCnt_info* pDmxInfo, MS_U32 *pu32Cnt)
12490 {
12491 #ifdef DEBUG_TABLE_SUPPORT
12492
12493 DMX_FILTER_STATUS ret;
12494 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
12495
12496 #if (defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0)))
12497
12498 DrvTSP_LockPktCnt_info tspInfo;
12499
12500 _DMX_ENTRY();
12501
12502 memset(&tspInfo, 0, sizeof(DrvTSP_LockPktCnt_info));
12503 tspInfo.TspCmd = pDmxInfo->TspCmd;
12504 tspInfo.TspTsif = pDmxInfo->TspTsif;
12505
12506 ret = (DRVTSP_OK == MDrv_TSP_Get_LockPktCnt(&tspInfo, pu32Cnt)? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR);
12507 _DMX_RETURN(ret);
12508
12509 #else // For TSP_VER_4_0
12510
12511 DrvTSP_Debug_Cmd eDbgCmd = _DMX_ApiDrv_DebugCmdMapping(pDmxInfo->TspCmd);
12512 DrvTSP_Flow eDbgFlow = E_DRVTSP_FLOW_INVALID;
12513
12514 switch(pDmxInfo->TspTsif)
12515 {
12516 case DMX_DEBUG_TSIF_TS0:
12517 eDbgFlow = E_DRVTSP_FLOW_LIVE0;
12518 break;
12519 case DMX_DEBUG_TSIF_TS1:
12520 eDbgFlow = E_DRVTSP_FLOW_LIVE1;
12521 break;
12522 case DMX_DEBUG_TSIF_TS2:
12523 eDbgFlow = E_DRVTSP_FLOW_LIVE2;
12524 break;
12525 case DMX_DEBUG_TSIF_TS3:
12526 eDbgFlow = E_DRVTSP_FLOW_LIVE3;
12527 break;
12528 case DMX_DEBUG_TSIF_TS4:
12529 eDbgFlow = E_DRVTSP_FLOW_LIVE4;
12530 break;
12531 case DMX_DEBUG_TSIF_TS5:
12532 eDbgFlow = E_DRVTSP_FLOW_LIVE5;
12533 break;
12534 case DMX_DEBUG_TSIF_TS6:
12535 eDbgFlow = E_DRVTSP_FLOW_LIVE6;
12536 break;
12537 default:
12538 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX","[%s][%d] UnSupported Debug Flow !!\n",__FUNCTION__,__LINE__));
12539 return DMX_FILTER_STATUS_ERROR;
12540 }
12541
12542 _DMX_ENTRY();
12543
12544 ret = (DRVTSP_OK == MDrv_TSP_Get_LockPktCnt(eDbgCmd, eDbgFlow, pu32Cnt)? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR);
12545
12546 _DMX_RETURN(ret);
12547
12548 #endif // End of TSP_VER_4_0
12549
12550 return DMX_FILTER_STATUS_ERROR;
12551 #else
12552 return DMX_FILTER_STATUS_ERROR;
12553 #endif
12554
12555 }
12556
12557 //-------------------------------------------------------------------------------------------------
12558 /// Get AV packet count by ts source and specific FIFO.
12559 /// @param pDmxInfo \b IN: set control parameter to get related source packet count.
12560 /// @param pu32Cnt \b OUT: AV packet count
12561 /// @return DMX_FILTER_STATUS_OK - Success
12562 /// @return DMX_FILTER_STATUS_ERROR - Failure
12563 /// @note
12564 //-------------------------------------------------------------------------------------------------
12565 DMX_FILTER_STATUS _MApi_DMX_Get_AVPktCnt(DMX_AVPktCnt_info *DmxInfo, MS_U32 *pu32Cnt)
12566 {
12567 #ifdef DEBUG_TABLE_SUPPORT
12568
12569 DMX_FILTER_STATUS ret;
12570 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
12571
12572 #if (defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0)))
12573
12574 DrvTSP_AVPktCnt_info tspInfo;
12575
12576 _DMX_ENTRY();
12577
12578 memset(&tspInfo, 0, sizeof(DrvTSP_AVPktCnt_info));
12579 tspInfo.TspCmd = DmxInfo->TspCmd;
12580 tspInfo.TspFifo = DmxInfo->TspFifo;
12581 tspInfo.TspFifoSrc = DmxInfo->TspFifoSrc; // for new chip(after Nasa), old chip is not used.
12582
12583 ret = (DRVTSP_OK == MDrv_TSP_Get_AVPktCnt(&tspInfo, pu32Cnt)? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR);
12584 _DMX_RETURN(ret);
12585
12586 #else // For TSP_VER_4_0
12587
12588 DrvTSP_Debug_Cmd eDbgCmd = _DMX_ApiDrv_DebugCmdMapping(DmxInfo->TspCmd);
12589 DrvTSP_AVFIFO eDbgAV = _DMX_ApiDrv_DebugFifoMapping(DmxInfo->TspFifo);
12590 DrvTSP_Flow eDbgFlow = E_DRVTSP_FLOW_INVALID;
12591
12592 switch(DmxInfo->TspFifoSrc)
12593 {
12594 case DMX_DEBUG_PKT_DEMUX_0:
12595 eDbgFlow = E_DRVTSP_FLOW_LIVE0;
12596 break;
12597 case DMX_DEBUG_PKT_DEMUX_1:
12598 eDbgFlow = E_DRVTSP_FLOW_LIVE1;
12599 break;
12600 case DMX_DEBUG_PKT_DEMUX_2:
12601 eDbgFlow = E_DRVTSP_FLOW_LIVE2;
12602 break;
12603 case DMX_DEBUG_PKT_DEMUX_3:
12604 eDbgFlow = E_DRVTSP_FLOW_LIVE3;
12605 break;
12606 case DMX_DEBUG_PKT_DEMUX_0_FILE:
12607 eDbgFlow = E_DRVTSP_FLOW_FILE0;
12608 break;
12609 case DMX_DEBUG_PKT_DEMUX_1_FILE:
12610 eDbgFlow = E_DRVTSP_FLOW_FILE1;
12611 break;
12612 case DMX_DEBUG_PKT_DEMUX_2_FILE:
12613 eDbgFlow = E_DRVTSP_FLOW_FILE2;
12614 break;
12615 case DMX_DEBUG_PKT_DEMUX_3_FILE:
12616 eDbgFlow = E_DRVTSP_FLOW_FILE3;
12617 break;
12618 case DMX_DEBUG_PKT_DEMUX_4:
12619 case DMX_DEBUG_PKT_DEMUX_4_FILE:
12620 eDbgFlow = E_DRVTSP_FLOW_LIVE4;
12621 break;
12622 case DMX_DEBUG_PKT_DEMUX_5:
12623 case DMX_DEBUG_PKT_DEMUX_5_FILE:
12624 eDbgFlow = E_DRVTSP_FLOW_LIVE5;
12625 break;
12626 case DMX_DEBUG_PKT_DEMUX_6:
12627 case DMX_DEBUG_PKT_DEMUX_6_FILE:
12628 eDbgFlow = E_DRVTSP_FLOW_LIVE6;
12629 break;
12630 case DMX_DEBUG_MMFI0:
12631 eDbgFlow = E_DRVTSP_FLOW_MMFI0;
12632 break;
12633 case DMX_DEBUG_MMFI1:
12634 eDbgFlow = E_DRVTSP_FLOW_MMFI1;
12635 break;
12636 default:
12637 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX","[%s][%d] UnSupported Debug Flow !!\n",__FUNCTION__,__LINE__));
12638 return DMX_FILTER_STATUS_ERROR;
12639 }
12640
12641 _DMX_ENTRY();
12642
12643 ret = (DRVTSP_OK == MDrv_TSP_Get_AVPktCnt(eDbgCmd, eDbgAV, eDbgFlow, pu32Cnt)? DMX_FILTER_STATUS_OK: DMX_FILTER_STATUS_ERROR);
12644
12645 _DMX_RETURN(ret);
12646
12647 #endif // End of TSP_VER_4_0
12648
12649 return DMX_FILTER_STATUS_ERROR;
12650 #else
12651 return DMX_FILTER_STATUS_ERROR;
12652 #endif
12653 }
12654
12655 //-------------------------------------------------------------------------------------------------
12656 ///Get section TEI packet count by ts source
12657 /// @param FltSrc \b IN: TS source
12658 /// @param pu32PktCnt \b OUT: TEI packet count
12659 /// @return DMX_FILTER_STATUS_OK - Success
12660 /// @return DMX_FILTER_STATUS_ERROR - Failure
12661 /// @note
12662 //-------------------------------------------------------------------------------------------------
12663 DMX_FILTER_STATUS _MApi_DMX_Get_SecTEI_PktCount(DMX_FILTER_TYPE FltSrc, MS_U32* pu32PktCnt)
12664 {
12665 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
12666
12667 _DMX_ENTRY();
12668
12669 if(MDrv_TSP_Get_SecTEI_PktCount(FltSrc, pu32PktCnt) == DRVTSP_OK)
12670 {
12671 _DMX_RETURN(DMX_FILTER_STATUS_OK);
12672 }
12673 else
12674 {
12675 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
12676 }
12677 #else
12678 return DMX_FILTER_STATUS_ERROR;
12679 #endif
12680 }
12681
12682 //-------------------------------------------------------------------------------------------------
12683 ///Reset section TEI packet count by DMX filter id
12684 /// @param FltSrc \b IN: TS source
12685 /// @return DMX_FILTER_STATUS_OK - Success
12686 /// @return DMX_FILTER_STATUS_ERROR - Failure
12687 /// @note
12688 //-------------------------------------------------------------------------------------------------
12689 DMX_FILTER_STATUS _MApi_DMX_Reset_SecTEI_PktCount(DMX_FILTER_TYPE FltSrc)
12690 {
12691 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
12692
12693 _DMX_ENTRY();
12694
12695 if(MDrv_TSP_Reset_SecTEI_PktCount(FltSrc) == DRVTSP_OK)
12696 {
12697 _DMX_RETURN(DMX_FILTER_STATUS_OK);
12698 }
12699 else
12700 {
12701 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
12702 }
12703 #else
12704 return DMX_FILTER_STATUS_ERROR;
12705 #endif
12706 }
12707
12708 //-------------------------------------------------------------------------------------------------
12709 ///Get section dis-continue packet count
12710 /// @param u32DmxID \b IN: DMX filter Id
12711 /// @param pu32PktCnt \b OUT: Dis-continue packet count
12712 /// @return DMX_FILTER_STATUS_OK - Success
12713 /// @return DMX_FILTER_STATUS_ERROR - Failure
12714 /// @note
12715 //-------------------------------------------------------------------------------------------------
12716 DMX_FILTER_STATUS _MApi_DMX_Get_SecDisCont_PktCount(MS_U32 u32DmxID, MS_U32* pu32PktCnt)
12717 {
12718 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
12719
12720 _DMX_ENTRY();
12721
12722 if(MDrv_TSP_Get_SecDisCont_PktCount(u32DmxID, pu32PktCnt) == DRVTSP_OK)
12723 {
12724 _DMX_RETURN(DMX_FILTER_STATUS_OK);
12725 }
12726 else
12727 {
12728 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
12729 }
12730 #else
12731 return DMX_FILTER_STATUS_ERROR;
12732 #endif
12733 }
12734
12735 //-------------------------------------------------------------------------------------------------
12736 ///Reset section dis-continue packet count
12737 /// @param u32DmxID \b IN: DMX filter Id
12738 /// @param pu32PktCnt \b OUT: Dis-continue packet count
12739 /// @return DMX_FILTER_STATUS_OK - Success
12740 /// @return DMX_FILTER_STATUS_ERROR - Failure
12741 /// @note
12742 //-------------------------------------------------------------------------------------------------
12743 DMX_FILTER_STATUS _MApi_DMX_Reset_SecDisCont_PktCount(MS_U32 u32DmxID)
12744 {
12745 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
12746
12747 _DMX_ENTRY();
12748
12749 if(MDrv_TSP_Reset_SecDisCont_PktCount(u32DmxID) == DRVTSP_OK)
12750 {
12751 _DMX_RETURN(DMX_FILTER_STATUS_OK);
12752 }
12753 else
12754 {
12755 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
12756 }
12757 #else
12758 return DMX_FILTER_STATUS_ERROR;
12759 #endif
12760 }
12761
12762 //-------------------------------------------------------------------------------------------------
12763 /// Initialize lib resource API
12764 /// @param pu32ResMemAddr \b IN: Pointer to store resource memory addresses
12765 /// @return DMX_FILTER_STATUS_OK - Success
12766 /// @return DMX_FILTER_STATUS_ERROR - Failure
12767 /// @note
12768 //-------------------------------------------------------------------------------------------------
12769 DMX_FILTER_STATUS MApi_DMX_InitLibResource(void *pResMemAddr)
12770 {
12771 MS_U32 u32size = 0;
12772 MS_VIRT ptrMemPos = (MS_VIRT)pResMemAddr;
12773
12774 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s][%d](%p)\n", __FUNCTION__, __LINE__, pResMemAddr));
12775
12776 DMX_ASSERT((pResMemAddr != 0), DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[MAPI DMX][%s][%06d] data pointer is 0x%p!", __FUNCTION__, __LINE__, pResMemAddr)));
12777
12778 _pdmx_res = (DMX_RESOURCE_PRIVATE*)pResMemAddr;
12779
12780 if(_pdmx_res->bResoureInit != TRUE)
12781 {
12782 _DMX_InitResource(_pdmx_res);
12783 }
12784
12785 ptrMemPos += sizeof(DMX_RESOURCE_PRIVATE);
12786
12787 if(MDrv_TSP_InitLibResource((void*)ptrMemPos) != DRVTSP_OK)
12788 {
12789 return DMX_FILTER_STATUS_ERROR;
12790 }
12791
12792 #if defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0) || (TSP_VERSION == TSP_VER_3_0))
12793 if(MDrv_TSP_GetCap(E_DRVTSP_CAP_RESOURCE_SIZE, (void*)(&u32size)) != DRVTSP_OK)
12794 {
12795 return DMX_FILTER_STATUS_ERROR;
12796 }
12797 #else
12798 if(MDrv_TSP_GetCap(E_TSP_CAP_RESOURCE_SIZE, (void*)(&u32size)) != E_TSP_OK)
12799 {
12800 return DMX_FILTER_STATUS_ERROR;
12801 }
12802 #endif
12803
12804 ptrMemPos += u32size;
12805
12806 #if defined(MMFILEIN) || defined(MMFI_VD3D)
12807 if(MDrv_MMFI_InitLibResource((void*)ptrMemPos) != DRVMMFI_OK)
12808 {
12809 return DMX_FILTER_STATUS_ERROR;
12810 }
12811
12812 if(MDrv_MMFI_GetCap(E_DRVMMFI_CAP_RESOURCE_SIZE, (void*)(&u32size)) != DRVMMFI_OK)
12813 {
12814 return DMX_FILTER_STATUS_ERROR;
12815 }
12816 ptrMemPos += u32size;
12817 #endif
12818
12819 #ifdef TSIO_ENABLE
12820 if(MDrv_TSIO_InitLibResource((void*)ptrMemPos) != DRVTSIO_OK)
12821 {
12822 return DMX_FILTER_STATUS_ERROR;
12823 }
12824
12825 if(MDrv_TSIO_GetCap(DRVTSIO_CAP_RESOURCE_SIZE, (void*)(&u32size)) != DRVTSIO_OK)
12826 {
12827 return DMX_FILTER_STATUS_ERROR;
12828 }
12829 ptrMemPos += u32size;
12830 #endif
12831
12832 #ifdef TSO_ENABLE
12833 if(MDrv_TSO_InitLibResource((void*)ptrMemPos) != DRVTSO_OK)
12834 return DMX_FILTER_STATUS_ERROR;
12835 #endif
12836
12837 _pdmx_res->bResoureInit = TRUE;
12838
12839 return DMX_FILTER_STATUS_OK;
12840 }
12841
12842 #ifdef MERGE_STR_SUPPORT
12843 #if(!(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))) // For TSP_VER_4_0
12844
12845 static DrvTSP_If _DMX_ApiDrv_TsIfMapping(DMX_TSIF eTsIf)
12846 {
12847 DrvTSP_If Out_TSP_If = 0;
12848
12849 switch(eTsIf)
12850 {
12851 case DMX_TSIF_LIVE0:
12852 case DMX_TSIF_FILE0:
12853 Out_TSP_If = E_DRVTSP_IF_TSIF0;
12854 break;
12855 case DMX_TSIF_LIVE1:
12856 case DMX_TSIF_FILE1:
12857 Out_TSP_If = E_DRVTSP_IF_TSIF1;
12858 break;
12859 case DMX_TSIF_LIVE2:
12860 case DMX_TSIF_FILE2:
12861 Out_TSP_If = E_DRVTSP_IF_TSIF2;
12862 break;
12863 case DMX_TSIF_LIVE3:
12864 case DMX_TSIF_FILE3:
12865 Out_TSP_If = E_DRVTSP_IF_TSIF3;
12866 break;
12867 case DMX_TSIF_LIVE4:
12868 case DMX_TSIF_FILE4:
12869 Out_TSP_If = E_DRVTSP_IF_TSIF4;
12870 break;
12871 case DMX_TSIF_LIVE5:
12872 case DMX_TSIF_FILE5:
12873 Out_TSP_If = E_DRVTSP_IF_TSIF5;
12874 break;
12875 case DMX_TSIF_LIVE6:
12876 case DMX_TSIF_FILE6:
12877 Out_TSP_If = E_DRVTSP_IF_TSIF6;
12878 break;
12879
12880 default:
12881 DMX_DBGMSG(DMX_DBG_ERR, ULOGE("DMX", "[%s][%d] TsIf Not Support !!\n",__FUNCTION__,__LINE__));
12882 break;
12883 }
12884
12885 return Out_TSP_If;
12886 }
12887 #endif // End of TSP_VER_4_0
12888 #endif // End of MERGE_STR_SUPPORT
12889
12890 //Merger stream API
12891 //-------------------------------------------------------------------------------------------------
12892 ///Set or Get merge stream source id and sync byte
12893 /// @param eIf \b IN: Eunm value of DMX TSIF selection
12894 /// @param u8StrId \b IN: Stream index
12895 /// @param pu8SyncByte \b IN: Pointer to sync bytearray of merege streams
12896 /// @param bSet \b IN: TRUE to setting data or FALSE to getting table
12897 /// @return DMX_FILTER_STATUS_OK - Success
12898 /// @return DMX_FILTER_STATUS_ERROR - Failure
12899 /// @note: Currently, maxmum number is 8, and don't call this API when stream processing is started
12900 //-------------------------------------------------------------------------------------------------
12901 DMX_FILTER_STATUS _MApi_DMX_MStr_SyncByte(DMX_TSIF eIf, MS_U8 u8StrId, MS_U8* pu8SyncByte, MS_BOOL bSet)
12902 {
12903 #ifdef MERGE_STR_SUPPORT
12904 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
12905 DrvTSP_If eTspIf = E_DRVTSP_IF_TS0;
12906
12907 switch(eIf)
12908 {
12909 case DMX_TSIF_LIVE0:
12910 eTspIf = E_DRVTSP_IF_TS0;
12911 break;
12912 case DMX_TSIF_LIVE1:
12913 case DMX_TSIF_FILE1:
12914 eTspIf = E_DRVTSP_IF_TS1;
12915 break;
12916 case DMX_TSIF_LIVE2:
12917 case DMX_TSIF_FILE2:
12918 eTspIf = E_DRVTSP_IF_TS2;
12919 break;
12920 case DMX_TSIF_FILE0:
12921 eTspIf = E_DRVTSP_IF_FI;
12922 break;
12923 default:
12924 return DMX_FILTER_STATUS_ERROR;
12925 }
12926 #else // For TSP_VER_4_0
12927 DrvTSP_If eTspIf = _DMX_ApiDrv_TsIfMapping(eIf);
12928 #endif
12929
12930 _DMX_ENTRY();
12931 if(MDrv_TSP_MStr_SyncByte(eTspIf, u8StrId, pu8SyncByte, bSet) == DRVTSP_OK)
12932 {
12933 _DMX_RETURN(DMX_FILTER_STATUS_OK);
12934 }
12935 else
12936 {
12937 _DMX_RETURN(DMX_FILTER_STATUS_ERROR);
12938 }
12939 #else
12940 return DMX_FILTER_STATUS_NOT_SUPPORT;
12941 #endif
12942 }
12943
12944 //-------------------------------------------------------------------------------------------------
12945 /// STD general function
12946 /// @param ePowerState \b IN: TSP power state
12947 /// @param u32FWAddr \b IN: FW address
12948 /// @param u32FWSize \b IN: FW size
12949 /// @return DMX_FILTER_STATUS_OK - Success
12950 /// @return DMX_FILTER_STATUS_ERROR - Failure
12951 /// @note
12952 //-------------------------------------------------------------------------------------------------
12953 MS_U32 _MApi_DMX_SetPowerState(EN_POWER_MODE ePowerState, MS_PHY phyFWAddr, MS_U32 u32FWSize)
12954 {
12955 #if(defined(TSP_VERSION) && ((TSP_VERSION == TSP_VER_1_0)||(TSP_VERSION == TSP_VER_3_0)))
12956
12957 DMX_FILTER_STATUS _ret = DMX_FILTER_STATUS_ERROR;
12958 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d\n", __FUNCTION__, __LINE__));
12959
12960 switch (ePowerState)
12961 {
12962 case E_POWER_SUSPEND:
12963 _ret = _MApi_DMX_Suspend();
12964 break;
12965
12966 case E_POWER_RESUME:
12967 _ret = _MApi_DMX_Resume(phyFWAddr, u32FWSize);
12968 break;
12969
12970 case E_POWER_MECHANICAL:
12971 case E_POWER_SOFT_OFF:
12972 default:
12973 DMX_DBGMSG(DMX_DBG_FUNC, ULOGD("DMX", "[%s] %d Power state not support!!\n", __FUNCTION__, __LINE__));
12974 break;
12975 }
12976
12977 return ((DMX_FILTER_STATUS_OK == _ret)? UTOPIA_STATUS_SUCCESS: UTOPIA_STATUS_FAIL);
12978 #else
12979 return 0;
12980 #endif
12981 }
12982
12983 DMX_FILTER_STATUS _MApi_DMX_Wait_TspIoSignal(DMX_TSP_IOSIGNAL *pDmxTspIoSig)
12984 {
12985 TSP_Result Res;
12986
12987 pDmxTspIoSig->u32Eng = 0;
12988 pDmxTspIoSig->u32TspEvt = 0;
12989
12990 //first time to create process event id
12991 if(pDmxTspIoSig->s32KerModeTspEvtId == -1)
12992 {
12993 pDmxTspIoSig->u32DmxEvt = 0;
12994 if(MDrv_TSP_Create_IoSignal((DrvTSP_IoSignal*)pDmxTspIoSig) != DRVTSP_OK)
12995 return DMX_FILTER_STATUS_ERROR;
12996 else
12997 return DMX_FILTER_STATUS_OK;
12998 }
12999
13000 //When user mode callback thread end, delete event
13001 if(pDmxTspIoSig->u32EvtWaitOpt == 0xFFFFFFFF)
13002 {
13003 pDmxTspIoSig->u32DmxEvt = 0;
13004 if(MDrv_TSP_Close_IoSignal((DrvTSP_IoSignal*)pDmxTspIoSig) != DRVTSP_OK)
13005 return DMX_FILTER_STATUS_ERROR;
13006 else
13007 return DMX_FILTER_STATUS_OK;
13008 }
13009
13010 if((Res = MDrv_TSP_Wait_IoSignal((DrvTSP_IoSignal*)pDmxTspIoSig)) != DRVTSP_OK)
13011 {
13012 pDmxTspIoSig->u32DmxEvt = 0;
13013
13014 if(Res == DRVTSP_FUNC_ERROR)
13015 return DMX_FILTER_STATUS_ERROR;
13016 else
13017 return DMX_FILTER_STATUS_OK;
13018 }
13019
13020 MDrv_TSP_Proc_IoSignal((DrvTSP_IoSignal*)pDmxTspIoSig);
13021
13022 pDmxTspIoSig->u32DmxEvt = 0;
13023 if(pDmxTspIoSig->u32PvrBufFullFlag[0] == 0xFF)
13024 {
13025 pDmxTspIoSig->u32DmxEvt |= DMX_EVENT_PVR1BUF_FULL;
13026 }
13027 else if(pDmxTspIoSig->u32PvrBufFullFlag[0] > 0)
13028 {
13029 pDmxTspIoSig->u32DmxEvt |= DMX_EVENT_PVRBUF_FULL;
13030 }
13031
13032 if(pDmxTspIoSig->u32TspEvt & TSP_TASK_EVENT_SECTION_SELF)
13033 {
13034 pDmxTspIoSig->u32DmxEvt |= (DMX_EVENT_DATA_READY|DMX_EVENT_SEC_CRCERROR|DMX_EVENT_BUF_OVERFLOW);
13035 }
13036
13037 pDmxTspIoSig->u32TspEvt &= ~TSP_TASK_EVENT_FLT_FREE;
13038
13039 return DMX_FILTER_STATUS_OK;
13040 }
13041
13042 //-------------------------------------------------------------------------------------------------
13043 /// Set DMAOUT VC to TSIO service
13044 /// @param u16Handle \b IN: Service handle ID
13045 /// @param eSet \b IN: Sgdma out param setting
13046 /// @return DMX_FILTER_STATUS
13047 /// @note
13048 //-------------------------------------------------------------------------------------------------
13049 DMX_FILTER_STATUS _MApi_DMX_TSIO_Service_SetDMAoutVC(MS_U16 u16Handle, TSIO_DMAOUT_SET *eSet)
13050 {
13051 #ifdef TSIO_ENABLE
13052
13053 if (MDrv_TSIO_Service_SetDMAoutVC(u16Handle, (DRVTSIO_DMAOUT_SET*)eSet)!= DRVTSIO_OK)
13054 {
13055 return DMX_FILTER_STATUS_ERROR;
13056 }
13057
13058 return DMX_FILTER_STATUS_OK;
13059
13060 #else
13061
13062 return DMX_FILTER_STATUS_ERROR;
13063
13064 #endif
13065 }
13066
13067 //-------------------------------------------------------------------------------------------------
13068 /// Get DMAOUT VC write address
13069 /// @param u16Handle \b IN: Service handle ID
13070 /// @param pphyWrite \b OUT: dma out write address
13071 /// @return DMX_FILTER_STATUS
13072 /// @note
13073 //-------------------------------------------------------------------------------------------------
13074 DMX_FILTER_STATUS _MApi_DMX_TSIO_Service_DMAout_WriteGet(MS_U16 u16Handle, MS_PHY* pphyWrite)
13075 {
13076 #ifdef TSIO_ENABLE
13077
13078 if (MDrv_TSIO_Service_DMAout_WriteGet(u16Handle, pphyWrite)!= DRVTSIO_OK)
13079 {
13080 return DMX_FILTER_STATUS_ERROR;
13081 }
13082
13083 return DMX_FILTER_STATUS_OK;
13084
13085 #else
13086
13087 return DMX_FILTER_STATUS_ERROR;
13088
13089 #endif
13090 }
13091
13092 //-------------------------------------------------------------------------------------------------
13093 /// Set destination to TSIO service
13094 /// @param u16Handle \b IN: Service handle ID
13095 /// @param eSet \b IN: Sgdma out param setting
13096 /// @return DMX_FILTER_STATUS
13097 /// @note
13098 //-------------------------------------------------------------------------------------------------
13099 DMX_FILTER_STATUS _MApi_DMX_TSIO_Service_SetDestination(MS_U16 u16Handle, TSIO_SERVICEDEST eDest)
13100 {
13101 #ifdef TSIO_ENABLE
13102
13103 DRVTSIO_SERVICEDEST edrvDest;
13104 switch (eDest)
13105 {
13106 case E_TSIO_SERVICEDEST_LIVE:
13107 edrvDest = E_DRVTSIO_SERVICEDEST_LIVE;
13108 break;
13109
13110 case E_TSIO_SERVICEDEST_DMA:
13111 edrvDest = E_DRVTSIO_SERVICEDEST_DMA;
13112 break;
13113
13114 default:
13115 return DMX_FILTER_STATUS_ERROR;
13116 }
13117
13118 if (MDrv_TSIO_Service_SetDestination(u16Handle, edrvDest)!= DRVTSIO_OK)
13119 {
13120 return DMX_FILTER_STATUS_ERROR;
13121 }
13122
13123 return DMX_FILTER_STATUS_OK;
13124
13125 #else
13126
13127 return DMX_FILTER_STATUS_ERROR;
13128
13129 #endif
13130 }
13131
13132 //-------------------------------------------------------------------------------------------------
13133 /// Set DMAIN Virture channel to TSIO service
13134 /// @param u16Handle \b IN: Service handle ID
13135 /// @param eSet \b IN: Sgdma in param setting
13136 /// @return DMX_FILTER_STATUS
13137 /// @note
13138 //-------------------------------------------------------------------------------------------------
13139 DMX_FILTER_STATUS _MApi_DMX_TSIO_Service_SetDMAinVC(MS_U16 u16Handle, TSIO_DMAIN_SET *eSet)
13140 {
13141 #ifdef TSIO_ENABLE
13142
13143 if (MDrv_TSIO_Service_SetDMAinVC(u16Handle, (DRVTSIO_DMAIN_SET*)eSet)!= DRVTSIO_OK)
13144 {
13145 return DMX_FILTER_STATUS_ERROR;
13146 }
13147
13148 return DMX_FILTER_STATUS_OK;
13149
13150 #else
13151
13152 return DMX_FILTER_STATUS_ERROR;
13153
13154 #endif
13155 }
13156
13157 //-------------------------------------------------------------------------------------------------
13158 /// start DMAIN Virture channel
13159 /// @param u16Handle \b IN: Service handle ID
13160 /// @param u32Pacing \b IN: Sgdma in pacing rate
13161 /// @return TSIO_Result
13162 /// @note
13163 //-------------------------------------------------------------------------------------------------
13164 DMX_FILTER_STATUS _MApi_DMX_TSIO_Service_DMAinVC_Start(MS_U16 u16Handle, MS_U32 u32Pacing)
13165 {
13166 #ifdef TSIO_ENABLE
13167
13168 if (MDrv_TSIO_Service_DMAinVC_Start(u16Handle, u32Pacing)!= DRVTSIO_OK)
13169 {
13170 return DMX_FILTER_STATUS_ERROR;
13171 }
13172
13173 return DMX_FILTER_STATUS_OK;
13174
13175 #else
13176
13177 return DMX_FILTER_STATUS_ERROR;
13178
13179 #endif
13180 }
13181
13182 //-------------------------------------------------------------------------------------------------
13183 /// Set Locdecrypt key to TSIO service
13184 /// @param u16Handle \b IN: Service handle ID
13185 /// @param eSet \b IN: Pointer to store loc decrypt key address
13186 /// @return DMX_FILTER_STATUS
13187 /// @note
13188 //-------------------------------------------------------------------------------------------------
13189 DMX_FILTER_STATUS _MApi_DMX_TSIO_Service_SetLocdecKey(MS_U16 u16Handle, TSIO_LOCKEY_SET *eSet)
13190 {
13191 #ifdef TSIO_ENABLE
13192
13193 if (eSet->bEvenkeyenable &&
13194 MDrv_TSIO_Service_SetLocdecKey(u16Handle, eSet->u8Evenkey, eSet->u16Evenkeylen, FALSE)!= DRVTSIO_OK)
13195 {
13196 return DMX_FILTER_STATUS_ERROR;
13197 }
13198
13199 if (eSet->bOddkeyenable &&
13200 MDrv_TSIO_Service_SetLocdecKey(u16Handle, eSet->u8Oddkey, eSet->u16Oddkeylen, TRUE)!= DRVTSIO_OK)
13201 {
13202 return DMX_FILTER_STATUS_ERROR;
13203 }
13204
13205 return DMX_FILTER_STATUS_OK;
13206
13207 #else
13208
13209 return DMX_FILTER_STATUS_ERROR;
13210
13211 #endif
13212 }
13213
13214 //-------------------------------------------------------------------------------------------------
13215 /// Enable/disable locdec key
13216 /// @param u16Handle \b IN: Service handle ID
13217 /// @param bEnable \b IN: Enable locdec key
13218 /// @return TSIO_Result
13219 /// @note
13220 //-------------------------------------------------------------------------------------------------
13221 DMX_FILTER_STATUS _MApi_DMX_TSIO_Service_LocdecKeyEnable(MS_U16 u16Handle, MS_BOOL bEnable)
13222 {
13223 #ifdef TSIO_ENABLE
13224
13225 if (MDrv_TSIO_Service_LocdecKeyEnable(u16Handle, bEnable)!= DRVTSIO_OK)
13226 {
13227 return DMX_FILTER_STATUS_ERROR;
13228 }
13229
13230 return DMX_FILTER_STATUS_OK;
13231
13232 #else
13233
13234 return DMX_FILTER_STATUS_ERROR;
13235
13236 #endif
13237 }
13238
13239 //-------------------------------------------------------------------------------------------------
13240 /// TSIO input pid filter open.
13241 /// @param u16Handle \b IN: Service handle ID
13242 /// @param eTSOInSrc \b IN: TSIO PID filter source
13243 /// @param u16Pid \b IN: PID value of TSO PID filter
13244 /// @param pu16DmxId \b OUT: Pointer to store PID filter ID
13245 /// @return DMX_FILTER_STATUS
13246 /// @note
13247 //-------------------------------------------------------------------------------------------------
13248 DMX_FILTER_STATUS _MApi_DMX_TSIO_Service_PidOpen(MS_U16 u16Handle, DMX_TSIF eTSOInSrc, MS_U16 u16Pid, MS_U16* pu16DmxId)
13249 {
13250 #ifdef TSIO_ENABLE
13251
13252 DrvTSO_If eTsoif = E_DRVTSO_IF_LIVE0;
13253 MS_U8 u8Sid = 0xFF;
13254 switch(eTSOInSrc)
13255 {
13256 case DMX_TSIF_LIVE0:
13257 eTsoif = E_DRVTSO_IF_LIVE0;
13258 break;
13259 case DMX_TSIF_LIVE1:
13260 eTsoif = E_DRVTSO_IF_LIVE1;
13261 break;
13262 case DMX_TSIF_LIVE2:
13263 eTsoif = E_DRVTSO_IF_LIVE2;
13264 break;
13265 case DMX_TSIF_LIVE3:
13266 eTsoif = E_DRVTSO_IF_LIVE3;
13267 break;
13268 case DMX_TSIF_FILE0:
13269 eTsoif = E_DRVTSO_IF_FILE0;
13270 break;
13271 case DMX_TSIF_FILE1:
13272 eTsoif = E_DRVTSO_IF_FILE1;
13273 break;
13274 default:
13275 return DMX_FILTER_STATUS_ERROR;
13276 }
13277
13278 _DMX_TSO_ENTRY();
13279
13280 if (MDrv_TSIO_Service_GetSid(u16Handle, &u8Sid)!= DRVTSIO_OK)
13281 {
13282 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
13283 }
13284 if(MDrv_TSO_PidFlt_Alloc(0, pu16DmxId) != DRVTSO_OK)
13285 {
13286 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
13287 }
13288 if(MDrv_TSO_PidFlt_SetPid(0, *pu16DmxId, u16Pid) != DRVTSO_OK)
13289 {
13290 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
13291 }
13292 if(MDrv_TSO_PidFlt_SetChSrc(0, *pu16DmxId, eTsoif) != DRVTSO_OK)
13293 {
13294 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
13295 }
13296 if(MDrv_TSO_PidFlt_SetSid(0, *pu16DmxId, u8Sid) != DRVTSO_OK)
13297 {
13298 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
13299 }
13300 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
13301
13302 #else
13303
13304 return DMX_FILTER_STATUS_ERROR;
13305
13306 #endif
13307 }
13308
13309 //-------------------------------------------------------------------------------------------------
13310 /// TSIO input pid filter close.
13311 /// @param u16Handle \b IN: Service handle ID
13312 /// @param u16DmxId \b IN: TSO PID filter source
13313 /// @return DMX_FILTER_STATUS
13314 /// @note
13315 //-------------------------------------------------------------------------------------------------
13316 DMX_FILTER_STATUS _MApi_DMX_TSIO_Service_PidClose(MS_U16 u16Handle, MS_U16 u16DmxId)
13317 {
13318 #ifdef TSIO_ENABLE
13319
13320 _DMX_TSO_ENTRY();
13321 if(MDrv_TSO_PidFlt_Free(0, u16DmxId) != DRVTSO_OK)
13322 {
13323 _DMX_TSO_RETURN(DMX_FILTER_STATUS_ERROR);
13324 }
13325 _DMX_TSO_RETURN(DMX_FILTER_STATUS_OK);
13326
13327 #else
13328
13329 return DMX_FILTER_STATUS_ERROR;
13330
13331 #endif
13332 }
13333
13334 //-------------------------------------------------------------------------------------------------
13335 /// Allocate TSIO service
13336 /// @param u8Sid \b IN: Service ID
13337 /// @param u16Handle \b OUT: pointer of service handle for return
13338 /// @return DMX_FILTER_STATUS
13339 /// @note
13340 //-------------------------------------------------------------------------------------------------
13341 DMX_FILTER_STATUS _MApi_DMX_TSIO_Service_Alloc(MS_U8 u8Sid, MS_U16 *u16Handle)
13342 {
13343 #ifdef TSIO_ENABLE
13344
13345 if (MDrv_TSIO_Service_Alloc(u16Handle) != DRVTSIO_OK)
13346 {
13347 return DMX_FILTER_STATUS_ERROR;
13348 }
13349
13350 if (MDrv_TSIO_Service_SetSid(*u16Handle, u8Sid) != DRVTSIO_OK)
13351 {
13352 return DMX_FILTER_STATUS_ERROR;
13353 }
13354
13355 return DMX_FILTER_STATUS_OK;
13356
13357 #else
13358
13359 return DMX_FILTER_STATUS_ERROR;
13360
13361 #endif
13362 }
13363
13364 //-------------------------------------------------------------------------------------------------
13365 /// Free TSIO service
13366 /// @param u16Handle \b IN: Service handle ID
13367 /// @return DMX_FILTER_STATUS
13368 /// @note
13369 //-------------------------------------------------------------------------------------------------
13370 DMX_FILTER_STATUS _MApi_DMX_TSIO_Service_Free(MS_U16 u16Handle)
13371 {
13372 #ifdef TSIO_ENABLE
13373
13374 if (MDrv_TSIO_Service_Free(u16Handle) != DRVTSIO_OK)
13375 {
13376 return DMX_FILTER_STATUS_ERROR;
13377 }
13378
13379 return DMX_FILTER_STATUS_OK;
13380
13381 #else
13382
13383 return DMX_FILTER_STATUS_ERROR;
13384
13385 #endif
13386 }
13387
13388 //-------------------------------------------------------------------------------------------------
13389 /// Register TSIO callback function
13390 /// @param TSIOIntTypeCB \b IN: Callback function pointer
13391 /// @return DMX_FILTER_STATUS
13392 /// @note
13393 //-------------------------------------------------------------------------------------------------
13394 DMX_FILTER_STATUS _MApi_DMX_TSIO_RegisterIntCb(TSIOIntTypeCB efn)
13395 {
13396 #ifdef TSIO_ENABLE
13397
13398 if (MDrv_TSIO_RegisterIntCb((TSIOIntCB)efn) != DRVTSIO_OK)
13399 {
13400 return DMX_FILTER_STATUS_ERROR;
13401 }
13402
13403 return DMX_FILTER_STATUS_OK;
13404
13405 #else
13406
13407 return DMX_FILTER_STATUS_ERROR;
13408
13409 #endif
13410 }
13411
13412 //-------------------------------------------------------------------------------------------------
13413 /// Init TSIO
13414 /// @param eParm \b IN: init param
13415 /// @return DMX_FILTER_STATUS
13416 /// @note
13417 /// It should be called before calling any TSIO API.
13418 //-------------------------------------------------------------------------------------------------
13419 DMX_FILTER_STATUS _MApi_DMX_TSIO_Init(TSIO_Init_Set *eParm)
13420 {
13421 #ifdef TSIO_ENABLE
13422
13423 if (MDrv_TSIO_Init() != DRVTSIO_OK)
13424 {
13425 return DMX_FILTER_STATUS_ERROR;
13426 }
13427
13428 if (MDrv_TSIO_SGDMAIN_LastPktBuf_Set(eParm->phyLastpktBufAddr, eParm->u32LastpktBufSize) != DRVTSIO_OK)
13429 {
13430 return DMX_FILTER_STATUS_ERROR;
13431 }
13432
13433 if (MDrv_TSIO_SGDMAIN_SGVQBuf_Set(eParm->phyDMAVQBufAddr, eParm->u32DMAVQBufSize) != DRVTSIO_OK)
13434 {
13435 return DMX_FILTER_STATUS_ERROR;
13436 }
13437
13438 if (MDrv_TSIO_SGDMAIN_NodeBuf_Set(eParm->phyDMAinNodeAddr, eParm->u32DMAinNodeSize) != DRVTSIO_OK)
13439 {
13440 return DMX_FILTER_STATUS_ERROR;
13441 }
13442
13443 if (MDrv_TSIO_SGDMAOUT_NodeBuf_Set(eParm->phyDMAoutNodeAddr, eParm->u32DMAoutNodeSize) != DRVTSIO_OK)
13444 {
13445 return DMX_FILTER_STATUS_ERROR;
13446 }
13447
13448 return DMX_FILTER_STATUS_OK;
13449
13450 #else
13451
13452 return DMX_FILTER_STATUS_ERROR;
13453
13454 #endif
13455 }
13456
13457 //-------------------------------------------------------------------------------------------------
13458 /// Open TSIO
13459 /// @param eClk \b IN: smc clk speed
13460 /// @return DMX_FILTER_STATUS
13461 /// @note
13462 //-------------------------------------------------------------------------------------------------
13463 DMX_FILTER_STATUS _MApi_DMX_TSIO_Open(TSIO_CLK eClk)
13464 {
13465 #ifdef TSIO_ENABLE
13466
13467 DRVTSIO_CLK drvclk = DRVTSIO_CLK_200M;
13468
13469 switch (eClk)
13470 {
13471 default:
13472 case TSIO_CLK_200M:
13473 drvclk = DRVTSIO_CLK_200M;
13474 break;
13475
13476 case TSIO_CLK_100M:
13477 drvclk = DRVTSIO_CLK_100M;
13478 break;
13479
13480 case TSIO_CLK_50M:
13481 drvclk = DRVTSIO_CLK_50M;
13482 break;
13483
13484 case TSIO_CLK_25M:
13485 drvclk = DRVTSIO_CLK_25M;
13486 break;
13487 }
13488
13489 if (MDrv_TSIO_Open(drvclk) != DRVTSIO_OK)
13490 {
13491 return DMX_FILTER_STATUS_ERROR;
13492 }
13493
13494 return DMX_FILTER_STATUS_OK;
13495
13496 #else
13497
13498 return DMX_FILTER_STATUS_ERROR;
13499
13500 #endif
13501 }
13502
13503 //-------------------------------------------------------------------------------------------------
13504 /// Send ctrl command to TSIO
13505 /// @param eCmd \b IN: Command
13506 /// @param u32Value \b IN: Commnad's param
13507 /// @return DMX_FILTER_STATUS
13508 /// @note
13509 //-------------------------------------------------------------------------------------------------
13510 DMX_FILTER_STATUS _MApi_DMX_TSIO_Cmd(TSIO_CMD eCmd, MS_U32 u32Value)
13511 {
13512 #ifdef TSIO_ENABLE
13513
13514 switch (eCmd)
13515 {
13516 case TSIO_CMD_BYPASSSMC:
13517 if (MDrv_TSIO_BypassSMC_Set((MS_U8)u32Value) != DRVTSIO_OK)
13518 {
13519 return DMX_FILTER_STATUS_ERROR;
13520 }
13521 break;
13522
13523 case TSIO_CMD_STUFFINGSID:
13524 if (MDrv_TSIO_StuffingSID_Set(u32Value) != DRVTSIO_OK)
13525 {
13526 return DMX_FILTER_STATUS_ERROR;
13527 }
13528 break;
13529
13530 case TSIO_CMD_LOCDECRYPT:
13531 if (MDrv_TSIO_LocDecrypt_Set((MS_BOOL)u32Value) != DRVTSIO_OK)
13532 {
13533 return DMX_FILTER_STATUS_ERROR;
13534 }
13535 break;
13536
13537 case TSIO_CMD_SYNCTHRESHOLD:
13538 if (MDrv_TSIO_Syncthreshold_Set((MS_U8)u32Value) != DRVTSIO_OK)
13539 {
13540 return DMX_FILTER_STATUS_ERROR;
13541 }
13542 break;
13543
13544 case TSIO_CMD_DBGLEVEL:
13545 if (MDrv_TSIO_SetDbgLevel((DRVTSIO_DBGLEVEL)u32Value) != DRVTSIO_OK)
13546 {
13547 return DMX_FILTER_STATUS_ERROR;
13548 }
13549 break;
13550
13551
13552 case TSIO_CMD_PHASE_ADJUST:
13553 if (MDrv_TSIO_Analogphase_adj() != DRVTSIO_OK)
13554 {
13555 return DMX_FILTER_STATUS_ERROR;
13556 }
13557 break;
13558
13559 case TSIO_CMD_BITTRAINING_ADJUST:
13560 if (MDrv_TSIO_Analogphase_adj_bittraining((MS_U8)u32Value) != DRVTSIO_OK)
13561 {
13562 return DMX_FILTER_STATUS_ERROR;
13563 }
13564 break;
13565
13566 default:
13567 return DMX_FILTER_STATUS_NOT_SUPPORT;
13568
13569 }
13570
13571 return DMX_FILTER_STATUS_OK;
13572
13573 #else
13574
13575 return DMX_FILTER_STATUS_ERROR;
13576
13577 #endif
13578 }
13579
13580 //-------------------------------------------------------------------------------------------------
13581 /// Exit TSIO
13582 /// @return DMX_FILTER_STATUS
13583 /// @note
13584 //-------------------------------------------------------------------------------------------------
13585 DMX_FILTER_STATUS _MApi_DMX_TSIO_Exit(void)
13586 {
13587 #ifdef TSIO_ENABLE
13588
13589 if (MDrv_TSIO_Exit() != DRVTSIO_OK)
13590 {
13591 return DMX_FILTER_STATUS_ERROR;
13592 }
13593
13594 return DMX_FILTER_STATUS_OK;
13595
13596 #else
13597
13598 return DMX_FILTER_STATUS_ERROR;
13599
13600 #endif
13601 }
13602
13603 //-------------------------------------------------------------------------------------------------
13604 /// Close TSIO
13605 /// @return DMX_FILTER_STATUS
13606 /// @note
13607 //-------------------------------------------------------------------------------------------------
13608 DMX_FILTER_STATUS _MApi_DMX_TSIO_Close(void)
13609 {
13610 #ifdef TSIO_ENABLE
13611
13612 if (MDrv_TSIO_Close() != DRVTSIO_OK)
13613 {
13614 return DMX_FILTER_STATUS_ERROR;
13615 }
13616
13617 return DMX_FILTER_STATUS_OK;
13618
13619 #else
13620
13621 return DMX_FILTER_STATUS_ERROR;
13622
13623 #endif
13624 }
13625
13626 //-------------------------------------------------------------------------------------------------
13627 /// Send and Recv C&C haed-based cmd
13628 /// @param Parm \b IN: Pointer to store C&C cmd address
13629 /// @param pResult \b IN: Pointer to store result status
13630 /// @return DMX_FILTER_STATUS
13631 /// @note
13632 //-------------------------------------------------------------------------------------------------
13633 DMX_FILTER_STATUS _MApi_DMX_TSIO_CC(TSIO_CC_Set *Parm, TSIO_CC_RESULT* pResult)
13634 {
13635 #ifdef TSIO_ENABLE
13636
13637 MS_U16 u16RxErrStatus = 0;
13638
13639 if (pResult == NULL)
13640 {
13641 return DMX_FILTER_STATUS_ERROR;
13642 }
13643
13644 if (Parm == NULL)
13645 {
13646 *pResult = TSIO_CC_RESULT_NORESULT;
13647 return DMX_FILTER_STATUS_ERROR;
13648 }
13649
13650 if (Parm->pIn == NULL || Parm->pOut == NULL || Parm->pOutLen == NULL)
13651 {
13652 *pResult = TSIO_CC_RESULT_NORESULT;
13653 return DMX_FILTER_STATUS_ERROR;
13654 }
13655
13656 //check input format
13657 if (Parm->u16InLen < TSIO_CC_CMD_MIN_LEN)
13658 {
13659 *pResult = TSIO_CC_RESULT_TXCMD_TOOSMALL;
13660 return DMX_FILTER_STATUS_ERROR;
13661 }
13662
13663 if (Parm->u16InLen > TSIO_CC_CMD_MAX_LEN)
13664 {
13665 *pResult = TSIO_CC_RESULT_TXCMD_TOOBIG;
13666 return DMX_FILTER_STATUS_ERROR;
13667 }
13668
13669 *pResult = TSIO_CC_RESULT_OK;
13670
13671
13672 //Send CC CMD
13673 if (MDrv_TSIO_CC_SendCmd(Parm->pIn, Parm->u16InLen) != DRVTSIO_OK)
13674 {
13675 *pResult = TSIO_CC_RESULT_TXCMD_TIMEOUT;
13676 goto FAIL;
13677 }
13678
13679 //Receive CC CMD
13680 if (MDrv_TSIO_CC_ReceiveIntStatus(Parm->u32Timeout, &u16RxErrStatus) != DRVTSIO_OK)
13681 {
13682 *pResult = TSIO_CC_RESULT_RXCMD_TIMEOUT;
13683 goto FAIL;
13684 }
13685
13686 if (u16RxErrStatus & TSIO_CC_CMD_ERR_STATUS_MASK)
13687 {
13688 *pResult = TSIO_CC_RESULT_ERR_FLAG;
13689 goto FAIL;
13690 }
13691
13692 if (MDrv_TSIO_CC_ReceiveCmd(Parm->pOut, Parm->pOutLen) != DRVTSIO_OK)
13693 {
13694 if (*(Parm->pOutLen) < TSIO_CC_CMD_MIN_LEN)
13695 {
13696 *pResult = TSIO_CC_RESULT_RXCMD_TOOSMALL;
13697 goto FAIL;
13698 }
13699
13700 if (*(Parm->pOutLen) > TSIO_CC_CMD_MAX_LEN)
13701 {
13702 *pResult = TSIO_CC_RESULT_RXCMD_TOOBIG;
13703 goto FAIL;
13704 }
13705 }
13706
13707 FAIL:
13708 if (*pResult != TSIO_CC_RESULT_OK)
13709 return DMX_FILTER_STATUS_ERROR;
13710
13711 return DMX_FILTER_STATUS_OK;
13712 #else
13713
13714 return DMX_FILTER_STATUS_ERROR;
13715
13716 #endif
13717 }
13718
13719 //-------------------------------------------------------------------------------------------------
13720 /// Get TSIO informaiton
13721 /// @param eInfo \b IN: Info type
13722 /// @param u32Arg \b IN: detail value
13723 /// @param u32Retinfo \b OUT: Pointer to store Info address
13724 /// @return DMX_FILTER_STATUS
13725 /// @note
13726 //-------------------------------------------------------------------------------------------------
13727 DMX_FILTER_STATUS _MApi_DMX_TSIO_GetInfo(TSIO_INFO eInfo , MS_U32 u32Arg, MS_U32 *u32Retinfo)
13728 {
13729 #ifdef TSIO_ENABLE
13730 DRVTSIO_INFO drvInfo = DRVTSIO_INFO_MAX;
13731 switch (eInfo)
13732 {
13733 case TSIO_INFO_LOSELOCKCNT:
13734 drvInfo = DRVTSIO_INFO_LOSELOCKCNT;
13735 break;
13736
13737 case TSIO_INFO_USEBUFLEN:
13738 drvInfo = DRVTSIO_INFO_USEBUFLEN;
13739 break;
13740
13741 default:
13742 return DMX_FILTER_STATUS_ERROR;
13743 }
13744
13745 if (MDrv_TSIO_GetInfo(drvInfo, u32Arg, u32Retinfo) != DRVTSIO_OK)
13746 {
13747 return DMX_FILTER_STATUS_ERROR;
13748 }
13749
13750 return DMX_FILTER_STATUS_OK;
13751
13752 #else
13753
13754 return DMX_FILTER_STATUS_ERROR;
13755
13756 #endif
13757 }
13758
13759 DMX_FILTER_STATUS _MApi_DMX_TSIO_WaitIoSignal(DMX_TSIO_IOSIGNAL *pDmxTsioIoSig)
13760 {
13761 #ifdef TSIO_ENABLE
13762
13763 TSIO_Result Res;
13764 DRVTSIO_IOSIGNAL DrvIoSig;
13765
13766 if((Res = MDrv_TSIO_Wait_IoSignal(&DrvIoSig)) != DRVTSIO_OK)
13767 {
13768 if(Res == DRVTSIO_FUNC_ERROR)
13769 return DMX_FILTER_STATUS_ERROR;
13770 else
13771 return DMX_FILTER_STATUS_OK;
13772 }
13773
13774 pDmxTsioIoSig->u32Event = DrvIoSig.u32Event;
13775 pDmxTsioIoSig->u64DmainInt = DrvIoSig.u64DmainInt;
13776 pDmxTsioIoSig->u64DmaoutInt[0] = DrvIoSig.u64DmaoutInt[0];
13777 pDmxTsioIoSig->u64DmaoutInt[1] = DrvIoSig.u64DmaoutInt[1];
13778 pDmxTsioIoSig->u64DmaoutInt[2] = DrvIoSig.u64DmaoutInt[2];
13779 pDmxTsioIoSig->u64DmaoutInt[3] = DrvIoSig.u64DmaoutInt[3];
13780
13781 return DMX_FILTER_STATUS_OK;
13782
13783 #else
13784
13785 return DMX_FILTER_STATUS_ERROR;
13786
13787 #endif
13788 }
13789
13790 #ifdef CONFIG_UTOPIA_PROC_DBG_SUPPORT
13791 char* _DMX_Str_Tok(char* pstrSrc, char* pstrDes, char delimit)
13792 {
13793 char *pstrRes = pstrSrc;
13794 int i = 0;
13795
13796 *pstrDes = '\0';
13797
13798 if(pstrSrc == NULL)
13799 return NULL;
13800
13801 while(*pstrRes != '\0')
13802 {
13803 if((*pstrRes == delimit) || (*pstrRes == ' '))
13804 break;
13805 *pstrDes++ = *pstrRes++;
13806 }
13807 *pstrDes = '\0';
13808
13809 return (pstrRes + 1);
13810 }
13811
13812 int _DMX_StrToInt(char* pstrSrc)
13813 {
13814 int iRes = 0;
13815 char *pstrRes = pstrSrc;
13816
13817 while(*pstrRes != '\0')
13818 {
13819 iRes *= 10;
13820 iRes += (int)((*pstrRes++) - '0');
13821 }
13822
13823 return iRes;
13824 }
13825
13826 static MS_BOOL _DMX_DBG_GetPidFltInfo(MS_U64* pu64ReqHdl)
13827 {
13828 MS_U32 u32PidFltNum = 0, u32ii;
13829 DMX_FILTER_TYPE flttype;
13830 const char strType[][16] = {"VD", "AU", "AU2", "Sec", "Pes", "Pkt", "Pcr", "TTX", "V3D", "AU3", "AU4", "Rec", "ScmChk",
13831 "Sec_VerChk", "VD3", "VD4", "Pvr1", "Pvr2", "Pvr3", "Pvr4", "Pvr5", "Pvr6", "Pvr7", "Pvr8", "Pvr9"};
13832
13833 if(_MApi_DMX_GetCap(DMX_CAP_PID_FILTER_NUM, &u32PidFltNum) != DMX_FILTER_STATUS_OK)
13834 {
13835 MdbPrint(pu64ReqHdl,"[%d]DBG CMD Error!!!\n", __LINE__);
13836 }
13837 MdbPrint(pu64ReqHdl,"DMX PID Filter Num: %d\n", (int)u32PidFltNum);
13838 MdbPrint(pu64ReqHdl,"Id PID TS_Src Type Src_Id Sec_Flt_Id \n");
13839 MdbPrint(pu64ReqHdl,"====================================================================\n");
13840
13841 for(u32ii = 0; u32ii < u32PidFltNum; u32ii++)
13842 {
13843 MdbPrint(pu64ReqHdl, "%d %x ", (int)u32ii, (int)_pdmx_res->_FltList[u32ii].u16Pid);
13844 switch(_pdmx_res->_FltList[u32ii].DmxFltType & DMX_FILTER_SOURCE_TYPE_MASK)
13845 {
13846 case DMX_FILTER_SOURCE_TYPE_LIVE:
13847 MdbPrint(pu64ReqHdl, "Live0 ");
13848 break;
13849 case DMX_FILTER_SOURCE_TYPE_FILE:
13850 MdbPrint(pu64ReqHdl, "File0 ");
13851 break;
13852 case DMX_FILTER_SOURCE_TYPE_TS1:
13853 MdbPrint(pu64ReqHdl, "Live1 ");
13854 break;
13855 case DMX_FILTER_SOURCE_TYPE_TS2:
13856 MdbPrint(pu64ReqHdl, "Live2 ");
13857 break;
13858 case DMX_FILTER_SOURCE_TYPE_TS3:
13859 MdbPrint(pu64ReqHdl, "Live3 ");
13860 break;
13861 case DMX_FILTER_SOURCE_TYPE_FILE1:
13862 MdbPrint(pu64ReqHdl, "File1 ");
13863 break;
13864 case DMX_FILTER_SOURCE_TYPE_FILE2:
13865 MdbPrint(pu64ReqHdl, "File2 ");
13866 break;
13867 case DMX_FILTER_SOURCE_TYPE_FILE3:
13868 MdbPrint(pu64ReqHdl, "File3 ");
13869 break;
13870 default:
13871 MdbPrint(pu64ReqHdl, "Unknown ");
13872 break;
13873 }
13874
13875 flttype = _pdmx_res->_FltList[u32ii].DmxFltType & ~(DMX_FILTER_SOURCE_TYPE_MASK|DMX_FILTER_SOURCEID_MASK);
13876 if(flttype <= DMX_FILTER_TYPE_PVR9)
13877 {
13878 MdbPrint(pu64ReqHdl, " %s ", &(strType[flttype][0]));
13879 }
13880 else
13881 {
13882 MdbPrint(pu64ReqHdl, " Unknown ");
13883 }
13884 flttype = _pdmx_res->_FltList[u32ii].DmxFltType & DMX_FILTER_SOURCEID_MASK;
13885 MdbPrint(pu64ReqHdl, " %x %x \n", (int)flttype, (int)_pdmx_res->_FltList[u32ii].SecBufId);
13886 }
13887
13888 return TRUE;
13889 }
13890
13891 static MS_BOOL _DMX_DBG_GetSecFltInfo(MS_U64* pu64ReqHdl, int StarId, int EndId)
13892 {
13893 MS_U32 u32SecFltNum = 0, u32ii, u32jj = 0, u32Size = 0;
13894 DMX_Sect_info* secinfo;
13895 MS_PHY phyStart = 0, phyEnd = 0, phyRead = 0, phyWrite = 0;
13896 MS_U8 u8Match[DRVTSP_FILTER_DEPTH], u8Mask[DRVTSP_FILTER_DEPTH], u8NMask[DRVTSP_FILTER_DEPTH];
13897
13898 if(_MApi_DMX_GetCap(DMX_CAP_SEC_FILTER_NUM, &u32SecFltNum) != DMX_FILTER_STATUS_OK)
13899 {
13900 MdbPrint(pu64ReqHdl,"[%d]DBG CMD Error!!!\n", __LINE__);
13901 }
13902 MdbPrint(pu64ReqHdl,"DMX Section Filter Num: %d\n", (int)u32SecFltNum);
13903 MdbPrint(pu64ReqHdl,"Start Id: %d , End Id: %d \n", StarId, EndId);
13904 MdbPrint(pu64ReqHdl,"=======================================================================\n");
13905 MdbPrint(pu64ReqHdl,"Id Mode Buf_Addr Buf_Size \n");
13906 MdbPrint(pu64ReqHdl,"Start End Read Write \n");
13907 MdbPrint(pu64ReqHdl,"Match \n");
13908 MdbPrint(pu64ReqHdl,"Mask \n");
13909 MdbPrint(pu64ReqHdl,"=======================================================================\n");
13910
13911 if(EndId >= u32SecFltNum)
13912 EndId = u32SecFltNum - 1;
13913 for(u32ii = StarId; u32ii <= EndId; u32ii++)
13914 {
13915 secinfo = &(_pdmx_res->_FltList[u32ii].FltInfo.Info.SectInfo);
13916 MdbPrint(pu64ReqHdl, "%d ", (int)u32ii);
13917 switch(secinfo->SectMode)
13918 {
13919 case DMX_SECT_MODE_CONTI:
13920 MdbPrint(pu64ReqHdl, "Cont ");
13921 break;
13922 case DMX_SECT_MODE_ONESHOT:
13923 MdbPrint(pu64ReqHdl, "OneShot ");
13924 break;
13925 case DMX_SECT_MODE_CRCCHK:
13926 MdbPrint(pu64ReqHdl, "CrcChk/Cont ");
13927 break;
13928 case DMX_SECT_MODE_PESSCMCHK:
13929 MdbPrint(pu64ReqHdl, "PesScmChk ");
13930 break;
13931 default:
13932 MdbPrint(pu64ReqHdl, "Unknown ");
13933 break;
13934 }
13935 MdbPrint(pu64ReqHdl, "%x %x \n", (int)secinfo->SectBufAddr, (int)secinfo->SectBufSize);
13936 MDrv_TSP_SecFlt_GetBufStart(0, u32ii, &phyStart);
13937 MDrv_TSP_SecFlt_GetBufSize(0, u32ii, &u32Size);
13938 MDrv_TSP_SecFlt_GetReadAddr(0, u32ii, &phyRead);
13939 MDrv_TSP_SecFlt_GetWriteAddr(0, u32ii, &phyWrite);
13940 phyEnd = phyStart + u32Size;
13941 MdbPrint(pu64ReqHdl, "%x %x %x %x \n", (int)phyStart, (int)phyEnd, (int)phyRead, (int)phyWrite);
13942 MDrv_TSP_SecFlt_GetPattern(0, u32ii, u8Match, u8Mask, u8NMask);
13943 for(u32jj = 0; u32jj < DRVTSP_FILTER_DEPTH; u32jj++)
13944 {
13945 MdbPrint(pu64ReqHdl, "%x ", u8Match[u32jj]);
13946 if(((u32jj+1) % 4) == 0)
13947 MdbPrint(pu64ReqHdl, " ");
13948 }
13949 MdbPrint(pu64ReqHdl, "\n");
13950 for(u32jj = 0; u32jj < DRVTSP_FILTER_DEPTH; u32jj++)
13951 {
13952 MdbPrint(pu64ReqHdl, "%x ", u8Mask[u32jj]);
13953 if(((u32jj+1) % 4) == 0)
13954 MdbPrint(pu64ReqHdl, " ");
13955 }
13956 MdbPrint(pu64ReqHdl,"\n--------------------------------------------------------------------\n");
13957 }
13958 MdbPrint(pu64ReqHdl, "\n");
13959
13960 return TRUE;
13961 }
13962
13963 static MS_BOOL _DMX_DBG_GetDbgTblTsSrc(char* psubcmd, DMX_DEBUG_SRC *pdbgSrc)
13964 {
13965 *pdbgSrc = DMX_DEBUG_SRC_TS0;
13966
13967 if(strncmp(psubcmd, "ts0", 3) == 0)
13968 {
13969 *pdbgSrc = DMX_DEBUG_SRC_TS0;
13970 }
13971 else if(strncmp(psubcmd, "ts1", 3) == 0)
13972 {
13973 *pdbgSrc = DMX_DEBUG_SRC_TS1;
13974 }
13975 else if(strncmp(psubcmd, "ts2", 3) == 0)
13976 {
13977 *pdbgSrc = DMX_DEBUG_SRC_TS2;
13978 }
13979 else if(strncmp(psubcmd, "ts3", 3) == 0)
13980 {
13981 *pdbgSrc = DMX_DEBUG_SRC_TS3;
13982 }
13983 else if(strncmp(psubcmd, "fi0", 3) == 0)
13984 {
13985 *pdbgSrc = DMX_DEBUG_SRC_FILE;
13986 }
13987 else if(strncmp(psubcmd, "fi1", 3) == 0)
13988 {
13989 *pdbgSrc = DMX_DEBUG_SRC_FILE1;
13990 }
13991 else if(strncmp(psubcmd, "fi2", 3) == 0)
13992 {
13993 *pdbgSrc = DMX_DEBUG_SRC_FILE2;
13994 }
13995 else if(strncmp(psubcmd, "fi3", 3) == 0)
13996 {
13997 *pdbgSrc = DMX_DEBUG_SRC_FILE3;
13998 }
13999 else if(strncmp(psubcmd, "mf0", 3) == 0)
14000 {
14001 *pdbgSrc = DMX_DEBUG_SRC_MMFI0;
14002 }
14003 else if(strncmp(psubcmd, "mf1", 3) == 0)
14004 {
14005 *pdbgSrc = DMX_DEBUG_SRC_MMFI1;
14006 }
14007 else
14008 return FALSE;
14009
14010 return TRUE;
14011 }
14012
14013 static MS_BOOL _DMX_DBG_GetDbgTblFifoSrc(char* psubcmd, DMX_DEBUG_FIFO *pdbgFifo)
14014 {
14015 *pdbgFifo = DMX_DEBUG_FIFO_VIDEO;
14016
14017 if(strncmp(psubcmd, "vd0", 3) == 0)
14018 {
14019 *pdbgFifo = DMX_DEBUG_FIFO_VIDEO;
14020 }
14021 else if(strncmp(psubcmd, "au0", 3) == 0)
14022 {
14023 *pdbgFifo = DMX_DEBUG_FIFO_AUDIO;
14024 }
14025 else if(strncmp(psubcmd, "vd1", 3) == 0)
14026 {
14027 *pdbgFifo = DMX_DEBUG_FIFO_VIDEO3D;
14028 }
14029 else if(strncmp(psubcmd, "au2", 3) == 0)
14030 {
14031 *pdbgFifo = DMX_DEBUG_FIFO_AUDIOB;
14032 }
14033 else if(strncmp(psubcmd, "au3", 3) == 0)
14034 {
14035 *pdbgFifo = DMX_DEBUG_FIFO_AUDIOC;
14036 }
14037 else if(strncmp(psubcmd, "au4", 3) == 0)
14038 {
14039 *pdbgFifo = DMX_DEBUG_FIFO_AUDIOD;
14040 }
14041 else if(strncmp(psubcmd, "au4", 3) == 0)
14042 {
14043 *pdbgFifo = DMX_DEBUG_FIFO_AUDIOD;
14044 }
14045 else
14046 return FALSE;
14047
14048 return TRUE;
14049 }
14050
14051 static MS_BOOL _DMX_DBG_GetDisContCnt(MS_U64* pu64ReqHdl, char* psubcmd)
14052 {
14053 DMX_DisContiCnt_info discInfo;
14054 MS_U32 u32Cnt = 0;
14055
14056 //MdbPrint(pu64ReqHdl, "[%d] %s\n", __LINE__, psubcmd);
14057
14058 if((_pdmx_res == NULL) || (_pdmx_res->_bFWInit == FALSE))
14059 return DMX_FILTER_STATUS_ERROR;
14060
14061 discInfo.TspCmd = DMX_DEBUG_CMD_ENABLE;
14062 discInfo.TspSrc = DMX_DEBUG_SRC_TS0;
14063 discInfo.TspFifo = DMX_DEBUG_FIFO_VIDEO;
14064
14065 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_4_0))
14066 if(_DMX_DBG_GetDbgTblTsSrc(psubcmd, &discInfo.TspSrc) == FALSE)
14067 return FALSE;
14068 #else
14069 if(_DMX_DBG_GetDbgTblFifoSrc(psubcmd, &discInfo.TspFifo) == FALSE)
14070 return FALSE;
14071 #endif
14072
14073 if(MApi_DMX_Get_DisContiCnt(&discInfo, &u32Cnt) != DMX_FILTER_STATUS_OK)
14074 return FALSE;
14075
14076 MdbPrint(pu64ReqHdl,"[Dis-continue count] = %d\n", (int)u32Cnt);
14077
14078 return TRUE;
14079 }
14080
14081 static MS_BOOL _DMX_DBG_GetDropCnt(MS_U64* pu64ReqHdl, char* psubcmd)
14082 {
14083 DMX_DropPktCnt_info dropInfo;
14084 MS_U32 u32Cnt = 0;
14085
14086 //MdbPrint(pu64ReqHdl, "[%d] %s\n", __LINE__, psubcmd);
14087
14088 if((_pdmx_res == NULL) || (_pdmx_res->_bFWInit == FALSE))
14089 return DMX_FILTER_STATUS_ERROR;
14090
14091 dropInfo.TspCmd = DMX_DEBUG_CMD_ENABLE;
14092 dropInfo.TspSrc = DMX_DEBUG_SRC_TS0;
14093 dropInfo.TspFifo = DMX_DEBUG_FIFO_VIDEO;
14094
14095 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_4_0))
14096 if(_DMX_DBG_GetDbgTblTsSrc(psubcmd, &dropInfo.TspSrc) == FALSE)
14097 return FALSE;
14098 #else
14099 if(_DMX_DBG_GetDbgTblFifoSrc(psubcmd, &dropInfo.TspFifo) == FALSE)
14100 return FALSE;
14101 #endif
14102
14103 if(MApi_DMX_Get_DropPktCnt(&dropInfo, &u32Cnt) != DMX_FILTER_STATUS_OK)
14104 return FALSE;
14105
14106 MdbPrint(pu64ReqHdl,"[Drop count] = %d\n", (int)u32Cnt);
14107
14108 return TRUE;
14109 }
14110
14111 static MS_BOOL _DMX_DBG_GetLockCnt(MS_U64* pu64ReqHdl, char* psubcmd)
14112 {
14113 DMX_LockPktCnt_info lockInfo;
14114 DMX_DEBUG_SRC eTspSrc = DMX_DEBUG_SRC_TS0;
14115 MS_U32 u32Cnt = 0;
14116
14117 //MdbPrint(pu64ReqHdl, "[%d] %s\n", __LINE__, psubcmd);
14118
14119 if((_pdmx_res == NULL) || (_pdmx_res->_bFWInit == FALSE))
14120 return DMX_FILTER_STATUS_ERROR;
14121
14122 lockInfo.TspCmd = DMX_DEBUG_CMD_ENABLE;
14123 lockInfo.TspTsif = DMX_DEBUG_TSIF_TS0;
14124
14125 if(_DMX_DBG_GetDbgTblTsSrc(psubcmd, &eTspSrc) == FALSE)
14126 return FALSE;
14127
14128 switch(eTspSrc)
14129 {
14130 case DMX_DEBUG_SRC_TS0:
14131 lockInfo.TspTsif = DMX_DEBUG_TSIF_TS0;
14132 break;
14133 case DMX_DEBUG_SRC_TS1:
14134 lockInfo.TspTsif = DMX_DEBUG_TSIF_TS1;
14135 break;
14136 case DMX_DEBUG_SRC_TS2:
14137 lockInfo.TspTsif = DMX_DEBUG_TSIF_TS2;
14138 break;
14139 case DMX_DEBUG_SRC_TS3:
14140 lockInfo.TspTsif = DMX_DEBUG_TSIF_TS3;
14141 break;
14142 default:
14143 return FALSE;
14144 }
14145
14146 if(MApi_DMX_Get_LockPktCnt(&lockInfo, &u32Cnt) != DMX_FILTER_STATUS_OK)
14147 return FALSE;
14148
14149 MdbPrint(pu64ReqHdl,"[Lock count] = %d\n", (int)u32Cnt);
14150
14151 return TRUE;
14152 }
14153
14154 static MS_BOOL _DMX_DBG_GetAVPktCnt(MS_U64* pu64ReqHdl, char* psubcmd)
14155 {
14156 DMX_AVPktCnt_info avpktInfo;
14157 DMX_DEBUG_SRC eTspSrc = DMX_DEBUG_SRC_TS0;
14158 MS_U32 u32Cnt = 0;
14159
14160 //MdbPrint(pu64ReqHdl, "[%d] %s\n", __LINE__, psubcmd);
14161
14162 if((_pdmx_res == NULL) || (_pdmx_res->_bFWInit == FALSE))
14163 return DMX_FILTER_STATUS_ERROR;
14164
14165 avpktInfo.TspCmd = DMX_DEBUG_CMD_ENABLE;
14166 avpktInfo.TspFifo = DMX_DEBUG_FIFO_VIDEO;
14167 avpktInfo.TspFifoSrc = DMX_DEBUG_PKT_DEMUX_0;
14168
14169 if(_DMX_DBG_GetDbgTblTsSrc(psubcmd, &eTspSrc) == FALSE)
14170 return FALSE;
14171
14172 switch(eTspSrc)
14173 {
14174 case DMX_DEBUG_SRC_TS0:
14175 avpktInfo.TspFifoSrc = DMX_DEBUG_PKT_DEMUX_0;
14176 break;
14177 case DMX_DEBUG_SRC_TS1:
14178 avpktInfo.TspFifoSrc = DMX_DEBUG_PKT_DEMUX_1;
14179 break;
14180 case DMX_DEBUG_SRC_TS2:
14181 avpktInfo.TspFifoSrc = DMX_DEBUG_PKT_DEMUX_2;
14182 break;
14183 case DMX_DEBUG_SRC_FILE:
14184 avpktInfo.TspFifoSrc = DMX_DEBUG_PKT_DEMUX_0_FILE;
14185 break;
14186 case DMX_DEBUG_SRC_FILE1:
14187 avpktInfo.TspFifoSrc = DMX_DEBUG_PKT_DEMUX_1_FILE;
14188 break;
14189 case DMX_DEBUG_SRC_FILE2:
14190 avpktInfo.TspFifoSrc = DMX_DEBUG_PKT_DEMUX_2_FILE;
14191 break;
14192 case DMX_DEBUG_SRC_MMFI0:
14193 avpktInfo.TspFifoSrc = DMX_DEBUG_MMFI0;
14194 break;
14195 case DMX_DEBUG_SRC_MMFI1:
14196 avpktInfo.TspFifoSrc = DMX_DEBUG_MMFI1;
14197 break;
14198 default:
14199 return FALSE;
14200 }
14201
14202 if(_DMX_DBG_GetDbgTblFifoSrc(psubcmd + 4, &avpktInfo.TspFifo) == FALSE)
14203 return FALSE;
14204
14205 if(MApi_DMX_Get_AVPktCnt(&avpktInfo, &u32Cnt) != DMX_FILTER_STATUS_OK)
14206 return FALSE;
14207
14208 MdbPrint(pu64ReqHdl,"[AV Packet count] = %d\n", (int)u32Cnt);
14209
14210 return TRUE;
14211 }
14212
14213 DMX_FILTER_STATUS _MApi_DMX_DBG_GetModuleInfo(MS_U64* pu64ReqHdl)
14214 {
14215 MS_U16 u16Clk = 0;
14216 DrvTSP_If eif = E_DRVTSP_IF_TS0;
14217 DrvTSP_If_Set Ifset;
14218 MS_U32 u32TSIFNum = 0, u32PidFltNum = 0, u32SecFltNum, u32VFifo, u32AFifo, U32Dscmb;
14219 MS_U32 u32ii = 0;
14220 const char strPad[][16] = {
14221 "Pad_TS0", "Pad_TS1", "Pad_TS2", "Pad_TS3",
14222 "Pad_TS4", "Pad_TS5", "Pad_TSO", "Inter_Dmd",
14223 "TS0_3Wire", "TS1_3Wire", "TS2_3Wire", "TS3_3Wire",
14224 "TS4_3Wire", "TS5_3Wire"};
14225
14226 if((_pdmx_res == NULL) || (_pdmx_res->_bFWInit == FALSE))
14227 return DMX_FILTER_STATUS_ERROR;
14228
14229 if(_MApi_DMX_GetCap(DMX_CAP_TSIF_NUM, &u32TSIFNum) != DMX_FILTER_STATUS_OK)
14230 {
14231 MdbPrint(pu64ReqHdl,"[%d]Get DMX module info fail....\n", __LINE__);
14232 }
14233 if(_MApi_DMX_GetCap(DMX_CAP_PID_FILTER_NUM, &u32PidFltNum) != DMX_FILTER_STATUS_OK)
14234 {
14235 MdbPrint(pu64ReqHdl,"[%d]Get DMX module info fail....\n", __LINE__);
14236 }
14237 if(_MApi_DMX_GetCap(DMX_CAP_SEC_FILTER_NUM, &u32SecFltNum) != DMX_FILTER_STATUS_OK)
14238 {
14239 MdbPrint(pu64ReqHdl,"[%d]Get DMX module info fail....\n", __LINE__);
14240 }
14241 if(_MApi_DMX_GetCap(DMX_CAP_VFIFO_NUM, &u32VFifo) != DMX_FILTER_STATUS_OK)
14242 {
14243 MdbPrint(pu64ReqHdl,"[%d]Get DMX module info fail....\n", __LINE__);
14244 }
14245 if(_MApi_DMX_GetCap(DMX_CAP_AFIFO_NUM, &u32AFifo) != DMX_FILTER_STATUS_OK)
14246 {
14247 MdbPrint(pu64ReqHdl,"[%d]Get DMX module info fail....\n", __LINE__);
14248 }
14249 if(_MApi_DMX_GetCap(DMX_CAP_DSCMB_ENG_NUM, &U32Dscmb) != DMX_FILTER_STATUS_OK)
14250 {
14251 MdbPrint(pu64ReqHdl,"[%d]Get DMX module info fail....\n", __LINE__);
14252 }
14253
14254 MdbPrint(pu64ReqHdl,"DMX Module Info: \nTotal DMX path: %d\n", (int)u32TSIFNum);
14255 MdbPrint(pu64ReqHdl,"Pid Filter Num: %d, Section Filter Num: %d\n", (int)u32PidFltNum, (int)u32SecFltNum);
14256 MdbPrint(pu64ReqHdl,"VFIFO Num: %d, AFIFO Num: %d\n", (int)u32VFifo, (int)u32AFifo);
14257 MdbPrint(pu64ReqHdl,"DSCMB Engine Num: %d\n", (int)U32Dscmb);
14258 MdbPrint(pu64ReqHdl,"TS_ID Input_Src Clk Clk_Invert Sync_Mode Pad_Mode \n");
14259 MdbPrint(pu64ReqHdl,"===================================================================\n");
14260
14261 Ifset.ePad = E_DRVTSP_PAD_EXT_INPUT0;
14262 Ifset.bClkInv = FALSE;
14263 Ifset.bExtSync = FALSE;
14264 Ifset.bParallel = FALSE;
14265
14266 for(u32ii = 0; u32ii < u32TSIFNum; u32ii++)
14267 {
14268 eif = (DrvTSP_If)u32ii;
14269 Ifset.ePad = E_DRVTSP_PAD_DEMOD;
14270 Ifset.bClkInv = FALSE;
14271 Ifset.bExtSync = FALSE;
14272 Ifset.bParallel = FALSE;
14273
14274 MDrv_TSP_GetTSIFStatus(eif, &Ifset, &u16Clk);
14275
14276 MdbPrint(pu64ReqHdl,"TSIF%d ", u32ii);
14277 MdbPrint(pu64ReqHdl,"%s ", &(strPad[Ifset.ePad][0]));
14278 MdbPrint(pu64ReqHdl,"0x%x ", u16Clk);
14279
14280 if(Ifset.bClkInv)
14281 MdbPrint(pu64ReqHdl,"Invert ");
14282 else
14283 MdbPrint(pu64ReqHdl,"None ");
14284
14285 if(Ifset.bExtSync)
14286 MdbPrint(pu64ReqHdl,"External ");
14287 else
14288 MdbPrint(pu64ReqHdl,"Internal ");
14289
14290 if(Ifset.bParallel)
14291 MdbPrint(pu64ReqHdl,"Parallel \n");
14292 else
14293 MdbPrint(pu64ReqHdl,"Serial \n");
14294 }
14295
14296 MdbPrint(pu64ReqHdl, "\n");
14297
14298 return DMX_FILTER_STATUS_OK;
14299 }
14300
14301 DMX_FILTER_STATUS _MApi_DMX_DBG_EchoCmd(MS_U64* pu64ReqHdl, MS_U32 u32CmdSize, char* pcmd)
14302 {
14303 char* ptr = NULL;
14304 char strbuf[128] = {0};
14305
14306 if((_pdmx_res == NULL) || (_pdmx_res->_bFWInit == FALSE))
14307 return DMX_FILTER_STATUS_ERROR;
14308
14309 //MdbPrint(pu64ReqHdl, "[%d] %s\n", __LINE__, pcmd);
14310
14311 if(strncmp(pcmd, "pid_flt", 7) == 0)
14312 {
14313 if(_DMX_DBG_GetPidFltInfo(pu64ReqHdl) == TRUE)
14314 return DMX_FILTER_STATUS_OK;
14315 }
14316 else if(strncmp(pcmd, "sec_flt=", 8) == 0)
14317 {
14318 int istart = 0, iend = 0;
14319
14320 ptr = pcmd + 8;
14321 ptr = _DMX_Str_Tok(ptr, strbuf, ',');
14322 istart = _DMX_StrToInt(strbuf);
14323 ptr = _DMX_Str_Tok(ptr, strbuf, ',');
14324 iend = _DMX_StrToInt(strbuf);
14325
14326 if(_DMX_DBG_GetSecFltInfo(pu64ReqHdl, istart, iend) == TRUE)
14327 return DMX_FILTER_STATUS_OK;
14328 }
14329 else if(strncmp(pcmd, "dgtbl=", 6) == 0)
14330 {
14331 ptr = pcmd + 6;
14332
14333 //MdbPrint(pu64ReqHdl, "[%d] %s\n", __LINE__, ptr);
14334
14335 if(strncmp(ptr, "dc_cnt,", 7) == 0)
14336 {
14337 if(_DMX_DBG_GetDisContCnt(pu64ReqHdl, ptr + 7) == TRUE)
14338 return DMX_FILTER_STATUS_OK;
14339 }
14340 else if(strncmp(ptr, "dp_cnt,", 7) == 0)
14341 {
14342 if(_DMX_DBG_GetDropCnt(pu64ReqHdl, ptr + 7) == TRUE)
14343 return DMX_FILTER_STATUS_OK;
14344 }
14345 else if(strncmp(ptr, "lock_cnt,", 9) == 0)
14346 {
14347 if(_DMX_DBG_GetLockCnt(pu64ReqHdl, ptr + 9) == TRUE)
14348 return DMX_FILTER_STATUS_OK;
14349 }
14350 else if(strncmp(ptr, "av_cnt,", 7) == 0)
14351 {
14352 if(_DMX_DBG_GetAVPktCnt(pu64ReqHdl, ptr + 7) == TRUE)
14353 return DMX_FILTER_STATUS_OK;
14354 }
14355 }
14356
14357 MdbPrint(pu64ReqHdl,"[%d]DBG CMD Error!!!\n", __LINE__);
14358 return DMX_FILTER_STATUS_ERROR;
14359 }
14360 #endif //CONFIG_UTOPIA_PROC_DBG_SUPPORT
14361