1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* 3 * AM62Lx DDR configuration data structure 4 * 5 * Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/ 6 */ 7 8 #ifndef AM62LX_DDR_CONFIG_H 9 #define AM62LX_DDR_CONFIG_H 10 11 #include <stdint.h> 12 13 /* Register array sizes fixed by Denali LPDDR4 controller architecture */ 14 #define AM62L_DDR_CTL_REG_COUNT (423U) 15 #define AM62L_DDR_PI_REG_COUNT (345U) 16 #define AM62L_DDR_PHY_REG_COUNT (1406U) 17 18 /* DDR RAM size: default 2 GB, overridable at build time */ 19 #ifndef AM62L_DDR_RAM_SIZE 20 #define AM62L_DDR_RAM_SIZE 0x80000000ULL 21 #endif 22 23 struct am62lx_ddr_config { 24 uint32_t ddr_freq0; 25 uint32_t ddr_freq1; 26 uint32_t ddr_freq2; 27 uint32_t ddr_fhs_cnt; 28 uint32_t ctl_data[AM62L_DDR_CTL_REG_COUNT]; 29 uint32_t pi_data[AM62L_DDR_PI_REG_COUNT]; 30 uint32_t phy_data[AM62L_DDR_PHY_REG_COUNT]; 31 }; 32 33 extern const struct am62lx_ddr_config am62lx_ddr_cfg; 34 35 #endif /* AM62LX_DDR_CONFIG_H */ 36