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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 #ifndef _HWREG_UTILITY_H_ 95 #define _HWREG_UTILITY_H_ 96 97 #include "ace_hwreg.h" 98 #include "MsCommon.h" 99 100 101 #ifdef _MDRV_ACE_C_ 102 #define INTERFACE 103 #else 104 #define INTERFACE extern 105 #endif 106 //!! Do not include this header in driver or api level 107 108 //------------------------------------------------------------------------------------------------- 109 // Macro and Define 110 //------------------------------------------------------------------------------------------------- 111 extern MS_VIRT _ACE_RIU_BASE; // This should be inited before XC library starting. 112 113 #ifndef UNUSED 114 #define UNUSED(x) ((x)=(x)) 115 #endif 116 117 #define _BITMASK(loc_msb, loc_lsb) ((1U << (loc_msb)) - (1U << (loc_lsb)) + (1U << (loc_msb))) 118 #define BITMASK(x) _BITMASK(1?x, 0?x) 119 #define HBMASK 0xFF00 120 #define LBMASK 0x00FF 121 122 #define RIU_MACRO_START do { 123 #define RIU_MACRO_END } while (0) 124 125 // Address bus of RIU is 16 bits. 126 #define RIU_READ_BYTE(addr) ( READ_BYTE( _ACE_RIU_BASE + (addr) ) ) 127 #define RIU_READ_2BYTE(addr) ( READ_WORD( _ACE_RIU_BASE + (addr) ) ) 128 #define RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( _ACE_RIU_BASE + (addr), val) } 129 #define RIU_WRITE_2BYTE(addr, val) { WRITE_WORD( _ACE_RIU_BASE + (addr), val) } 130 131 //Device bank offset 132 INTERFACE MS_U32 u32XCDeviceBankOffset[XC_ACE_SUPPORT_DEVICE_NUM]; 133 134 //============================================================= 135 // Standard Form 136 137 #define MDrv_ReadByte( u32Reg ) RIU_READ_BYTE(((u32Reg) << 1) - ((u32Reg) & 1)) 138 139 #define MDrv_Read2Byte( u32Reg ) (RIU_READ_2BYTE((u32Reg)<<1)) 140 141 #define MDrv_Read4Byte( u32Reg ) ( (MS_U32)RIU_READ_2BYTE((u32Reg)<<1) | ((MS_U32)RIU_READ_2BYTE(((u32Reg)+2)<<1)<<16 ) ) 142 143 #define MDrv_ReadRegBit( u32Reg, u8Mask ) (RIU_READ_BYTE(((u32Reg)<<1) - ((u32Reg) & 1)) & (u8Mask)) 144 145 #define MDrv_WriteRegBit( u32Reg, bEnable, u8Mask ) \ 146 RIU_MACRO_START \ 147 RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) ) | (u8Mask)) : \ 148 (RIU_READ_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) ) & ~(u8Mask))); \ 149 RIU_MACRO_END 150 151 #define MDrv_WriteByte( u32Reg, u8Val ) \ 152 RIU_MACRO_START \ 153 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \ 154 RIU_MACRO_END 155 156 #define MDrv_Write2Byte( u32Reg, u16Val ) \ 157 RIU_MACRO_START \ 158 RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \ 159 RIU_MACRO_END 160 161 #define MDrv_Write3Byte( u32Reg, u32Val ) \ 162 RIU_MACRO_START \ 163 if ((u32Reg) & 0x01) \ 164 { \ 165 RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \ 166 RIU_WRITE_2BYTE( (u32Reg + 1)<<1 , ((u32Val) >> 8)); \ 167 } \ 168 else \ 169 { \ 170 RIU_WRITE_2BYTE( (u32Reg) << 1, u32Val); \ 171 RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \ 172 } \ 173 RIU_MACRO_END 174 175 #define MDrv_Write4Byte( u32Reg, u32Val ) \ 176 RIU_MACRO_START \ 177 if ((u32Reg) & 0x01) \ 178 { \ 179 RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \ 180 RIU_WRITE_2BYTE( ((u32Reg) + 1)<<1 , ( (u32Val) >> 8)); \ 181 RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \ 182 } \ 183 else \ 184 { \ 185 RIU_WRITE_2BYTE( (u32Reg) <<1 , u32Val); \ 186 RIU_WRITE_2BYTE( ((u32Reg) + 2)<<1 , ((u32Val) >> 16)); \ 187 } \ 188 RIU_MACRO_END 189 190 #define MDrv_WriteByteMask( u32Reg, u8Val, u8Msk ) \ 191 RIU_MACRO_START \ 192 RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1))) & ~(u8Msk)) | ((u8Val) & (u8Msk))); \ 193 RIU_MACRO_END 194 195 #define MDrv_Write2ByteMask( u32Reg, u16Val, u16Mask) \ 196 RIU_MACRO_START \ 197 RIU_WRITE_2BYTE(u32Reg<<1, (RIU_READ_2BYTE(u32Reg<<1) & ~(u16Mask)) | (u16Val & u16Mask)) \ 198 RIU_MACRO_END 199 200 201 //============================================================= 202 // Just for Scaler 203 #if SCALER_REGISTER_SPREAD 204 #define SC_W2BYTE( u32Id, u32Reg, u16Val)\ 205 ( { RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32XCDeviceBankOffset[u32Id] << 8) ) << 1 , u16Val ) ; } ) 206 207 #define SC_R2BYTE( u32Id, u32Reg ) \ 208 ( { RIU_READ_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32XCDeviceBankOffset[u32Id] << 8) ) <<1 ) ; } ) 209 210 #define SC_W4BYTE( u32Id, u32Reg, u32Val)\ 211 ( { RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32XCDeviceBankOffset[u32Id] << 8) ) <<1, (MS_U16)((u32Val) & 0x0000FFFF) ) ; \ 212 RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32XCDeviceBankOffset[u32Id] << 8) + 2 ) << 1, (MS_U16)(((u32Val) >> 16) & 0x0000FFFF) ); } ) 213 214 #define SC_R4BYTE( u32Id, u32Reg )\ 215 ( { RIU_READ_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32XCDeviceBankOffset[u32Id] << 8) ) << 1 ) | (MS_U32)(RIU_READ_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32XCDeviceBankOffset[u32Id] << 8) + 2 ) << 1 )) << 16; }) 216 217 #define SC_R2BYTEMSK( u32Id, u32Reg, u16mask)\ 218 ( { RIU_READ_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32XCDeviceBankOffset[u32Id] << 8) ) << 1) & (u16mask) ; } ) 219 220 #define SC_W2BYTEMSK( u32Id, u32Reg, u16Val, u16Mask)\ 221 ( { RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32XCDeviceBankOffset[u32Id] << 8) ) << 1, (RIU_READ_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32XCDeviceBankOffset[u32Id] << 8) ) << 1) & ~(u16Mask) ) | ((u16Val) & (u16Mask)) ) ; }) 222 223 #else 224 #define SC_W2BYTE( u32Id, u32Reg, u16Val)\ 225 ( { RIU_WRITE_2BYTE(REG_SCALER_BASE << 1, (((u32Reg) >> 8) & 0x00FF) + u32XCDeviceBankOffset[u32Id] ) ; \ 226 RIU_WRITE_2BYTE( (REG_SCALER_BASE +((u32Reg) & 0xFF) ) << 1 , u16Val ) ; } ) 227 228 #define SC_R2BYTE( u32Id, u32Reg ) \ 229 ( { RIU_WRITE_2BYTE(REG_SCALER_BASE << 1, ( ((u32Reg) >> 8) & 0x00FF) + u32XCDeviceBankOffset[u32Id] ) ; \ 230 RIU_READ_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFF) )<<1 ) ; } ) 231 232 #define SC_W4BYTE( u32Id, u32Reg, u32Val)\ 233 ( { RIU_WRITE_2BYTE(REG_SCALER_BASE<<1, (((u32Reg) >> 8) & 0x00FF) + u32XCDeviceBankOffset[u32Id] ) ; \ 234 RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFF) ) <<1, (MS_U16)((u32Val) & 0x0000FFFF) ) ; \ 235 RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFF) + 2 ) << 1, (MS_U16)(((u32Val) >> 16) & 0x0000FFFF) ); } ) 236 237 #define SC_R4BYTE( u32Id, u32Reg )\ 238 ( { RIU_WRITE_2BYTE(REG_SCALER_BASE << 1, (((u32Reg) >> 8) & 0x00FF) + u32XCDeviceBankOffset[u32Id] ) ; \ 239 RIU_READ_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFF) ) << 1 ) | (MS_U32)(RIU_READ_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFF) + 2 ) << 1 )) << 16; } ) 240 241 #define SC_R2BYTEMSK( u32Id, u32Reg, u16mask)\ 242 ( { RIU_WRITE_2BYTE(REG_SCALER_BASE << 1, (((u32Reg) >> 8) & 0x00FF) + u32XCDeviceBankOffset[u32Id] ) ; \ 243 RIU_READ_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFF) ) << 1) & (u16mask) ; } ) 244 245 #define SC_W2BYTEMSK( u32Id, u32Reg, u16Val, u16Mask)\ 246 ( { RIU_WRITE_2BYTE(REG_SCALER_BASE << 1, (((u32Reg) >> 8) & 0x00FF) + u32XCDeviceBankOffset[u32Id] ) ; \ 247 RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFF) ) << 1, (RIU_READ_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFF) ) << 1) & ~(u16Mask) ) | ((u16Val) & (u16Mask)) ) ; }) 248 249 #endif 250 //============================================================= 251 // Just for MOD 252 #define MOD_W2BYTE( u32Reg, u16Val)\ 253 ( { RIU_WRITE_2BYTE(REG_MOD_BASE << 1, ((u32Reg) >> 8) & 0x00FF ); \ 254 RIU_WRITE_2BYTE( (REG_MOD_BASE + ((u32Reg) & 0xFF) ) << 1, u16Val ); } ) 255 256 #define MOD_R2BYTE( u32Reg ) \ 257 ( { RIU_WRITE_2BYTE(REG_MOD_BASE << 1, ((u32Reg) >> 8) & 0x00FF ); \ 258 RIU_READ_2BYTE( (REG_MOD_BASE + ((u32Reg) & 0xFF) ) << 1) ; } ) 259 260 #define MOD_R2BYTEMSK( u32Reg, u16mask)\ 261 ( { RIU_WRITE_2BYTE(REG_MOD_BASE << 1, ((u32Reg) >> 8) & 0x00FF ); \ 262 RIU_READ_2BYTE( (REG_MOD_BASE + ((u32Reg) & 0xFF) ) << 1) & (u16mask); }) 263 264 #define MOD_W2BYTEMSK( u32Reg, u16Val, u16Mask)\ 265 ( { RIU_WRITE_2BYTE(REG_MOD_BASE << 1, ((u32Reg) >> 8) & 0x00FF ); \ 266 RIU_WRITE_2BYTE( (REG_MOD_BASE + ((u32Reg) & 0xFF) )<<1 , (RIU_READ_2BYTE( (REG_MOD_BASE + ((u32Reg) & 0xFF) ) << 1 ) & ~(u16Mask)) | ((u16Val) & (u16Mask)) ); } ) 267 268 269 //============================================================= 270 //General ( Make sure u32Reg is not ODD 271 #define W2BYTE( u32Reg, u16Val) RIU_WRITE_2BYTE( (u32Reg) << 1 , u16Val ) 272 273 274 #define R2BYTE( u32Reg ) RIU_READ_2BYTE( (u32Reg) << 1) 275 276 #define W4BYTE( u32Reg, u32Val)\ 277 ( { RIU_WRITE_2BYTE( (u32Reg) << 1, ((u32Val) & 0x0000FFFF) ); \ 278 RIU_WRITE_2BYTE( ( (u32Reg) + 2) << 1 , (((u32Val) >> 16) & 0x0000FFFF)) ; } ) 279 280 #define R4BYTE( u32Reg )\ 281 ( { ((RIU_READ_2BYTE( (u32Reg) << 1)) | ((MS_U32)(RIU_READ_2BYTE( ( (u32Reg) + 2 ) << 1) ) << 16)) ; } ) 282 283 #define R2BYTEMSK( u32Reg, u16mask)\ 284 ( { RIU_READ_2BYTE( (u32Reg)<< 1) & (u16mask) ; } ) 285 286 #define W2BYTEMSK( u32Reg, u16Val, u16Mask)\ 287 ( { RIU_WRITE_2BYTE( (u32Reg)<< 1 , (RIU_READ_2BYTE((u32Reg) << 1) & ~(u16Mask)) | ((u16Val) & (u16Mask)) ) ; } ) 288 289 290 //------------------------------------------------------------------------------------------------- 291 // Type and Structure 292 //------------------------------------------------------------------------------------------------- 293 294 295 //------------------------------------------------------------------------------------------------- 296 // Function and Variable 297 //------------------------------------------------------------------------------------------------- 298 299 #undef INTERFACE 300 #endif 301 302