xref: /OK3568_Linux_fs/external/camera_engine_rkaiq/rkaiq/include/iq_parser_v2/ablc_uapi_head.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /*
2  * ablc_uapi_head.h
3  *
4  *  Copyright (c) 2022 Rockchip Corporation
5  *
6  * Licensed under the Apache License, Version 2.0 (the "License");
7  * you may not use this file except in compliance with the License.
8  * You may obtain a copy of the License at
9  *
10  *      http://www.apache.org/licenses/LICENSE-2.0
11  *
12  * Unless required by applicable law or agreed to in writing, software
13  * distributed under the License is distributed on an "AS IS" BASIS,
14  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15  * See the License for the specific language governing permissions and
16  * limitations under the License.
17  *
18  */
19 
20 #ifndef __CALIBDBV2_UAPI_ABLC_HEADER_H__
21 #define __CALIBDBV2_UAPI_ABLC_HEADER_H__
22 
23 #include "rk_aiq_comm.h"
24 
25 RKAIQ_BEGIN_DECLARE
26 
27 
28 typedef struct AblcSelect_s {
29     // M4_BOOL_DESC("enable", "1")
30     bool enable;
31 
32     // M4_NUMBER_DESC("blc_r", "f32", M4_RANGE(0, 4095), "0", M4_DIGIT(3))
33     float blc_r;
34     // M4_NUMBER_DESC("blc_gr", "f32", M4_RANGE(0, 4095), "0", M4_DIGIT(3))
35     float blc_gr;
36     // M4_NUMBER_DESC("blc_gb", "f32", M4_RANGE(0, 4095), "0", M4_DIGIT(3))
37     float blc_gb;
38     // M4_NUMBER_DESC("blc_b", "f32", M4_RANGE(0, 4095), "0", M4_DIGIT(3))
39     float blc_b;
40 } AblcSelect_t;
41 
42 typedef AblcSelect_t AblcManualAttr_t;
43 
44 typedef struct AblcExpInfo_s {
45     // M4_NUMBER_DESC("hdr_mode", "u8", M4_RANGE(0, 2), "0", M4_DIGIT(0))
46     int hdr_mode;
47 
48     // M4_ARRAY_DESC("time", "f32", M4_SIZE(1,3), M4_RANGE(0, 1024), "0.01", M4_DIGIT(6))
49     float arTime[3];
50     // M4_ARRAY_DESC("again", "f32", M4_SIZE(1,3), M4_RANGE(0, 204800), "1", M4_DIGIT(3))
51     float arAGain[3];
52     // M4_ARRAY_DESC("dgain", "f32", M4_SIZE(1,3), M4_RANGE(0, 204800), "1", M4_DIGIT(3))
53     float arDGain[3];
54     // M4_ARRAY_DESC("isp_dgain", "f32", M4_SIZE(1,3), M4_RANGE(0, 204800), "1", M4_DIGIT(3))
55     float isp_dgain[3];
56     // M4_ARRAY_DESC("iso", "u32", M4_SIZE(1,3), M4_RANGE(0, 204800), "1", M4_DIGIT(0))
57     int   arIso[3];
58 
59     // M4_NUMBER_DESC("isoLow", "u32", M4_RANGE(0, 204800), "50", M4_DIGIT(0))
60     int isoLow;
61     // M4_NUMBER_DESC("isoHigh", "u32", M4_RANGE(0, 204800), "50", M4_DIGIT(0))
62     int isoHigh;
63 } AblcExpInfo_t;
64 
65 typedef struct rk_aiq_ablc_info_s {
66     // M4_ARRAY_TABLE_DESC("sync", "array_table_ui", "none", "1")
67     rk_aiq_uapi_sync_t sync;
68     // M4_NUMBER_DESC("iso", "u32", M4_RANGE(0, 204800), "50", M4_DIGIT(0), "0", "0")
69     int iso;
70     // M4_ARRAY_TABLE_DESC("expo_info", "normal_ui_style", "none", "0", "0")
71     AblcExpInfo_t expo_info;
72 } rk_aiq_ablc_info_t;
73 
74 
75 RKAIQ_END_DECLARE
76 
77 #endif
78