xref: /OK3568_Linux_fs/external/camera_engine_rkaiq/rkaiq/aiq_core/RkAiqCoreConfigV20.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /*
2  * Copyright (c) 2019-2022 Rockchip Eletronics Co., Ltd.
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 #ifndef RK_AIQ_CORE_CONFIG_V20_H
17 #define RK_AIQ_CORE_CONFIG_V20_H
18 
19 #include "a3dlut/rk_aiq_algo_a3dlut_itf.h"
20 #include "ablc/rk_aiq_algo_ablc_itf.h"
21 #include "accm/rk_aiq_algo_accm_itf.h"
22 #include "acgc/rk_aiq_algo_acgc_itf.h"
23 #include "acnr/rk_aiq_acnr_algo_itf_v1.h"
24 #include "acp/rk_aiq_algo_acp_itf.h"
25 #include "acsm/rk_aiq_algo_acsm_itf.h"
26 #include "adebayer/rk_aiq_algo_adebayer_itf.h"
27 #include "adegamma/rk_aiq_algo_adegamma_itf.h"
28 #include "adehaze/rk_aiq_algo_adehaze_itf.h"
29 #include "adpcc/rk_aiq_algo_adpcc_itf.h"
30 #include "adrc/rk_aiq_algo_adrc_itf.h"
31 #include "ae/rk_aiq_algo_ae_itf.h"
32 #include "aeis/rk_aiq_algo_aeis_itf.h"
33 #include "af/rk_aiq_algo_af_itf.h"
34 #include "afec/rk_aiq_algo_afec_itf.h"
35 #include "again/rk_aiq_again_algo_itf.h"
36 #include "agamma/rk_aiq_algo_agamma_itf.h"
37 #include "agic/rk_aiq_algo_agic_itf.h"
38 #include "aie/rk_aiq_algo_aie_itf.h"
39 #include "aldch/rk_aiq_algo_aldch_itf.h"
40 #include "alsc/rk_aiq_algo_alsc_itf.h"
41 #include "amd/rk_aiq_algo_amd_itf.h"
42 #include "amerge/rk_aiq_algo_amerge_itf.h"
43 #include "amfnr/rk_aiq_amfnr_algo_itf_v1.h"
44 #include "anr/rk_aiq_algo_anr_itf.h"
45 #include "aorb/rk_aiq_algo_aorb_itf.h"
46 #include "arawnr/rk_aiq_abayernr_algo_itf_v1.h"
47 #include "asd/rk_aiq_algo_asd_itf.h"
48 #include "asharp/rk_aiq_algo_asharp_itf.h"
49 #include "atmo/rk_aiq_algo_atmo_itf.h"
50 #include "auvnr/rk_aiq_auvnr_algo_itf_v1.h"
51 #include "awb/rk_aiq_algo_awb_itf.h"
52 #include "awdr/rk_aiq_algo_awdr_itf.h"
53 #include "aynr/rk_aiq_aynr_algo_itf_v1.h"
54 
55 namespace RkCam {
56 
57 /*
58  * isp gets the stats from frame n-1,
59  * and the new parameters take effect on frame n+1
60  */
61 #define ISP_PARAMS_EFFECT_DELAY_CNT 2
62 
63 static RkAiqGrpCondition_t aeGrpCond[] = {
64     [0] = {XCAM_MESSAGE_AEC_STATS_OK, ISP_PARAMS_EFFECT_DELAY_CNT},
65 };
66 static RkAiqGrpConditions_t aeGrpConds = {grp_conds_array_info(aeGrpCond)};
67 
68 static RkAiqGrpCondition_t awbGrpCond[] = {
69     [0] = {XCAM_MESSAGE_SOF_INFO_OK, 0},
70     [1] = {XCAM_MESSAGE_AE_PRE_RES_OK, 0},
71     [2] = {XCAM_MESSAGE_AWB_STATS_OK, ISP_PARAMS_EFFECT_DELAY_CNT},
72 };
73 static RkAiqGrpConditions_t awbGrpConds = {grp_conds_array_info(awbGrpCond)};
74 
75 static RkAiqGrpCondition_t measGrpCond[] = {
76     [0] = {XCAM_MESSAGE_ISP_STATS_OK, ISP_PARAMS_EFFECT_DELAY_CNT},
77 };
78 static RkAiqGrpConditions_t measGrpConds = {grp_conds_array_info(measGrpCond)};
79 
80 static RkAiqGrpCondition_t otherGrpCond[] = {
81     [0] = {XCAM_MESSAGE_SOF_INFO_OK, 0},
82 };
83 static RkAiqGrpConditions_t otherGrpConds = {grp_conds_array_info(otherGrpCond)};
84 
85 static RkAiqGrpCondition_t amdGrpCond[] = {
86     [0] = {XCAM_MESSAGE_SOF_INFO_OK, 0},
87     [1] = {XCAM_MESSAGE_ISP_POLL_SP_OK, 0},
88     [2] = {XCAM_MESSAGE_ISP_GAIN_OK, 0},
89 };
90 static RkAiqGrpConditions_t amdGrpConds = {grp_conds_array_info(amdGrpCond)};
91 
92 static RkAiqGrpCondition_t amfnrGrpCond[] = {
93     [0] = {XCAM_MESSAGE_SOF_INFO_OK, 0},
94     [1] = {XCAM_MESSAGE_ISP_GAIN_OK, 0},
95     [2] = {XCAM_MESSAGE_ISPP_GAIN_KG_OK, 0},
96     [3] = {XCAM_MESSAGE_AMD_PROC_RES_OK, 0},
97 };
98 static RkAiqGrpConditions_t amfnrGrpConds = {grp_conds_array_info(amfnrGrpCond)};
99 
100 static RkAiqGrpCondition_t aynrGrpCond[] = {
101     [0] = {XCAM_MESSAGE_SOF_INFO_OK, 0},
102     [1] = {XCAM_MESSAGE_ISP_GAIN_OK, 0},
103     [2] = {XCAM_MESSAGE_ISPP_GAIN_WR_OK, 0},
104     [3] = {XCAM_MESSAGE_AMD_PROC_RES_OK, 0},
105 };
106 static RkAiqGrpConditions_t aynrGrpConds = {grp_conds_array_info(aynrGrpCond)};
107 
108 static RkAiqGrpCondition_t lscGrpCond[] = {
109     [0] = {XCAM_MESSAGE_SOF_INFO_OK, 0},
110     [1] = {XCAM_MESSAGE_ISP_POLL_TX_OK, 0},
111     [2] = {XCAM_MESSAGE_AWB_STATS_OK, ISP_PARAMS_EFFECT_DELAY_CNT},
112     [3] = {XCAM_MESSAGE_AE_PROC_RES_OK, 0},
113 };
114 static RkAiqGrpConditions_t lscGrpConds = {grp_conds_array_info(lscGrpCond)};
115 
116 static RkAiqGrpCondition_t eisGrpCond[] = {
117     [0] = {XCAM_MESSAGE_SOF_INFO_OK, 0},
118     [1] = {XCAM_MESSAGE_ORB_STATS_OK, 0},
119     [2] = {XCAM_MESSAGE_NR_IMG_OK, 0},
120 };
121 static RkAiqGrpConditions_t eisGrpConds = {grp_conds_array_info(eisGrpCond)};
122 
123 static RkAiqGrpCondition_t orbGrpCond[] = {
124     [0] = {XCAM_MESSAGE_ORB_STATS_OK, 0},
125 };
126 static RkAiqGrpConditions_t orbGrpConds = {grp_conds_array_info(orbGrpCond)};
127 
128 const static struct RkAiqAlgoDesCommExt g_default_3a_des[] = {
129 // clang-format off
130 #if RKAIQ_HAVE_AE_V1
131     { &g_RkIspAlgoDescAe.common,        RK_AIQ_CORE_ANALYZE_AE,    0, 0, 0, aeGrpConds    },
132 #endif
133 #if RKAIQ_HAVE_AWB_V20
134     { &g_RkIspAlgoDescAwb.common,       RK_AIQ_CORE_ANALYZE_AWB,   0, 0, 0, awbGrpConds   },
135 #endif
136 #if RKAIQ_HAVE_AF_V20 || RKAIQ_ONLY_AF_STATS_V20
137     { &g_RkIspAlgoDescAf.common,        RK_AIQ_CORE_ANALYZE_MEAS,  0, 0, 0, measGrpConds  },
138 #endif
139 #if RKAIQ_HAVE_BLC_V1
140     { &g_RkIspAlgoDescAblc.common,      RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
141 #endif
142 #if RKAIQ_HAVE_DEGAMMA_V1
143     { &g_RkIspAlgoDescAdegamma.common,  RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
144 #endif
145     { &g_RkIspAlgoDescAdpcc.common,     RK_AIQ_CORE_ANALYZE_MEAS,  0, 0, 0, measGrpConds  },
146 #if RKAIQ_HAVE_MERGE_V10
147     { &g_RkIspAlgoDescAmerge.common,    RK_AIQ_CORE_ANALYZE_MEAS,  0, 0, 0, measGrpConds  },
148 #endif
149 #if RKAIQ_HAVE_TMO_V1
150     { &g_RkIspAlgoDescAtmo.common,      RK_AIQ_CORE_ANALYZE_MEAS,  0, 0, 0, measGrpConds  },
151 #endif
152 #if ANR_NO_SEPERATE_MARCO
153 #if RKAIQ_HAVE_ANR_V1
154     { &g_RkIspAlgoDescAnr.common,       RK_AIQ_CORE_ANALYZE_MEAS,  0, 0, 0, measGrpConds  },
155 #endif
156 #else
157 #if 0
158     { &g_RkIspAlgoDescArawnr.common,    RK_AIQ_CORE_ANALYZE_MEAS,  0, 0, 0, measGrpConds  },
159     { &g_RkIspAlgoDescAynr.common,      RK_AIQ_CORE_ANALYZE_AYNR,  0, 0, 0, aynrGrpConds  },
160     { &g_RkIspAlgoDescAcnr.common,      RK_AIQ_CORE_ANALYZE_MEAS,  0, 0, 0, measGrpConds  },
161     { &g_RkIspAlgoDescAmfnr.common,     RK_AIQ_CORE_ANALYZE_AMFNR, 0, 0, 0, amfnrGrpConds },
162     { &g_RkIspAlgoDescAgain.common,     RK_AIQ_CORE_ANALYZE_AMFNR, 0, 0, 0, amfnrGrpConds },
163 #else
164 #if RKAIQ_HAVE_BAYERNR_V1
165     { &g_RkIspAlgoDescArawnr.common,    RK_AIQ_CORE_ANALYZE_MEAS,  0, 0, 0, measGrpConds  },
166 #endif
167 #if RKAIQ_HAVE_YNR_V1
168     { &g_RkIspAlgoDescAynr.common,      RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
169 #endif
170 #if RKAIQ_HAVE_UVNR_V1
171     { &g_RkIspAlgoDescAcnr.common,      RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
172 #endif
173 #if RKAIQ_HAVE_MFNR_V1
174     { &g_RkIspAlgoDescAmfnr.common,     RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
175 #endif
176 #if RKAIQ_HAVE_GAIN_V1
177     { &g_RkIspAlgoDescAgain.common,     RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
178 #endif
179 #endif
180 #endif
181 #if RKAIQ_HAVE_LSC_V1
182     { &g_RkIspAlgoDescAlsc.common,      RK_AIQ_CORE_ANALYZE_LSC,   0, 0, 0, lscGrpConds   },
183 #endif
184 #if RKAIQ_HAVE_GIC_V1
185     { &g_RkIspAlgoDescAgic.common,      RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
186 #endif
187 #if RKAIQ_HAVE_DEBAYER_V1
188     { &g_RkIspAlgoDescAdebayer.common,  RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
189 #endif
190 #if RKAIQ_HAVE_CCM_V1
191     { &g_RkIspAlgoDescAccm.common,      RK_AIQ_CORE_ANALYZE_MEAS,  0, 0, 0, measGrpConds  },
192 #endif
193 #if RKAIQ_HAVE_GAMMA_V10
194     { &g_RkIspAlgoDescAgamma.common,    RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
195 #endif
196 #if RKAIQ_HAVE_WDR_V1
197     { &g_RkIspAlgoDescAwdr.common,      RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
198 #endif
199 #if RKAIQ_HAVE_DEHAZE_V10
200     { &g_RkIspAlgoDescAdhaz.common,     RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
201 #endif
202 #if RKAIQ_HAVE_3DLUT_V1
203     { &g_RkIspAlgoDescA3dlut.common,    RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
204 #endif
205 #if RKAIQ_HAVE_LDCH_V10
206     { &g_RkIspAlgoDescAldch.common,     RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
207 #endif
208 #if RKAIQ_HAVE_CSM_V1
209     { &g_RkIspAlgoDescAcsm.common,      RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
210 #endif
211 #if RKAIQ_HAVE_ACP_V10
212     { &g_RkIspAlgoDescAcp.common,       RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
213 #endif
214 #if RKAIQ_HAVE_AIE_V10
215     { &g_RkIspAlgoDescAie.common,       RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
216 #endif
217 #if RKAIQ_HAVE_SHARP_V1
218     { &g_RkIspAlgoDescAsharp.common,    RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
219 #endif
220 #if RKAIQ_HAVE_ORB_V1
221     { &g_RkIspAlgoDescAorb.common,      RK_AIQ_CORE_ANALYZE_ORB,   0, 0, 0, orbGrpConds   },
222 #endif
223 #if RKAIQ_HAVE_CGC_V1
224     { &g_RkIspAlgoDescAcgc.common,      RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
225 #endif
226 #if RKAIQ_HAVE_ASD_V10
227     { &g_RkIspAlgoDescAsd.common,       RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
228 #endif
229 #if RKAIQ_HAVE_FEC_V10
230     { &g_RkIspAlgoDescAfec.common,    RK_AIQ_CORE_ANALYZE_OTHER, 0, 0, 0, otherGrpConds },
231 #endif
232     { &g_RkIspAlgoDescAeis.common,      RK_AIQ_CORE_ANALYZE_EIS,   0, 0, 0, eisGrpConds   },
233 #if 0
234     { &g_RkIspAlgoDescAmd.common,       RK_AIQ_CORE_ANALYZE_AMD,   0, 0, 0, amdGrpConds   },
235 #endif
236     { NULL,                             RK_AIQ_CORE_ANALYZE_ALL,   0, 0, 0, {0, 0}        },
237     // clang-format on
238 };
239 
240 }  // namespace RkCam
241 
242 #endif  // RK_AIQ_CORE_CONFIG_V20_H
243