xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/spi/spi-rockchip.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/spi-rockchip.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip SPI Controller
8
9description:
10  The Rockchip SPI controller is used to interface with various devices such
11  as flash and display controllers using the SPI communication interface.
12
13allOf:
14  - $ref: "spi-controller.yaml#"
15
16maintainers:
17  - Heiko Stuebner <heiko@sntech.de>
18
19# Everything else is described in the common file
20properties:
21  compatible:
22    oneOf:
23      - const: rockchip,rk3036-spi
24      - const: rockchip,rk3066-spi
25      - const: rockchip,rk3228-spi
26      - const: rockchip,rv1108-spi
27      - items:
28          - enum:
29              - rockchip,px30-spi
30              - rockchip,rk3188-spi
31              - rockchip,rk3288-spi
32              - rockchip,rk3308-spi
33              - rockchip,rk3328-spi
34              - rockchip,rk3368-spi
35              - rockchip,rk3399-spi
36              - rockchip,rv1126-spi
37          - const: rockchip,rk3066-spi
38
39  reg:
40    maxItems: 1
41
42  interrupts:
43    maxItems: 1
44
45  clocks:
46    items:
47      - description: transfer-clock
48      - description: peripheral clock
49
50  clock-names:
51    items:
52      - const: spiclk
53      - const: apb_pclk
54
55  dmas:
56    items:
57      - description: TX DMA Channel
58      - description: RX DMA Channel
59
60  dma-names:
61    items:
62      - const: tx
63      - const: rx
64
65  rx-sample-delay-ns:
66    default: 0
67    description:
68      Nano seconds to delay after the SCLK edge before sampling Rx data
69      (may need to be fine tuned for high capacitance lines).
70      If not specified 0 will be used.
71
72  csm:
73    default: 0
74    description:
75      ss_n be high for half or one sclk_out cycle after every frame data
76      is transferred.
77      If not specified 0 will be used.
78    enum:
79      - 0 # keep low
80      - 1 # half sclk_out
81      - 2 # one sclk_out
82
83  pinctrl-names:
84    minItems: 1
85    items:
86      - const: default
87      - const: sleep
88    description:
89      Names for the pin configuration(s); may be "default" or "sleep",
90      where the "sleep" configuration may describe the state
91      the pins should be in during system suspend.
92
93  rockchip,poll-only:
94    description: Add this property to set the transmission method as CPU polling.
95    type: boolean
96
97  rockchip,cs-inactive-disable:
98    description: Add this property to disable the cs inactive interrupt for spi
99      slave.
100    type: boolean
101
102  ready-gpios:
103    description: GPIO spec for the spi slave ready signal.
104    maxItems: 1
105
106required:
107  - compatible
108  - reg
109  - interrupts
110  - clocks
111  - clock-names
112
113unevaluatedProperties: false
114
115examples:
116  - |
117    #include <dt-bindings/clock/rk3188-cru-common.h>
118    #include <dt-bindings/interrupt-controller/arm-gic.h>
119    #include <dt-bindings/interrupt-controller/irq.h>
120    spi0: spi@ff110000 {
121      compatible = "rockchip,rk3066-spi";
122      reg = <0xff110000 0x1000>;
123      interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
124      clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
125      clock-names = "spiclk", "apb_pclk";
126      dmas = <&pdma1 11>, <&pdma1 12>;
127      dma-names = "tx", "rx";
128      pinctrl-0 = <&spi1_pins>;
129      pinctrl-1 = <&spi1_sleep>;
130      pinctrl-names = "default", "sleep";
131      rx-sample-delay-ns = <10>;
132      #address-cells = <1>;
133      #size-cells = <0>;
134    };
135