1# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note 2# 3# (C) COPYRIGHT 2017, 2019-2021 ARM Limited. All rights reserved. 4# 5# This program is free software and is provided to you under the terms of the 6# GNU General Public License version 2 as published by the Free Software 7# Foundation, and any use by you of this program is subject to the terms 8# of such GNU license. 9# 10# This program is distributed in the hope that it will be useful, 11# but WITHOUT ANY WARRANTY; without even the implied warranty of 12# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13# GNU General Public License for more details. 14# 15# You should have received a copy of the GNU General Public License 16# along with this program; if not, you can access it online at 17# http://www.gnu.org/licenses/gpl-2.0.html. 18# 19# 20 21 22* ARM Mali Midgard OPP 23 24* OPP Table Node 25 26This describes the OPPs belonging to a device. This node can have following 27properties: 28 29Required properties: 30- compatible: Allow OPPs to express their compatibility. It should be: 31 "operating-points-v2", "operating-points-v2-mali". 32 33- OPP nodes: One or more OPP nodes describing voltage-current-frequency 34 combinations. Their name isn't significant but their phandle can be used to 35 reference an OPP. 36 37* OPP Node 38 39This defines voltage-current-frequency combinations along with other related 40properties. 41 42Required properties: 43- opp-hz: Nominal frequency in Hz, expressed as a 64-bit big-endian integer. 44 This should be treated as a relative performance measurement, taking both GPU 45 frequency and core mask into account. 46 47Optional properties: 48- opp-hz-real: List of one or two real frequencies in Hz, expressed as 64-bit 49 big-endian integers. They shall correspond to the clocks declared under 50 the Mali device node, and follow the same order. 51 52- opp-core-mask: Shader core mask. If neither this or opp-core-count are present 53 then all shader cores will be used for this OPP. 54 55- opp-core-count: Number of cores to use for this OPP. If this is present then 56 the driver will build a core mask using the available core mask provided by 57 the GPU hardware. An opp-core-count value of 0 is not permitted. 58 59 If neither this nor opp-core-mask are present then all shader cores will be 60 used for this OPP. 61 62 If both this and opp-core-mask are present then opp-core-mask is ignored. 63 64- opp-microvolt: List of one or two voltages in micro Volts. They shall correspond 65 to the regulators declared under the Mali device node, and follow the order: 66 "logic", "memory". 67 68 A single regulator's voltage is specified with an array of size one or three. 69 Single entry is for target voltage and three entries are for <target min max> 70 voltages. 71 72 Entries for multiple regulators must be present in the same order as 73 regulators are specified in device's DT node. 74 75- opp-microvolt-<name>: Named opp-microvolt property. This is exactly similar to 76 the above opp-microvolt property, but allows multiple voltage ranges to be 77 provided for the same OPP. At runtime, the platform can pick a <name> and 78 matching opp-microvolt-<name> property will be enabled for all OPPs. If the 79 platform doesn't pick a specific <name> or the <name> doesn't match with any 80 opp-microvolt-<name> properties, then opp-microvolt property shall be used, if 81 present. 82 83- opp-microamp: The maximum current drawn by the device in microamperes 84 considering system specific parameters (such as transients, process, aging, 85 maximum operating temperature range etc.) as necessary. This may be used to 86 set the most efficient regulator operating mode. 87 88 Should only be set if opp-microvolt is set for the OPP. 89 90 Entries for multiple regulators must be present in the same order as 91 regulators are specified in device's DT node. If this property isn't required 92 for few regulators, then this should be marked as zero for them. If it isn't 93 required for any regulator, then this property need not be present. 94 95- opp-microamp-<name>: Named opp-microamp property. Similar to 96 opp-microvolt-<name> property, but for microamp instead. 97 98- clock-latency-ns: Specifies the maximum possible transition latency (in 99 nanoseconds) for switching to this OPP from any other OPP. 100 101- turbo-mode: Marks the OPP to be used only for turbo modes. Turbo mode is 102 available on some platforms, where the device can run over its operating 103 frequency for a short duration of time limited by the device's power, current 104 and thermal limits. 105 106- opp-suspend: Marks the OPP to be used during device suspend. Only one OPP in 107 the table should have this. 108 109- opp-mali-errata-1485982: Marks the OPP to be selected for suspend clock. 110 This will be effective only if MALI_HW_ERRATA_1485982_USE_CLOCK_ALTERNATIVE is 111 enabled. It needs to be placed in any OPP that has proper suspend clock for 112 the HW workaround. 113 114- opp-supported-hw: This enables us to select only a subset of OPPs from the 115 larger OPP table, based on what version of the hardware we are running on. We 116 still can't have multiple nodes with the same opp-hz value in OPP table. 117 118 It's an user defined array containing a hierarchy of hardware version numbers, 119 supported by the OPP. For example: a platform with hierarchy of three levels 120 of versions (A, B and C), this field should be like <X Y Z>, where X 121 corresponds to Version hierarchy A, Y corresponds to version hierarchy B and Z 122 corresponds to version hierarchy C. 123 124 Each level of hierarchy is represented by a 32 bit value, and so there can be 125 only 32 different supported version per hierarchy. i.e. 1 bit per version. A 126 value of 0xFFFFFFFF will enable the OPP for all versions for that hierarchy 127 level. And a value of 0x00000000 will disable the OPP completely, and so we 128 never want that to happen. 129 130 If 32 values aren't sufficient for a version hierarchy, than that version 131 hierarchy can be contained in multiple 32 bit values. i.e. <X Y Z1 Z2> in the 132 above example, Z1 & Z2 refer to the version hierarchy Z. 133 134- status: Marks the node enabled/disabled. 135 136Example for a Juno with 1 clock and 1 regulator: 137 138gpu_opp_table: opp_table0 { 139 compatible = "operating-points-v2", "operating-points-v2-mali"; 140 141 opp@112500000 { 142 opp-hz = /bits/ 64 <112500000>; 143 opp-hz-real = /bits/ 64 <450000000>; 144 opp-microvolt = <820000>; 145 opp-core-mask = /bits/ 64 <0x1>; 146 opp-suspend; 147 opp-mali-errata-1485982; 148 }; 149 opp@225000000 { 150 opp-hz = /bits/ 64 <225000000>; 151 opp-hz-real = /bits/ 64 <450000000>; 152 opp-microvolt = <820000>; 153 opp-core-count = <2>; 154 }; 155 opp@450000000 { 156 opp-hz = /bits/ 64 <450000000>; 157 opp-hz-real = /bits/ 64 <450000000>; 158 opp-microvolt = <820000>; 159 opp-core-mask = /bits/ 64 <0xf>; 160 }; 161 opp@487500000 { 162 opp-hz = /bits/ 64 <487500000>; 163 opp-microvolt = <825000>; 164 }; 165 opp@525000000 { 166 opp-hz = /bits/ 64 <525000000>; 167 opp-microvolt = <850000>; 168 }; 169 opp@562500000 { 170 opp-hz = /bits/ 64 <562500000>; 171 opp-microvolt = <875000>; 172 }; 173 opp@600000000 { 174 opp-hz = /bits/ 64 <600000000>; 175 opp-microvolt = <900000>; 176 }; 177}; 178 179Example for a Juno with 2 clocks and 2 regulators: 180 181gpu_opp_table: opp_table0 { 182 compatible = "operating-points-v2", "operating-points-v2-mali"; 183 184 opp@0 { 185 opp-hz = /bits/ 64 <50000000>; 186 opp-hz-real = /bits/ 64 <50000000>, /bits/ 64 <45000000>; 187 opp-microvolt = <820000>, <800000>; 188 opp-core-mask = /bits/ 64 <0xf>; 189 }; 190 opp@1 { 191 opp-hz = /bits/ 64 <40000000>; 192 opp-hz-real = /bits/ 64 <40000000>, /bits/ 64 <35000000>; 193 opp-microvolt = <720000>, <700000>; 194 opp-core-mask = /bits/ 64 <0x7>; 195 }; 196 opp@2 { 197 opp-hz = /bits/ 64 <30000000>; 198 opp-hz-real = /bits/ 64 <30000000>, /bits/ 64 <25000000>; 199 opp-microvolt = <620000>, <700000>; 200 opp-core-mask = /bits/ 64 <0x3>; 201 }; 202}; 203