xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/phy-rockchip-inno-usb2.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip USB2.0 phy with inno IP block
8
9maintainers:
10  - Heiko Stuebner <heiko@sntech.de>
11
12properties:
13  compatible:
14    enum:
15      - rockchip,px30-usb2phy
16      - rockchip,rk1808-usb2phy
17      - rockchip,rk3128-usb2phy
18      - rockchip,rk3228-usb2phy
19      - rockchip,rk3308-usb2phy
20      - rockchip,rk3328-usb2phy
21      - rockchip,rk3366-usb2phy
22      - rockchip,rk3368-usb2phy
23      - rockchip,rk3399-usb2phy
24      - rockchip,rk3568-usb2phy
25      - rockchip,rk3588-usb2phy
26      - rockchip,rv1106-usb2phy
27      - rockchip,rv1108-usb2phy
28
29  reg:
30    maxItems: 1
31
32  clock-output-names:
33    description:
34      The usb 480m output clock name.
35
36  "#clock-cells":
37    const: 0
38
39  "#phy-cells":
40    const: 0
41
42  clocks:
43    maxItems: 1
44
45  clock-names:
46    const: phyclk
47
48  assigned-clocks:
49    description:
50      Phandle of the usb 480m clock.
51
52  assigned-clock-parents:
53    description:
54      Parent of the usb 480m clock.
55      Select between usb-phy output 480m and xin24m.
56      Refer to clk/clock-bindings.txt for generic clock consumer properties.
57
58  extcon:
59    description:
60      Phandle to the extcon device providing the cable state for the otg phy.
61
62  wakeup-source:
63    description:
64      Enable USB irq wakeup when suspend.
65      Only work when suspend wakeup-config is not work.
66
67  rockchip,usbgrf:
68    $ref: /schemas/types.yaml#/definitions/phandle
69    description:
70      Phandle to the syscon managing the 'usb general register files'.
71      When set the driver will request its phandle as one companion-grf
72      for some special SoCs (e.g rv1108).
73
74  rockchip,usbctrl-grf:
75    $ref: /schemas/types.yaml#/definitions/phandle
76    description:
77      Phandle to the syscon managing the 'usb ctrl general register files'.
78      When set the driver will request its phandle as the
79      usb controller grf for some SoCs (e.g rk3588).
80
81  rockchip,u2phy-tuning:
82    $ref: /schemas/types.yaml#/definitions/flag
83    description: when set, tuning u2phy to improve usb2 SI.
84
85  host-port:
86    type: object
87    additionalProperties: false
88
89    properties:
90      "#phy-cells":
91        const: 0
92
93      interrupts:
94        description: host linestate interrupt
95
96      interrupt-names:
97        const: linestate
98
99      phy-supply:
100        description:
101          Phandle to a regulator that provides power to VBUS.
102          See ./phy-bindings.txt for details.
103
104    required:
105      - "#phy-cells"
106      - interrupts
107      - interrupt-names
108
109  otg-port:
110    type: object
111    additionalProperties: false
112
113    properties:
114      "#phy-cells":
115        const: 0
116
117      interrupts:
118        minItems: 1
119        maxItems: 3
120
121      interrupt-names:
122        oneOf:
123          - const: linestate
124          - const: otg-mux
125          - items:
126              - const: otg-bvalid
127              - const: otg-id
128              - const: linestate
129
130      phy-supply:
131        description:
132          Phandle to a regulator that provides power to VBUS.
133          See ./phy-bindings.txt for details.
134
135      vbus-supply:
136        description:
137          Phandle to a fixed-regulator that provides power to VBUS.
138
139      rockchip,utmi-bypass-uart:
140        $ref: /schemas/types.yaml#/definitions/flag
141        description: when set, indicates that support usb to bypass uart
142          feature. This property can only be added in debug stage.
143
144      rockchip,utmi-avalid:
145        $ref: /schemas/types.yaml#/definitions/flag
146        description: when set, the usb2 phy will use avalid status bit to
147          get vbus status. If not, it will use bvalid status bit to get vbus
148          status by default.
149
150     rockchip,vbus-always-on:
151       $ref: /schemas/types.yaml#/definitions/flag
152       description: when set, indicates that the otg vbus is always powered on.
153
154     rockchip,low-power-mode:
155       $ref: /schemas/types.yaml#/definitions/flag
156       description: when set, the port will enter low power state when suspend.
157
158     rockchip,typec-vbus-det:
159       $ref: /schemas/types.yaml#/definitions/flag
160       description: when set, check the vbus status from grf con for Type-C
161         interface. It's used when the vbusdet pin is always pulled up.
162
163     rockchip,sel-pipe-phystatus:
164       $ref: /schemas/types.yaml#/definitions/flag
165       description: when set, select the pipe phy status from grf for usb
166         controller. It's used when the usb3 phy is disabled, and it needs
167         to combine with the usbctrl-grf.
168
169     rockchip,dis-u2-susphy:
170       $ref: /schemas/types.yaml#/definitions/flag
171       description: when set, disable the usb2 phy enter suspend automatically.
172
173    required:
174      - "#phy-cells"
175      - interrupts
176      - interrupt-names
177
178required:
179  - compatible
180  - reg
181  - clock-output-names
182  - "#clock-cells"
183  - "#phy-cells"
184  - host-port
185  - otg-port
186
187additionalProperties: false
188
189examples:
190  - |
191    #include <dt-bindings/clock/rk3399-cru.h>
192    #include <dt-bindings/interrupt-controller/arm-gic.h>
193    #include <dt-bindings/interrupt-controller/irq.h>
194    u2phy0: usb2-phy@e450 {
195      compatible = "rockchip,rk3399-usb2phy";
196      reg = <0xe450 0x10>;
197      clocks = <&cru SCLK_USB2PHY0_REF>;
198      clock-names = "phyclk";
199      clock-output-names = "clk_usbphy0_480m";
200      #clock-cells = <0>;
201      #phy-cells = <0>;
202
203      u2phy0_host: host-port {
204        #phy-cells = <0>;
205        interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
206        interrupt-names = "linestate";
207      };
208
209      u2phy0_otg: otg-port {
210        #phy-cells = <0>;
211        interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
212                     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
213                     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
214        interrupt-names = "otg-bvalid", "otg-id", "linestate";
215      };
216    };
217