1From ce768160ee1ee9673d60e800389c41b3c707411a Mon Sep 17 00:00:00 2001
2From: Richard Henderson <richard.henderson@linaro.org>
3Date: Fri, 17 Dec 2021 17:57:15 +0100
4Subject: [PATCH 09/21] target/ppc: Update fmadd for new flags
5MIME-Version: 1.0
6Content-Type: text/plain; charset=UTF-8
7Content-Transfer-Encoding: 8bit
8
9Now that vximz, vxisi, and vxsnan are computed directly by
10softfloat, we don't need to recompute it.  This replaces the
11separate float{32,64}_maddsub_update_excp functions with a
12single float_invalid_op_madd function.
13
14Fix VSX_MADD by passing sfprf to float_invalid_op_madd,
15whereas the previous *_maddsub_update_excp assumed it true.
16
17Upstream-Status: Backport
18[https://git.qemu.org/?p=qemu.git;a=commit;h=e4052bb773cc829a27786d68caa22f28cff19d39]
19
20Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
21Message-Id: <20211119160502.17432-19-richard.henderson@linaro.org>
22Signed-off-by: Cédric Le Goater <clg@kaod.org>
23Signed-off-by: Xiangyu Chen <xiangyu.chen@windriver.com>
24---
25 target/ppc/fpu_helper.c | 46 ++++++++++-------------------------------
26 1 file changed, 11 insertions(+), 35 deletions(-)
27
28diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
29index 2ab34236a3..3b1cb25666 100644
30--- a/target/ppc/fpu_helper.c
31+++ b/target/ppc/fpu_helper.c
32@@ -639,38 +639,15 @@ uint64_t helper_frim(CPUPPCState *env, uint64_t arg)
33     return do_fri(env, arg, float_round_down);
34 }
35
36-#define FPU_MADDSUB_UPDATE(NAME, TP)                                    \
37-static void NAME(CPUPPCState *env, TP arg1, TP arg2, TP arg3,           \
38-                 unsigned int madd_flags, uintptr_t retaddr)            \
39-{                                                                       \
40-    if (TP##_is_signaling_nan(arg1, &env->fp_status) ||                 \
41-        TP##_is_signaling_nan(arg2, &env->fp_status) ||                 \
42-        TP##_is_signaling_nan(arg3, &env->fp_status)) {                 \
43-        /* sNaN operation */                                            \
44-        float_invalid_op_vxsnan(env, retaddr);                          \
45-    }                                                                   \
46-    if ((TP##_is_infinity(arg1) && TP##_is_zero(arg2)) ||               \
47-        (TP##_is_zero(arg1) && TP##_is_infinity(arg2))) {               \
48-        /* Multiplication of zero by infinity */                        \
49-        float_invalid_op_vximz(env, 1, retaddr);                        \
50-    }                                                                   \
51-    if ((TP##_is_infinity(arg1) || TP##_is_infinity(arg2)) &&           \
52-        TP##_is_infinity(arg3)) {                                       \
53-        uint8_t aSign, bSign, cSign;                                    \
54-                                                                        \
55-        aSign = TP##_is_neg(arg1);                                      \
56-        bSign = TP##_is_neg(arg2);                                      \
57-        cSign = TP##_is_neg(arg3);                                      \
58-        if (madd_flags & float_muladd_negate_c) {                       \
59-            cSign ^= 1;                                                 \
60-        }                                                               \
61-        if (aSign ^ bSign ^ cSign) {                                    \
62-            float_invalid_op_vxisi(env, 1, retaddr);                    \
63-        }                                                               \
64-    }                                                                   \
65+static void float_invalid_op_madd(CPUPPCState *env, int flags,
66+                                  bool set_fpcc, uintptr_t retaddr)
67+{
68+    if (flags & float_flag_invalid_imz) {
69+        float_invalid_op_vximz(env, set_fpcc, retaddr);
70+    } else {
71+        float_invalid_op_addsub(env, flags, set_fpcc, retaddr);
72+    }
73 }
74-FPU_MADDSUB_UPDATE(float32_maddsub_update_excp, float32)
75-FPU_MADDSUB_UPDATE(float64_maddsub_update_excp, float64)
76
77 #define FPU_FMADD(op, madd_flags)                                       \
78 uint64_t helper_##op(CPUPPCState *env, uint64_t arg1,                   \
79@@ -682,8 +659,7 @@ uint64_t helper_##op(CPUPPCState *env, uint64_t arg1,                   \
80     flags = get_float_exception_flags(&env->fp_status);                 \
81     if (flags) {                                                        \
82         if (flags & float_flag_invalid) {                               \
83-            float64_maddsub_update_excp(env, arg1, arg2, arg3,          \
84-                                        madd_flags, GETPC());           \
85+            float_invalid_op_madd(env, flags, 1, GETPC());              \
86         }                                                               \
87         do_float_check_status(env, GETPC());                            \
88     }                                                                   \
89@@ -2087,8 +2063,8 @@ void helper_##op(CPUPPCState *env, ppc_vsr_t *xt,                             \
90         env->fp_status.float_exception_flags |= tstat.float_exception_flags;  \
91                                                                               \
92         if (unlikely(tstat.float_exception_flags & float_flag_invalid)) {     \
93-            tp##_maddsub_update_excp(env, xa->fld, b->fld,                    \
94-                                     c->fld, maddflgs, GETPC());              \
95+            float_invalid_op_madd(env, tstat.float_exception_flags,           \
96+                                  sfprf, GETPC());                            \
97         }                                                                     \
98                                                                               \
99         if (r2sp) {                                                           \
100--
1012.17.1
102
103