1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 /* 3 * 4 * (C) COPYRIGHT 2022 ARM Limited. All rights reserved. 5 * 6 * This program is free software and is provided to you under the terms of the 7 * GNU General Public License version 2 as published by the Free Software 8 * Foundation, and any use by you of this program is subject to the terms 9 * of such GNU license. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, you can access it online at 18 * http://www.gnu.org/licenses/gpl-2.0.html. 19 * 20 */ 21 22 #ifndef _UAPI_BASE_COMMON_KERNEL_H_ 23 #define _UAPI_BASE_COMMON_KERNEL_H_ 24 25 #include <linux/types.h> 26 27 struct base_mem_handle { 28 struct { 29 __u64 handle; 30 } basep; 31 }; 32 33 #define BASE_GPU_NUM_TEXTURE_FEATURES_REGISTERS 4 34 35 /* Memory allocation, access/hint flags & mask. 36 * 37 * See base_mem_alloc_flags. 38 */ 39 40 /* IN */ 41 /* Read access CPU side 42 */ 43 #define BASE_MEM_PROT_CPU_RD ((base_mem_alloc_flags)1 << 0) 44 45 /* Write access CPU side 46 */ 47 #define BASE_MEM_PROT_CPU_WR ((base_mem_alloc_flags)1 << 1) 48 49 /* Read access GPU side 50 */ 51 #define BASE_MEM_PROT_GPU_RD ((base_mem_alloc_flags)1 << 2) 52 53 /* Write access GPU side 54 */ 55 #define BASE_MEM_PROT_GPU_WR ((base_mem_alloc_flags)1 << 3) 56 57 /* Execute allowed on the GPU side 58 */ 59 #define BASE_MEM_PROT_GPU_EX ((base_mem_alloc_flags)1 << 4) 60 61 /* Will be permanently mapped in kernel space. 62 * Flag is only allowed on allocations originating from kbase. 63 */ 64 #define BASEP_MEM_PERMANENT_KERNEL_MAPPING ((base_mem_alloc_flags)1 << 5) 65 66 /* The allocation will completely reside within the same 4GB chunk in the GPU 67 * virtual space. 68 * Since this flag is primarily required only for the TLS memory which will 69 * not be used to contain executable code and also not used for Tiler heap, 70 * it can't be used along with BASE_MEM_PROT_GPU_EX and TILER_ALIGN_TOP flags. 71 */ 72 #define BASE_MEM_GPU_VA_SAME_4GB_PAGE ((base_mem_alloc_flags)1 << 6) 73 74 /* Userspace is not allowed to free this memory. 75 * Flag is only allowed on allocations originating from kbase. 76 */ 77 #define BASEP_MEM_NO_USER_FREE ((base_mem_alloc_flags)1 << 7) 78 79 /* Grow backing store on GPU Page Fault 80 */ 81 #define BASE_MEM_GROW_ON_GPF ((base_mem_alloc_flags)1 << 9) 82 83 /* Page coherence Outer shareable, if available 84 */ 85 #define BASE_MEM_COHERENT_SYSTEM ((base_mem_alloc_flags)1 << 10) 86 87 /* Page coherence Inner shareable 88 */ 89 #define BASE_MEM_COHERENT_LOCAL ((base_mem_alloc_flags)1 << 11) 90 91 /* IN/OUT */ 92 /* Should be cached on the CPU, returned if actually cached 93 */ 94 #define BASE_MEM_CACHED_CPU ((base_mem_alloc_flags)1 << 12) 95 96 /* IN/OUT */ 97 /* Must have same VA on both the GPU and the CPU 98 */ 99 #define BASE_MEM_SAME_VA ((base_mem_alloc_flags)1 << 13) 100 101 /* OUT */ 102 /* Must call mmap to acquire a GPU address for the allocation 103 */ 104 #define BASE_MEM_NEED_MMAP ((base_mem_alloc_flags)1 << 14) 105 106 /* IN */ 107 /* Page coherence Outer shareable, required. 108 */ 109 #define BASE_MEM_COHERENT_SYSTEM_REQUIRED ((base_mem_alloc_flags)1 << 15) 110 111 /* Protected memory 112 */ 113 #define BASE_MEM_PROTECTED ((base_mem_alloc_flags)1 << 16) 114 115 /* Not needed physical memory 116 */ 117 #define BASE_MEM_DONT_NEED ((base_mem_alloc_flags)1 << 17) 118 119 /* Must use shared CPU/GPU zone (SAME_VA zone) but doesn't require the 120 * addresses to be the same 121 */ 122 #define BASE_MEM_IMPORT_SHARED ((base_mem_alloc_flags)1 << 18) 123 124 /* Should be uncached on the GPU, will work only for GPUs using AARCH64 mmu 125 * mode. Some components within the GPU might only be able to access memory 126 * that is GPU cacheable. Refer to the specific GPU implementation for more 127 * details. The 3 shareability flags will be ignored for GPU uncached memory. 128 * If used while importing USER_BUFFER type memory, then the import will fail 129 * if the memory is not aligned to GPU and CPU cache line width. 130 */ 131 #define BASE_MEM_UNCACHED_GPU ((base_mem_alloc_flags)1 << 21) 132 133 /* 134 * Bits [22:25] for group_id (0~15). 135 * 136 * base_mem_group_id_set() should be used to pack a memory group ID into a 137 * base_mem_alloc_flags value instead of accessing the bits directly. 138 * base_mem_group_id_get() should be used to extract the memory group ID from 139 * a base_mem_alloc_flags value. 140 */ 141 #define BASEP_MEM_GROUP_ID_SHIFT 22 142 #define BASE_MEM_GROUP_ID_MASK ((base_mem_alloc_flags)0xF << BASEP_MEM_GROUP_ID_SHIFT) 143 144 /* Must do CPU cache maintenance when imported memory is mapped/unmapped 145 * on GPU. Currently applicable to dma-buf type only. 146 */ 147 #define BASE_MEM_IMPORT_SYNC_ON_MAP_UNMAP ((base_mem_alloc_flags)1 << 26) 148 149 /* OUT */ 150 /* Kernel side cache sync ops required */ 151 #define BASE_MEM_KERNEL_SYNC ((base_mem_alloc_flags)1 << 28) 152 153 /* Number of bits used as flags for base memory management 154 * 155 * Must be kept in sync with the base_mem_alloc_flags flags 156 */ 157 #define BASE_MEM_FLAGS_NR_BITS 30 158 159 /* A mask for all output bits, excluding IN/OUT bits. 160 */ 161 #define BASE_MEM_FLAGS_OUTPUT_MASK BASE_MEM_NEED_MMAP 162 163 /* A mask for all input bits, including IN/OUT bits. 164 */ 165 #define BASE_MEM_FLAGS_INPUT_MASK \ 166 (((1 << BASE_MEM_FLAGS_NR_BITS) - 1) & ~BASE_MEM_FLAGS_OUTPUT_MASK) 167 168 /* Special base mem handles. 169 */ 170 #define BASEP_MEM_INVALID_HANDLE (0ul) 171 #define BASE_MEM_MMU_DUMP_HANDLE (1ul << LOCAL_PAGE_SHIFT) 172 #define BASE_MEM_TRACE_BUFFER_HANDLE (2ul << LOCAL_PAGE_SHIFT) 173 #define BASE_MEM_MAP_TRACKING_HANDLE (3ul << LOCAL_PAGE_SHIFT) 174 #define BASEP_MEM_WRITE_ALLOC_PAGES_HANDLE (4ul << LOCAL_PAGE_SHIFT) 175 /* reserved handles ..-47<<PAGE_SHIFT> for future special handles */ 176 #define BASE_MEM_COOKIE_BASE (64ul << LOCAL_PAGE_SHIFT) 177 #define BASE_MEM_FIRST_FREE_ADDRESS ((BITS_PER_LONG << LOCAL_PAGE_SHIFT) + BASE_MEM_COOKIE_BASE) 178 179 /* Flags to pass to ::base_context_init. 180 * Flags can be ORed together to enable multiple things. 181 * 182 * These share the same space as BASEP_CONTEXT_FLAG_*, and so must 183 * not collide with them. 184 */ 185 typedef __u32 base_context_create_flags; 186 187 /* Flags for base context */ 188 189 /* No flags set */ 190 #define BASE_CONTEXT_CREATE_FLAG_NONE ((base_context_create_flags)0) 191 192 /* Base context is embedded in a cctx object (flag used for CINSTR 193 * software counter macros) 194 */ 195 #define BASE_CONTEXT_CCTX_EMBEDDED ((base_context_create_flags)1 << 0) 196 197 /* Base context is a 'System Monitor' context for Hardware counters. 198 * 199 * One important side effect of this is that job submission is disabled. 200 */ 201 #define BASE_CONTEXT_SYSTEM_MONITOR_SUBMIT_DISABLED ((base_context_create_flags)1 << 1) 202 203 /* Bit-shift used to encode a memory group ID in base_context_create_flags 204 */ 205 #define BASEP_CONTEXT_MMU_GROUP_ID_SHIFT (3) 206 207 /* Bitmask used to encode a memory group ID in base_context_create_flags 208 */ 209 #define BASEP_CONTEXT_MMU_GROUP_ID_MASK \ 210 ((base_context_create_flags)0xF << BASEP_CONTEXT_MMU_GROUP_ID_SHIFT) 211 212 /* Bitpattern describing the base_context_create_flags that can be 213 * passed to the kernel 214 */ 215 #define BASEP_CONTEXT_CREATE_KERNEL_FLAGS \ 216 (BASE_CONTEXT_SYSTEM_MONITOR_SUBMIT_DISABLED | BASEP_CONTEXT_MMU_GROUP_ID_MASK) 217 218 /* Flags for base tracepoint 219 */ 220 221 /* Enable additional tracepoints for latency measurements (TL_ATOM_READY, 222 * TL_ATOM_DONE, TL_ATOM_PRIO_CHANGE, TL_ATOM_EVENT_POST) 223 */ 224 #define BASE_TLSTREAM_ENABLE_LATENCY_TRACEPOINTS (1 << 0) 225 226 /* Indicate that job dumping is enabled. This could affect certain timers 227 * to account for the performance impact. 228 */ 229 #define BASE_TLSTREAM_JOB_DUMPING_ENABLED (1 << 1) 230 231 #endif /* _UAPI_BASE_COMMON_KERNEL_H_ */ 232