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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 //////////////////////////////////////////////////////////////////////////////////////////////////// 96 /// 97 /// @file drvCMDQ.h 98 /// @brief CMDQ Driver Interface 99 /// @author MStar Semiconductor,Inc. 100 /// 101 //////////////////////////////////////////////////////////////////////////////////////////////////// 102 103 #ifndef _DRVCMDQ_H_ 104 #define _DRVCMDQ_H_ 105 106 #include "MsTypes.h" 107 #include "MsCommon.h" 108 109 #ifdef __cplusplus 110 extern "C" 111 { 112 #endif 113 114 //-------------------------------------------------------------------------------------------------- 115 // Define 116 //-------------------------------------------------------------------------------------------------- 117 #define AES_ENABLE 0x01 118 #define TDES_ENABLE 0x10 119 #define WORD_MASK 0x0000000F 120 121 #define DIRECT_MODE 0x01 122 #define INCREMENT_MODE 0x00 123 #define RING_BUFFER_MODE 0x04 124 125 #define MSIF_CMDQ_LIB_CODE {'C','M','D','Q'} //Lib code 126 #define MSIF_CMDQ_LIBVER {'0','1'} //LIB version 127 #define MSIF_CMDQ_BUILDNUM {'0','1'} //Build Number 128 #define MSIF_CMDQ_CHANGELIST {'0','0','0','0','0','0','0','0'} //P4 ChangeList Number 129 130 #define CMDQ_DRV_VERSION /* Character String for DRV/API version */ \ 131 MSIF_TAG, /* 'MSIF' */ \ 132 MSIF_CLASS, /* '00' */ \ 133 MSIF_CUS, /* 0x0000 */ \ 134 MSIF_MOD, /* 0x0000 */ \ 135 MSIF_CHIP, \ 136 MSIF_CPU, \ 137 MSIF_CMDQ_LIB_CODE, /* IP__ */ \ 138 MSIF_CMDQ_LIBVER, /* 0.0 ~ Z.Z */ \ 139 MSIF_CMDQ_BUILDNUM, /* 00 ~ 99 */ \ 140 MSIF_CMDQ_CHANGELIST, /* CL# */ \ 141 MSIF_OS 142 143 typedef enum 144 { 145 E_DRVCMDQ_DBG_Release = 0, 146 E_DRVCMDQ_DBG_L1, // display debug msg 147 } DrvCMDQ_DbgLevel; 148 149 // Trigger Bus 150 typedef enum // wait command signal defination 151 { 152 GE_GE2CMDQ_TRI = 0, 153 BDMA_INT_BDMA_0, 154 BDMA_INT_BDMA_1, 155 GPU_GPU2CMDQ_TRIG, 156 GOPG0_GOP_CMDQ_INT_0, 157 GOPG1_GOP_CMDQ_INT_1, 158 GOPG2_GOP_CMDQ_INT_2, 159 GOPG3_GOP_CMDQ_INT_3, 160 SCALAR_SC2CMDQ_TRIG_0, 161 SCALAR_SC2CMDQ_TRIG_1, 162 SCALAR_SC2CMDQ_TRIG_2, 163 SCALAR_SC2CMDQ_TRIG_3, 164 AESDMA_CMDQDMA_FINISHED, 165 VOP_DCM2GOP_VDE, 166 VOP_DCS2GOP_VDE, 167 XC_DIP_CMDQ_INT, 168 AESDMA_CMDQDMA_FINISHED_2, 169 NONE_USED_SIGNAL , 170 }EN_CMDQTriggerBus_ID; 171 172 #define CMDQ_Write_RIU_Command 'W' 173 #define CMDQ_Polling_RIU_EQ_Command 'p' 174 #define CMDQ_Polling_RIU_NEQ_Command 'C' 175 #define CMDQ_Wait_SIG_Command 'F' 176 177 //-------------------------------------------------------------------------------------------------- 178 // Driver Capability 179 //-------------------------------------------------------------------------------------------------- 180 181 //-------------------------------------------------------------------------------------------------- 182 // Local variable 183 //----------------------------------------------------------------------------------------------- 184 #define CMDQ_DUMMY_ZERO 0x00000000 185 #define CMDQ_DUMMY_BIT_0x00 0x00000001 186 #define CMDQ_DUMMY_BIT_0x01 0x00000002 187 #define CMDQ_DUMMY_BIT_0x02 0x00000004 188 #define CMDQ_DUMMY_BIT_0x03 0x00000008 189 #define CMDQ_DUMMY_BIT_0x04 0x00000010 190 #define CMDQ_DUMMY_BIT_0x05 0x00000020 191 #define CMDQ_DUMMY_BIT_0x06 0x00000040 192 #define CMDQ_DUMMY_BIT_0x07 0x00000080 193 #define CMDQ_DUMMY_BIT_0x08 0x00000100 194 #define CMDQ_DUMMY_BIT_0x09 0x00000200 195 #define CMDQ_DUMMY_BIT_0x0A 0x00000400 196 #define CMDQ_DUMMY_BIT_0x0B 0x00000800 197 #define CMDQ_DUMMY_BIT_0x0C 0x00001000 198 #define CMDQ_DUMMY_BIT_0x0D 0x00002000 199 #define CMDQ_DUMMY_BIT_0x0E 0x00004000 200 #define CMDQ_DUMMY_BIT_0x0F 0x00008000 201 //-------------------------------------------------------------------------------------------------- 202 // Type and Structure 203 //-------------------------------------------------------------------------------------------------- 204 struct COMMAND_ARRAY_FORMAT 205 { 206 MS_U8 operation; 207 MS_U32 destionation_address; // the writed register address 208 MS_U16 destionation_value; // value writed to register 209 MS_U16 mask; // value of mask 210 }; 211 212 typedef struct COMMAND_ARRAY_FORMAT CAF_Struct; 213 typedef CAF_Struct *CAF_Struct_Pointer; 214 215 struct CMDQ_HEAD 216 { 217 MS_SIZE Command_Number; 218 CAF_Struct_Pointer Pointer_To_CAFArray; 219 }; 220 typedef struct CMDQ_HEAD CH_Struct; 221 typedef CH_Struct *CH_Struct_Pointer; 222 223 224 /// CMDQ DDI return value 225 typedef MS_U32 DRVCMDQ_RESULT; 226 227 /// @name DRVCMDQ_RESULT 228 /// @ref DRVCMDQ_RESULT 229 /// return value 230 /// @{ 231 #define DRVCMDQ_OK 0x00000000 232 #define DRVCMDQ_FAIL 0x00000001 233 #define DRVCMDQ_INVALID_PARAM 0x00000002 234 #define DRVCMDQ_FUNC_ERROR 0x00000003 235 #define DRVCMDQ_MIU_ADDR_ERROR 0x00000004 236 #define DRVCMDQ_CMDQ_FULL 0x00000005 237 238 /// @} 239 240 #define CMDQ_DMA_DONE 0x00010000 241 #define CMDQ_DMA_PAUSE 0x00020000 242 #define CMDQ_STATES_GROUP (CMDQ_DMA_DONE | \ 243 CMDQ_DMA_PAUSE ) 244 245 246 #define CMDQ_VERSION 0x00000001 247 248 /*! \defgroup SYS SYS modules 249 The CMDQ(COMMAND QUEUE) reads a set of commands from memory and then decodes commands and execute it. There are five actions as below: 250 - Null: do nothing but execute next command. 251 - Write: write RIU command to XARB. 252 - Wait: wait for a specified bit of trigger bus and then execute next command. 253 - Polling_eq: read RIU data and check specified bits. If it is equal, next command will be executed. 254 - Polling_neq: read RIU data and check specified bits. If it is not equal, next command will be executed.\n 255 For more information,see \link SYS_CMDQ Hardware command Q interface (drvCMDQ.h) \endlink \n 256 257 MMIO maps the RIU to userspace so that drivers are capable to access it directly.\n 258 For more information,see \link MMIO_BASIC basic mmio interface \endlink \n 259 260 MsOS is an OS abstraction layer, which is for utopia drivers 261 not to consider different system API usage on each platform.\n 262 For more information,see \link MSOS MsOS interface (MsOS.h) \endlink \n 263 264 * \defgroup SYS_CMDQ Hardware command Q interface (drvCMDQ.h) 265 * \ingroup SYS 266 267 The CMDQ(COMMAND QUEUE) reads a set of commands from memory and then decodes commands and execute it. There are five actions as below: 268 - Null: do nothing but execute next command. 269 - Write: write RIU command to XARB. 270 - Wait: wait for a specified bit of trigger bus and then execute next command. 271 - Polling_eq: read RIU data and check specified bits. If it is equal, next command will be executed. 272 - Polling_neq: read RIU data and check specified bits. If it is not equal, next command will be executed. 273 These five commands have their own format and each command occupies 64 bits. Therefore, for command queue, a 128-bit MIU interface of this IP, two commands are placed at the same address 274 275 The CMDQ execution mode we use is Ring-Buffer Mode. There are two address pointers, r and w, move around a given memory space, which is limited between start pointer and end pointer. 276 Software part tells cmdq where is the current write address pointer(w), and cmdq will do the command sets that software writes. 277 Once software finishes storing commands in memory, it needs write current write address pointer(sw_wr_mi_wadr) and generate a trigger(mov_cmd_ptr) to inform cmdq. 278 If software wants to know where cmdq reads, the trigger signal, rd_mi_radr_trig, needs to send to cmdq to grab current read address pointer (rd_mi_radr). 279 Note that current read address pointer does not represent all data that is behind current read address pointer is sent to cmdq. 280 281 <b> CMDQ Block Diagram: </b> \n 282 \image html drvCMDQ_block_diagram.png 283 284 <b> Command Format: </b> \n 285 \image html drvCMDQ_command_format.png 286 287 <b> Commands in Memory: </b> \n 288 \image html drvCMDQ_command_in_memory.png 289 290 <b> Null Command: </b> \n 291 \image html drvCMDQ_null_cmd.png 292 293 <b> Write Command: </b> \n 294 \image html drvCMDQ_write_cmd.png 295 296 <b> Wait Command: </b> \n 297 \image html drvCMDQ_wait_cmd.png 298 299 <b> Polling eq Command: </b> \n 300 \image html drvCMDQ_polling_eq_cmd.png 301 302 <b> Polling neq Command: </b> \n 303 \image html drvCMDQ_polling_neq_cmd.png 304 305 <b> Ring-Buffer: </b> \n 306 \image html drvCMDQ_ring_buffer.png 307 308 * \defgroup CMDQ_BASIC 309 * \ingroup SYS_CMDQ 310 */ 311 312 /// CMDQ notification function 313 314 315 //-------------------------------------------------------------------------------------------------- 316 // Function Prototype 317 //-------------------------------------------------------------------------------------------------- 318 //------------------------------------------------------------------------------------------------- 319 /// Initialize CMDQ driver setting, including mmio and mutex 320 /// @ingroup CMDQ_BASIC 321 /// @param CMDQ_MIU_SELECT 322 /// @return 323 /// @return 324 //------------------------------------------------------------------------------------------------- 325 DRVCMDQ_RESULT MDrv_CMDQ_Init(MS_U32 CMDQ_MIU_SELECT); 326 327 //------------------------------------------------------------------------------------------------- 328 /// Get CMDQ driver lib version 329 /// @ingroup CMDQ_BASIC 330 /// @param ppVersion 331 /// @return 332 /// @return 333 //------------------------------------------------------------------------------------------------- 334 DRVCMDQ_RESULT MDrv_CMDQ_GetLibVer(const MSIF_Version **ppVersion); 335 336 //------------------------------------------------------------------------------------------------- 337 /// Trigger CMDQ hw to do cmd 338 /// @ingroup CMDQ_BASIC 339 /// @param bStart 340 /// @return 341 /// @return 342 //------------------------------------------------------------------------------------------------- 343 DRVCMDQ_RESULT MDrv_CMDQ_Start(MS_BOOL bStart); 344 //------------------------------------------------------------------------------------------------- 345 /// Set the Start and End address of CMDQ DRAM(use miu_offset and miu_select to get phy_addr) 346 /// @ingroup CMDQ_BASIC 347 /// @param SmallAddr 348 /// @param BigAddr 349 /// @param miu_select 350 /// @return 351 /// @return 352 //------------------------------------------------------------------------------------------------- 353 DRVCMDQ_RESULT MDrv_CMDQ_Get_Memory_Size(MS_PHY SmallAddr, MS_PHY BigAddr, MS_U32 miu_select); 354 355 //------------------------------------------------------------------------------------------------- 356 /// Set Start and End address to RIU throw hal layer 357 /// @ingroup CMDQ_BASIC 358 /// @param StartAddr 359 /// @param EndAddr 360 /// @return 361 /// @return 362 //------------------------------------------------------------------------------------------------- 363 DRVCMDQ_RESULT MDrv_CMDQ_Set_Buffer(MS_PHY StartAddr, MS_PHY EndAddr); 364 //------------------------------------------------------------------------------------------------- 365 /// To be remove 366 /// @ingroup CMDQ_BASIC 367 /// @return 368 /// @return 369 //------------------------------------------------------------------------------------------------- 370 DRVCMDQ_RESULT MDrv_CMDQ_Reset(void); 371 372 //------------------------------------------------------------------------------------------------- 373 /// To be remove 374 /// @ingroup CMDQ_BASIC 375 /// @return 376 /// @return 377 //------------------------------------------------------------------------------------------------- 378 DRVCMDQ_RESULT MDrv_CMDQ_Exit(void); 379 380 //------------------------------------------------------------------------------------------------- 381 /// To be remove 382 /// @ingroup CMDQ_BASIC 383 /// @return 384 /// @return 385 //------------------------------------------------------------------------------------------------- 386 DRVCMDQ_RESULT MDrv_CMDQ_Stop(void); 387 388 //------------------------------------------------------------------------------------------------- 389 /// Set debug_level(for print) 390 /// @ingroup CMDQ_BASIC 391 /// @param DbgLevel 392 /// @return 393 /// @return 394 //------------------------------------------------------------------------------------------------- 395 DRVCMDQ_RESULT MDrv_CMDQ_SetDbgLevel(DrvCMDQ_DbgLevel DbgLevel); 396 397 //------------------------------------------------------------------------------------------------- 398 /// Receive CMDQ command 399 /// @ingroup CMDQ_BASIC 400 /// @param New_IP_Head 401 /// @return 402 /// @return 403 //------------------------------------------------------------------------------------------------- 404 DRVCMDQ_RESULT MDrv_CMDQ_Receive(CH_Struct_Pointer New_IP_Head); 405 406 //------------------------------------------------------------------------------------------------- 407 /// Insert null command 408 /// @ingroup CMDQ_BASIC 409 /// @param Need_Null_Number 410 //------------------------------------------------------------------------------------------------- 411 void Insert_Redundant_Null(MS_U32 Need_Null_Number); 412 413 //------------------------------------------------------------------------------------------------- 414 /// Transfer command to memory 415 /// @ingroup CMDQ_BASIC 416 /// @param Array_Command 417 /// @param Number_Array_Command 418 //------------------------------------------------------------------------------------------------- 419 void MDrv_CMDQ_Transfer(CAF_Struct_Pointer Array_Command, MS_SIZE Number_Array_Command); 420 421 //------------------------------------------------------------------------------------------------- 422 /// Set dummy register for CMDQ 423 /// @ingroup CMDQ_BASIC 424 /// @param dummyAddr 425 //------------------------------------------------------------------------------------------------- 426 void MDrv_CMDQ_Set_dummy_Address(MS_U32 DummyValue); 427 //------------------------------------------------------------------------------------------------- 428 /// Set CMD buffer in which MIU 429 /// @ingroup CMDQ_BASIC 430 /// @param miu_select 431 //------------------------------------------------------------------------------------------------- 432 void MDrv_CMDQ_Set_MIU_SELECT(MS_U32 miu_select); 433 434 //------------------------------------------------------------------------------------------------- 435 /// Set CMDQ wait command timeout 436 /// @ingroup CMDQ_BASIC 437 /// @param time 438 /// @param ratio 439 /// @return 440 /// @return 441 //------------------------------------------------------------------------------------------------- 442 DRVCMDQ_RESULT MDrv_CMDQ_Set_timer_ratio(MS_U32 time,MS_U32 ratio); 443 444 //------------------------------------------------------------------------------------------------- 445 /// Print command of CMDQ?Afor debug usage 446 /// @ingroup CMDQ_BASIC 447 /// @return 448 /// @return 449 //------------------------------------------------------------------------------------------------- 450 DRVCMDQ_RESULT MDrv_CMDQ_Printf_Crash_Command(void); 451 452 //------------------------------------------------------------------------------------------------- 453 /// Produce wait_command for some specific HW IP behaviour 454 /// @ingroup CMDQ_BASIC 455 /// @param WaitTrigger_Bus_Command 456 /// @param u16Tigger_ID 457 /// @param bDetect_Falling_Mode 458 //------------------------------------------------------------------------------------------------- 459 void MDrv_CMDQ_Gen_WaitTrigger_Bus_Command(CAF_Struct_Pointer WaitTrigger_Bus_Command, EN_CMDQTriggerBus_ID u16Tigger_ID, MS_BOOL bDetect_Falling_Mode); 460 461 //------------------------------------------------------------------------------------------------- 462 /// Get CMDQ write point 463 /// @ingroup CMDQ_BASIC 464 /// @return 465 /// @return 466 //------------------------------------------------------------------------------------------------- 467 MS_U32 MDrv_CMDQ_GetWritePoint(void); 468 469 //------------------------------------------------------------------------------------------------- 470 /// Str_usage 471 /// @ingroup CMDQ_BASIC 472 /// @param u16PowerState 473 /// @return 474 /// @return 475 //------------------------------------------------------------------------------------------------- 476 MS_U32 MDrv_CMDQ_SetPowerState(EN_POWER_MODE u16PowerState); 477 478 MS_U32 MDrv_CMDQ_Get_FreeCmdLine_Size(); 479 480 void MDrv_CMD_WriteDummy(MS_U32 value); 481 482 MS_U32 MDrv_CMDQ_ReadDummy(); 483 484 #ifdef __cplusplus 485 } 486 #endif 487 488 489 #endif // _DRVCMDQ_H_ 490