Searched hist:ff7daec6f4bd151a1787c12db546509db49597df (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/services/std_svc/lfa/ |
| H A D | lfa_holding_pen.c | ff7daec6f4bd151a1787c12db546509db49597df Tue Apr 15 19:16:36 UTC 2025 Manish V Badarkhe <Manish.Badarkhe@arm.com> feat(lfa): add LFA holding pen logic
Add LFA holding logic to be used by the LFA activate SMC call to manage
CPU rendezvous. All CPUs are expected to invoke the LFA activate call
for the rendezvous, until then, they will remain on a holding lock.
When the final CPU calls LFA activate, it will release the holding
lock after completing the activation process on that CPU, allowing
the activation process on secondary CPUs to proceed.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Iff9e40dd87420245fe5844e286d0685c1f0db289
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| H A D | lfa.mk | ff7daec6f4bd151a1787c12db546509db49597df Tue Apr 15 19:16:36 UTC 2025 Manish V Badarkhe <Manish.Badarkhe@arm.com> feat(lfa): add LFA holding pen logic
Add LFA holding logic to be used by the LFA activate SMC call to manage
CPU rendezvous. All CPUs are expected to invoke the LFA activate call
for the rendezvous, until then, they will remain on a holding lock.
When the final CPU calls LFA activate, it will release the holding
lock after completing the activation process on that CPU, allowing
the activation process on secondary CPUs to proceed.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Iff9e40dd87420245fe5844e286d0685c1f0db289
|
| /rk3399_ARM-atf/include/services/ |
| H A D | lfa_holding_pen.h | ff7daec6f4bd151a1787c12db546509db49597df Tue Apr 15 19:16:36 UTC 2025 Manish V Badarkhe <Manish.Badarkhe@arm.com> feat(lfa): add LFA holding pen logic
Add LFA holding logic to be used by the LFA activate SMC call to manage
CPU rendezvous. All CPUs are expected to invoke the LFA activate call
for the rendezvous, until then, they will remain on a holding lock.
When the final CPU calls LFA activate, it will release the holding
lock after completing the activation process on that CPU, allowing
the activation process on secondary CPUs to proceed.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Iff9e40dd87420245fe5844e286d0685c1f0db289
|