Searched hist:f4d7c9dd443b7c736304dd2b80b82a7b6074a25a (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/mach-tegra/ |
| H A D | pinmux-common.c | f4d7c9dd443b7c736304dd2b80b82a7b6074a25a Tue Feb 24 21:08:30 UTC 2015 Stephen Warren <swarren@nvidia.com> ARM: tegra: pinmux: support Tegra210's e_io_hv pin option
Tegra210 has a per-pin option named e_io_hv, which indicates that the
pin's input path should be configured to be 3.3v-tolerant. Add support
for this.
Note that this is very similar to previous chip's rcv_sel option.
However, since the Tegra TRM names this option differently for the
different chips, we support the new name so that the code exactly matches
the naming in the TRM, to avoid confusion.
This patch incorporates a few fixes from Tom Warren <twarren@nvidia.com>.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra/ |
| H A D | pinmux.h | f4d7c9dd443b7c736304dd2b80b82a7b6074a25a Tue Feb 24 21:08:30 UTC 2015 Stephen Warren <swarren@nvidia.com> ARM: tegra: pinmux: support Tegra210's e_io_hv pin option
Tegra210 has a per-pin option named e_io_hv, which indicates that the
pin's input path should be configured to be 3.3v-tolerant. Add support
for this.
Note that this is very similar to previous chip's rcv_sel option.
However, since the Tegra TRM names this option differently for the
different chips, we support the new name so that the code exactly matches
the naming in the TRM, to avoid confusion.
This patch incorporates a few fixes from Tom Warren <twarren@nvidia.com>.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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