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H A Dsocfpga_sip_fcs.ce8a3454cb74a9b55c0cb678d47a8553ece660439 Fri Nov 17 02:36:30 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> fix(intel): update fcs functions to check ddr range

The src addr and dest addr of fcs functions are not checked against
their valid ddr range. Thus adding the ddr range checking to avoid
overlap/overwritten ddr address.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I9b4d4155dd16d9d5d36e0c91e4a2600c17867daf