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/rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dfsl_lsch2_speed.ce477f4bdd40496a53f7c2c4290ef4ba16ca4d869 Tue Feb 16 02:54:41 UTC 2016 Yangbo Lu <yangbo.lu@nxp.com> armv8/fsl-lsch2: fix sdhc clock frequency value

The eSDHC could select to use platform clock or peripheral clock to
generate SD clock. The default selection is platform clock. So, fix
the clock frequency value that's calculated for eSDHC.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>