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| H A D | ddr4_dvfs.c | e00fe11df3fee04c7f3137817294d464466dab22 Tue Mar 16 08:42:54 UTC 2021 Jacky Bai <ping.bai@nxp.com> fix(imx8m): add ddr4 dvfs sw workaround for ERR050712
APB Write data corruption following MRCTRL0.mr_wr=1 while
hardware-driven MR access is occurring
When performing a software driven MR access, the following
sequence must be done automatically before performing other
APB register accesses:
1. Set MRCTRL0.mr_wr=1
2. Check for MRSTAT.mr_wr_busy=0. If not, go to step (2)
3. Check for MRSTAT.mr_wr_busy=0 again (for the second time),
if not, go to step (2).
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Change-Id: Ie26e08bcc83d3ed4844ed04a853162308dcdccd0
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