Searched hist:dfb37a2df579ccf0e92c97515452b13ce2c9fba8 (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/drivers/arm/gicv5/ |
| H A D | gicv5_main.c | dfb37a2df579ccf0e92c97515452b13ce2c9fba8 Mon Dec 09 14:29:33 UTC 2024 Boyan Karatotev <boyan.karatotev@arm.com> feat(gicv5): initialise the IRS
Do IRS initialisation that's only accessible from the EL3 interrupt
domain. Relies on the platform to provide SPI domain assignments and
trigger modes as well as to map the config frame in device nGnRnE
memory. All wires will default to NS and the platform may override this.
Change-Id: Icbd43503753cd76fd3d80ed47eba6926494bc323
Co-developed-by: Sascha Bischoff <sascha.bischoff@arm.com>
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| /rk3399_ARM-atf/include/drivers/arm/ |
| H A D | gicv5.h | dfb37a2df579ccf0e92c97515452b13ce2c9fba8 Mon Dec 09 14:29:33 UTC 2024 Boyan Karatotev <boyan.karatotev@arm.com> feat(gicv5): initialise the IRS
Do IRS initialisation that's only accessible from the EL3 interrupt
domain. Relies on the platform to provide SPI domain assignments and
trigger modes as well as to map the config frame in device nGnRnE
memory. All wires will default to NS and the platform may override this.
Change-Id: Icbd43503753cd76fd3d80ed47eba6926494bc323
Co-developed-by: Sascha Bischoff <sascha.bischoff@arm.com>
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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