Searched hist:dd2561c437b25f4e9644ea5a6d687e1d877acf1f (Results 1 – 4 of 4) sorted by relevance
| /optee_os/core/arch/arm/plat-imx/ |
| H A D | a9_plat_init.S | dd2561c437b25f4e9644ea5a6d687e1d877acf1f Wed Nov 16 08:40:27 UTC 2016 Peng Fan <peng.fan@nxp.com> core: imx: switch to use c code for PL310
1. Add a new file imx_pl310.c for arm_cl2_config and arm_cl2_enable.
2. For i.MX6Q, CFG_PL310 is defined and arm_cl2_config is implemented.
In arm_cl2_config, all ways are invalidated, but it does not follow
the rules to wait all ways to be invalidated. So In the following
call to inval_cache_vrange, arm_cl2_cleaninvbypa will trigger SLVERR.
This is because the first invalidation operation not finished in
background, and another invalidation is issued to PL310. So switch
to use arm_cl2_invbyway which will wait until invalidation finished.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| H A D | imx_pl310.c | dd2561c437b25f4e9644ea5a6d687e1d877acf1f Wed Nov 16 08:40:27 UTC 2016 Peng Fan <peng.fan@nxp.com> core: imx: switch to use c code for PL310
1. Add a new file imx_pl310.c for arm_cl2_config and arm_cl2_enable.
2. For i.MX6Q, CFG_PL310 is defined and arm_cl2_config is implemented.
In arm_cl2_config, all ways are invalidated, but it does not follow
the rules to wait all ways to be invalidated. So In the following
call to inval_cache_vrange, arm_cl2_cleaninvbypa will trigger SLVERR.
This is because the first invalidation operation not finished in
background, and another invalidation is issued to PL310. So switch
to use arm_cl2_invbyway which will wait until invalidation finished.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| H A D | sub.mk | dd2561c437b25f4e9644ea5a6d687e1d877acf1f Wed Nov 16 08:40:27 UTC 2016 Peng Fan <peng.fan@nxp.com> core: imx: switch to use c code for PL310
1. Add a new file imx_pl310.c for arm_cl2_config and arm_cl2_enable.
2. For i.MX6Q, CFG_PL310 is defined and arm_cl2_config is implemented.
In arm_cl2_config, all ways are invalidated, but it does not follow
the rules to wait all ways to be invalidated. So In the following
call to inval_cache_vrange, arm_cl2_cleaninvbypa will trigger SLVERR.
This is because the first invalidation operation not finished in
background, and another invalidation is issued to PL310. So switch
to use arm_cl2_invbyway which will wait until invalidation finished.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| H A D | platform_config.h | dd2561c437b25f4e9644ea5a6d687e1d877acf1f Wed Nov 16 08:40:27 UTC 2016 Peng Fan <peng.fan@nxp.com> core: imx: switch to use c code for PL310
1. Add a new file imx_pl310.c for arm_cl2_config and arm_cl2_enable.
2. For i.MX6Q, CFG_PL310 is defined and arm_cl2_config is implemented.
In arm_cl2_config, all ways are invalidated, but it does not follow
the rules to wait all ways to be invalidated. So In the following
call to inval_cache_vrange, arm_cl2_cleaninvbypa will trigger SLVERR.
This is because the first invalidation operation not finished in
background, and another invalidation is issued to PL310. So switch
to use arm_cl2_invbyway which will wait until invalidation finished.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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