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| H A D | arm64.h | dc9fd53be9d69c4a6bc67d9de951b8f2a92abade Fri Jun 14 15:51:22 UTC 2024 Jerome Forissier <jerome.forissier@linaro.org> arm64.h: fix compile error with Clang
Clang 18.1.6 fails to compile OP-TEE OS with the following error:
CC out/arm/core/arch/arm/kernel/vfp.o
In file included from core/arch/arm/kernel/vfp.c:6:
In file included from core/arch/arm/include/arm.h:137:
core/arch/arm/include/arm64.h:455:1: error: expected readable system register
455 | DEFINE_U32_REG_READWRITE_FUNCS(fpcr)
| ^
core/arch/arm/include/arm64.h:436:3: note: expanded from macro 'DEFINE_U32_REG_READWRITE_FUNCS'
436 | DEFINE_U32_REG_READ_FUNC(reg) \
| ^
core/arch/arm/include/arm64.h:430:3: note: expanded from macro 'DEFINE_U32_REG_READ_FUNC'
430 | DEFINE_REG_READ_FUNC_(reg, uint32_t, reg)
| ^
core/arch/arm/include/arm64.h:417:15: note: expanded from macro 'DEFINE_REG_READ_FUNC_'
417 | asm volatile("mrs %0, " #asmreg : "=r" (val64)); \
| ^
<inline asm>:1:10: note: instantiated into assembly here
1 | mrs x8, fpcr
| ^
...and similar ones for fpcr write, as well as fpsr read and write.
Clang 12.0.0 does not have any problem with this code which makes me
think that it's a Clang/LLVM issue.
Work around the problem by using the coded system register identifiers
S3_3_c4_c4_0 and S3_3_c4_c4_1 instead of fpcr and fpsr, respectively.
The values 3-3-4-4-0 and 3-3-4-4-1 are taken from the Arm ARM sections
C.5.2.8 and C.5.2.9.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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