Searched hist:db6ce2312dcae87619136457d1f9df56789f630a (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/arch/arc/include/asm/ |
| H A D | arcregs.h | db6ce2312dcae87619136457d1f9df56789f630a Mon Dec 14 14:15:13 UTC 2015 Alexey Brodkin <Alexey.Brodkin@synopsys.com> arc: cache - utilize IO coherency (AKA IOC) engine
With release of ARC HS38 v2.1 new IO coherency engine could be built-in
ARC core. This hardware module ensures coherency between DMA-ed data
from peripherals and L2 cache.
With L2 and IOC enabled there's no overhead for L2 cache manual
maintenance which results in significantly improved IO bandwidth.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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| /rk3399_rockchip-uboot/arch/arc/lib/ |
| H A D | cache.c | db6ce2312dcae87619136457d1f9df56789f630a Mon Dec 14 14:15:13 UTC 2015 Alexey Brodkin <Alexey.Brodkin@synopsys.com> arc: cache - utilize IO coherency (AKA IOC) engine
With release of ARC HS38 v2.1 new IO coherency engine could be built-in
ARC core. This hardware module ensures coherency between DMA-ed data
from peripherals and L2 cache.
With L2 and IOC enabled there's no overhead for L2 cache manual
maintenance which results in significantly improved IO bandwidth.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
|