Searched hist:d33603016971adbe2aba04f96c2a45b56d33f99a (Results 1 – 6 of 6) sorted by relevance
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t210/ |
| H A D | plat_setup.c | d33603016971adbe2aba04f96c2a45b56d33f99a Mon Dec 28 22:55:41 UTC 2015 Varun Wadekar <vwadekar@nvidia.com> Tegra: GIC: enable FIQ interrupt handling
Tegra chips support multiple FIQ interrupt sources. These interrupts
are enabled in the GICD/GICC interfaces by the tegra_gic driver. A
new FIQ handler would be added in a subsequent change which can be
registered by the platform code.
This patch adds the GIC programming as part of the tegra_gic_setup()
which now takes an array of all the FIQ interrupts to be enabled for
the platform. The Tegra132 and Tegra210 platforms right now do not
register for any FIQ interrupts themselves, but will definitely use
this support in the future.
Change-Id: I0ea164be901cd6681167028fea0567399f18d4b8
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| /rk3399_ARM-atf/plat/nvidia/tegra/include/t210/ |
| H A D | tegra_def.h | d33603016971adbe2aba04f96c2a45b56d33f99a Mon Dec 28 22:55:41 UTC 2015 Varun Wadekar <vwadekar@nvidia.com> Tegra: GIC: enable FIQ interrupt handling
Tegra chips support multiple FIQ interrupt sources. These interrupts
are enabled in the GICD/GICC interfaces by the tegra_gic driver. A
new FIQ handler would be added in a subsequent change which can be
registered by the platform code.
This patch adds the GIC programming as part of the tegra_gic_setup()
which now takes an array of all the FIQ interrupts to be enabled for
the platform. The Tegra132 and Tegra210 platforms right now do not
register for any FIQ interrupts themselves, but will definitely use
this support in the future.
Change-Id: I0ea164be901cd6681167028fea0567399f18d4b8
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| /rk3399_ARM-atf/plat/nvidia/tegra/common/ |
| H A D | tegra_common.mk | d33603016971adbe2aba04f96c2a45b56d33f99a Mon Dec 28 22:55:41 UTC 2015 Varun Wadekar <vwadekar@nvidia.com> Tegra: GIC: enable FIQ interrupt handling
Tegra chips support multiple FIQ interrupt sources. These interrupts
are enabled in the GICD/GICC interfaces by the tegra_gic driver. A
new FIQ handler would be added in a subsequent change which can be
registered by the platform code.
This patch adds the GIC programming as part of the tegra_gic_setup()
which now takes an array of all the FIQ interrupts to be enabled for
the platform. The Tegra132 and Tegra210 platforms right now do not
register for any FIQ interrupts themselves, but will definitely use
this support in the future.
Change-Id: I0ea164be901cd6681167028fea0567399f18d4b8
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| H A D | tegra_pm.c | d33603016971adbe2aba04f96c2a45b56d33f99a Mon Dec 28 22:55:41 UTC 2015 Varun Wadekar <vwadekar@nvidia.com> Tegra: GIC: enable FIQ interrupt handling
Tegra chips support multiple FIQ interrupt sources. These interrupts
are enabled in the GICD/GICC interfaces by the tegra_gic driver. A
new FIQ handler would be added in a subsequent change which can be
registered by the platform code.
This patch adds the GIC programming as part of the tegra_gic_setup()
which now takes an array of all the FIQ interrupts to be enabled for
the platform. The Tegra132 and Tegra210 platforms right now do not
register for any FIQ interrupts themselves, but will definitely use
this support in the future.
Change-Id: I0ea164be901cd6681167028fea0567399f18d4b8
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| H A D | tegra_bl31_setup.c | d33603016971adbe2aba04f96c2a45b56d33f99a Mon Dec 28 22:55:41 UTC 2015 Varun Wadekar <vwadekar@nvidia.com> Tegra: GIC: enable FIQ interrupt handling
Tegra chips support multiple FIQ interrupt sources. These interrupts
are enabled in the GICD/GICC interfaces by the tegra_gic driver. A
new FIQ handler would be added in a subsequent change which can be
registered by the platform code.
This patch adds the GIC programming as part of the tegra_gic_setup()
which now takes an array of all the FIQ interrupts to be enabled for
the platform. The Tegra132 and Tegra210 platforms right now do not
register for any FIQ interrupts themselves, but will definitely use
this support in the future.
Change-Id: I0ea164be901cd6681167028fea0567399f18d4b8
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| /rk3399_ARM-atf/plat/nvidia/tegra/include/ |
| H A D | tegra_private.h | d33603016971adbe2aba04f96c2a45b56d33f99a Mon Dec 28 22:55:41 UTC 2015 Varun Wadekar <vwadekar@nvidia.com> Tegra: GIC: enable FIQ interrupt handling
Tegra chips support multiple FIQ interrupt sources. These interrupts
are enabled in the GICD/GICC interfaces by the tegra_gic driver. A
new FIQ handler would be added in a subsequent change which can be
registered by the platform code.
This patch adds the GIC programming as part of the tegra_gic_setup()
which now takes an array of all the FIQ interrupts to be enabled for
the platform. The Tegra132 and Tegra210 platforms right now do not
register for any FIQ interrupts themselves, but will definitely use
this support in the future.
Change-Id: I0ea164be901cd6681167028fea0567399f18d4b8
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|