Searched hist:d0ec1cc437c59e64ecba44710dbce82a04ff892d (Results 1 – 4 of 4) sorted by relevance
| /rk3399_ARM-atf/lib/aarch32/ |
| H A D | cache_helpers.S | d0ec1cc437c59e64ecba44710dbce82a04ff892d Wed Dec 01 19:18:30 UTC 2021 johpow01 <john.powell@arm.com> feat(ccidx): update the do_dcsw_op function to support FEAT_CCIDX
FEAT_CCIDX modifies the register fields in CCSIDR/CCSIDR2 (aarch32)
and CCSIDR_EL1 (aarch64). This patch adds a check to the do_dcsw_op
function to use the right register format rather than assuming
that FEAT_CCIDX is not implemented.
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I12cd00cd7b5889525d4d2750281a751dd74ef5dc
|
| /rk3399_ARM-atf/lib/aarch64/ |
| H A D | cache_helpers.S | d0ec1cc437c59e64ecba44710dbce82a04ff892d Wed Dec 01 19:18:30 UTC 2021 johpow01 <john.powell@arm.com> feat(ccidx): update the do_dcsw_op function to support FEAT_CCIDX
FEAT_CCIDX modifies the register fields in CCSIDR/CCSIDR2 (aarch32)
and CCSIDR_EL1 (aarch64). This patch adds a check to the do_dcsw_op
function to use the right register format rather than assuming
that FEAT_CCIDX is not implemented.
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I12cd00cd7b5889525d4d2750281a751dd74ef5dc
|
| /rk3399_ARM-atf/include/arch/aarch32/ |
| H A D | arch.h | d0ec1cc437c59e64ecba44710dbce82a04ff892d Wed Dec 01 19:18:30 UTC 2021 johpow01 <john.powell@arm.com> feat(ccidx): update the do_dcsw_op function to support FEAT_CCIDX
FEAT_CCIDX modifies the register fields in CCSIDR/CCSIDR2 (aarch32)
and CCSIDR_EL1 (aarch64). This patch adds a check to the do_dcsw_op
function to use the right register format rather than assuming
that FEAT_CCIDX is not implemented.
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I12cd00cd7b5889525d4d2750281a751dd74ef5dc
|
| /rk3399_ARM-atf/include/arch/aarch64/ |
| H A D | arch.h | d0ec1cc437c59e64ecba44710dbce82a04ff892d Wed Dec 01 19:18:30 UTC 2021 johpow01 <john.powell@arm.com> feat(ccidx): update the do_dcsw_op function to support FEAT_CCIDX
FEAT_CCIDX modifies the register fields in CCSIDR/CCSIDR2 (aarch32)
and CCSIDR_EL1 (aarch64). This patch adds a check to the do_dcsw_op
function to use the right register format rather than assuming
that FEAT_CCIDX is not implemented.
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I12cd00cd7b5889525d4d2750281a751dd74ef5dc
|