Searched hist:cd6ddc48134297497d226209a4e6ea72b71c87c5 (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/include/configs/ |
| H A D | tqma6.h | cd6ddc48134297497d226209a4e6ea72b71c87c5 Thu May 28 15:33:34 UTC 2015 Fabio Estevam <fabio.estevam at freescale.com> mx6_common: Fix LOADADDR and SYS_TEXT_BASE for MX6SL and MX6SX
Commit 8183058188cd2d942 ("imx6: centralise common boot options in
mx6_common.h") broke boot on mx6sl and mx6sx by assuming that all mx6
SoCs use the same LOADADDR/SYS_TEXT_BASE range, which is not correct.
DDR on mx6sx/mx6sl starts at 0x80000000.
Adjust LOADADDR/SYS_TEXT_BASE to the proper values for mx6sx/mx6sl,
so that these SoCs can boot again.
Also, TQMA6 requires a custom CONFIG_SYS_TEXT_BASE value, so move
its setting prior to the inclusion of mx6_common.h.
Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
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| H A D | mx6_common.h | cd6ddc48134297497d226209a4e6ea72b71c87c5 Thu May 28 15:33:34 UTC 2015 Fabio Estevam <fabio.estevam at freescale.com> mx6_common: Fix LOADADDR and SYS_TEXT_BASE for MX6SL and MX6SX
Commit 8183058188cd2d942 ("imx6: centralise common boot options in
mx6_common.h") broke boot on mx6sl and mx6sx by assuming that all mx6
SoCs use the same LOADADDR/SYS_TEXT_BASE range, which is not correct.
DDR on mx6sx/mx6sl starts at 0x80000000.
Adjust LOADADDR/SYS_TEXT_BASE to the proper values for mx6sx/mx6sl,
so that these SoCs can boot again.
Also, TQMA6 requires a custom CONFIG_SYS_TEXT_BASE value, so move
its setting prior to the inclusion of mx6_common.h.
Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
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