Searched hist:cc1dd33f273f8c96cbd7539b4a2d1d7aa12773cd (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/ |
| H A D | interrupts.c | cc1dd33f273f8c96cbd7539b4a2d1d7aa12773cd Thu Mar 10 22:09:26 UTC 2011 John Schmoller <jschmoller@xes-inc.com> mpc8[5/6]xx: Ensure POST word does not get reset
The POST word is stored in a spare register in the PIC on MPC8[5/6]xx
processors. When interrupt_init() is called, this register gets reset
which resulted in all POST_RAM POSTs not being ran due to the corrupted
POST word. To resolve this, store off POST word before the PIC is
reset, and restore it after the PIC has been initialized.
Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc86xx/ |
| H A D | interrupts.c | cc1dd33f273f8c96cbd7539b4a2d1d7aa12773cd Thu Mar 10 22:09:26 UTC 2011 John Schmoller <jschmoller@xes-inc.com> mpc8[5/6]xx: Ensure POST word does not get reset
The POST word is stored in a spare register in the PIC on MPC8[5/6]xx
processors. When interrupt_init() is called, this register gets reset
which resulted in all POST_RAM POSTs not being ran due to the corrupted
POST word. To resolve this, store off POST word before the PIC is
reset, and restore it after the PIC has been initialized.
Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|