| /rk3399_rockchip-uboot/arch/arm/mach-keystone/include/mach/ |
| H A D | clock_defs.h | c321a2362463ce54ae73ef59bee4b620d9f26acf Tue Jul 28 08:46:43 UTC 2015 Lokesh Vutla <lokeshvutla@ti.com> ARM: keystone2: Cleanup PLL init code
There are two types of PLL for all keystone platforms:
Main PLL, Secondary PLL. Instead of duplicating the same definition
for each secondary PLL, have a common function which does
initialization for both PLLs. And also add proper register
definitions.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
|
| H A D | clock-k2e.h | c321a2362463ce54ae73ef59bee4b620d9f26acf Tue Jul 28 08:46:43 UTC 2015 Lokesh Vutla <lokeshvutla@ti.com> ARM: keystone2: Cleanup PLL init code
There are two types of PLL for all keystone platforms:
Main PLL, Secondary PLL. Instead of duplicating the same definition
for each secondary PLL, have a common function which does
initialization for both PLLs. And also add proper register
definitions.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
|
| H A D | clock.h | c321a2362463ce54ae73ef59bee4b620d9f26acf Tue Jul 28 08:46:43 UTC 2015 Lokesh Vutla <lokeshvutla@ti.com> ARM: keystone2: Cleanup PLL init code
There are two types of PLL for all keystone platforms:
Main PLL, Secondary PLL. Instead of duplicating the same definition
for each secondary PLL, have a common function which does
initialization for both PLLs. And also add proper register
definitions.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
|
| /rk3399_rockchip-uboot/board/ti/ks2_evm/ |
| H A D | board_k2l.c | c321a2362463ce54ae73ef59bee4b620d9f26acf Tue Jul 28 08:46:43 UTC 2015 Lokesh Vutla <lokeshvutla@ti.com> ARM: keystone2: Cleanup PLL init code
There are two types of PLL for all keystone platforms:
Main PLL, Secondary PLL. Instead of duplicating the same definition
for each secondary PLL, have a common function which does
initialization for both PLLs. And also add proper register
definitions.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
|
| H A D | board_k2e.c | c321a2362463ce54ae73ef59bee4b620d9f26acf Tue Jul 28 08:46:43 UTC 2015 Lokesh Vutla <lokeshvutla@ti.com> ARM: keystone2: Cleanup PLL init code
There are two types of PLL for all keystone platforms:
Main PLL, Secondary PLL. Instead of duplicating the same definition
for each secondary PLL, have a common function which does
initialization for both PLLs. And also add proper register
definitions.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
|
| H A D | board_k2hk.c | c321a2362463ce54ae73ef59bee4b620d9f26acf Tue Jul 28 08:46:43 UTC 2015 Lokesh Vutla <lokeshvutla@ti.com> ARM: keystone2: Cleanup PLL init code
There are two types of PLL for all keystone platforms:
Main PLL, Secondary PLL. Instead of duplicating the same definition
for each secondary PLL, have a common function which does
initialization for both PLLs. And also add proper register
definitions.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
|
| H A D | board.c | c321a2362463ce54ae73ef59bee4b620d9f26acf Tue Jul 28 08:46:43 UTC 2015 Lokesh Vutla <lokeshvutla@ti.com> ARM: keystone2: Cleanup PLL init code
There are two types of PLL for all keystone platforms:
Main PLL, Secondary PLL. Instead of duplicating the same definition
for each secondary PLL, have a common function which does
initialization for both PLLs. And also add proper register
definitions.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
|
| /rk3399_rockchip-uboot/arch/arm/mach-keystone/ |
| H A D | clock.c | c321a2362463ce54ae73ef59bee4b620d9f26acf Tue Jul 28 08:46:43 UTC 2015 Lokesh Vutla <lokeshvutla@ti.com> ARM: keystone2: Cleanup PLL init code
There are two types of PLL for all keystone platforms:
Main PLL, Secondary PLL. Instead of duplicating the same definition
for each secondary PLL, have a common function which does
initialization for both PLLs. And also add proper register
definitions.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
|