Searched hist:c2ad76c4bdfb8ffbe8946c0e6627b37a11effdf7 (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/mach-at91/include/mach/ |
| H A D | atmel_mpddrc.h | c2ad76c4bdfb8ffbe8946c0e6627b37a11effdf7 Mon Feb 01 10:12:16 UTC 2016 Wenyou Yang <wenyou.yang@atmel.com> arm: at91/spl: mpddrc: add mpddrc DDR3-SDRAM initialization
The DDR3-SDRAM initialization sequence is implemented in
accordance with the DDR3-SRAM/DDR3L-SDRAM initialization section
described in the SAMA5D2 datasheet.
Add registers and definitions of mpddrc controller, which is used
to support DDR3 devices.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
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| /rk3399_rockchip-uboot/arch/arm/mach-at91/ |
| H A D | mpddrc.c | c2ad76c4bdfb8ffbe8946c0e6627b37a11effdf7 Mon Feb 01 10:12:16 UTC 2016 Wenyou Yang <wenyou.yang@atmel.com> arm: at91/spl: mpddrc: add mpddrc DDR3-SDRAM initialization
The DDR3-SDRAM initialization sequence is implemented in
accordance with the DDR3-SRAM/DDR3L-SDRAM initialization section
described in the SAMA5D2 datasheet.
Add registers and definitions of mpddrc controller, which is used
to support DDR3 devices.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
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