Searched hist:b6ccd2c9dee758a70e761403a41e60c31a1cfcec (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/arch/powerpc/include/asm/ |
| H A D | fsl_pci.h | b6ccd2c9dee758a70e761403a41e60c31a1cfcec Fri Feb 04 03:30:43 UTC 2011 Prabhakar Kushwaha <prabhakar@freescale.com> fsl_pci: Add support for FSL PCIe controllers v2.x
FSL PCIe controller v2.1:
- New MSI inbound window
- Same Inbound windows address as PCIe controller v1.x
Added new pit_t member(pmit) to struct ccsr_pci for MSI inbound window
FSL PCIe controller v2.2 and v2.3:
- Different addresses for PCIe inbound window 3,2,1
- Exposed PCIe inbound window 0
- New PCIe interrupt status register
Added new Interrupt Status register to struct ccsr_pci & updated pit_t array
size to reflect the 4 inbound windows.
To maintain backward compatiblilty, on V2.2 or greater controllers we
start with inbound window 1 and leave inbound 0 with its default value
(which maps to CCSRBAR).
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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| /rk3399_rockchip-uboot/drivers/pci/ |
| H A D | fsl_pci_init.c | b6ccd2c9dee758a70e761403a41e60c31a1cfcec Fri Feb 04 03:30:43 UTC 2011 Prabhakar Kushwaha <prabhakar@freescale.com> fsl_pci: Add support for FSL PCIe controllers v2.x
FSL PCIe controller v2.1:
- New MSI inbound window
- Same Inbound windows address as PCIe controller v1.x
Added new pit_t member(pmit) to struct ccsr_pci for MSI inbound window
FSL PCIe controller v2.2 and v2.3:
- Different addresses for PCIe inbound window 3,2,1
- Exposed PCIe inbound window 0
- New PCIe interrupt status register
Added new Interrupt Status register to struct ccsr_pci & updated pit_t array
size to reflect the 4 inbound windows.
To maintain backward compatiblilty, on V2.2 or greater controllers we
start with inbound window 1 and leave inbound 0 with its default value
(which maps to CCSRBAR).
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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