| /rk3399_ARM-atf/include/services/ |
| H A D | arm_arch_svc.h | b3bcfd12c8469df79b212647b9eb2743d7dbb070 Thu Aug 14 15:53:20 UTC 2025 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): enable FEAT_PFAR support
Implement support for FEAT_PFAR, which introduces the PFAR_ELx system
register, recording the faulting physical address for some aborts.
Those system registers are trapped by the SCR_EL3.PFARen bit, so set the
bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_PFAR build flag, which follows the
usual semantics of 2 meaning the feature being runtime detected.
Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: I5c9ae750417e75792f693732df3869e02b6e4319
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
| /rk3399_ARM-atf/make_helpers/ |
| H A D | arch_features.mk | b3bcfd12c8469df79b212647b9eb2743d7dbb070 Thu Aug 14 15:53:20 UTC 2025 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): enable FEAT_PFAR support
Implement support for FEAT_PFAR, which introduces the PFAR_ELx system
register, recording the faulting physical address for some aborts.
Those system registers are trapped by the SCR_EL3.PFARen bit, so set the
bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_PFAR build flag, which follows the
usual semantics of 2 meaning the feature being runtime detected.
Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: I5c9ae750417e75792f693732df3869e02b6e4319
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
| /rk3399_ARM-atf/common/ |
| H A D | feat_detect.c | b3bcfd12c8469df79b212647b9eb2743d7dbb070 Thu Aug 14 15:53:20 UTC 2025 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): enable FEAT_PFAR support
Implement support for FEAT_PFAR, which introduces the PFAR_ELx system
register, recording the faulting physical address for some aborts.
Those system registers are trapped by the SCR_EL3.PFARen bit, so set the
bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_PFAR build flag, which follows the
usual semantics of 2 meaning the feature being runtime detected.
Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: I5c9ae750417e75792f693732df3869e02b6e4319
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
| /rk3399_ARM-atf/include/arch/aarch64/ |
| H A D | arch_features.h | b3bcfd12c8469df79b212647b9eb2743d7dbb070 Thu Aug 14 15:53:20 UTC 2025 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): enable FEAT_PFAR support
Implement support for FEAT_PFAR, which introduces the PFAR_ELx system
register, recording the faulting physical address for some aborts.
Those system registers are trapped by the SCR_EL3.PFARen bit, so set the
bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_PFAR build flag, which follows the
usual semantics of 2 meaning the feature being runtime detected.
Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: I5c9ae750417e75792f693732df3869e02b6e4319
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
| H A D | arch.h | b3bcfd12c8469df79b212647b9eb2743d7dbb070 Thu Aug 14 15:53:20 UTC 2025 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): enable FEAT_PFAR support
Implement support for FEAT_PFAR, which introduces the PFAR_ELx system
register, recording the faulting physical address for some aborts.
Those system registers are trapped by the SCR_EL3.PFARen bit, so set the
bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_PFAR build flag, which follows the
usual semantics of 2 meaning the feature being runtime detected.
Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: I5c9ae750417e75792f693732df3869e02b6e4319
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
| /rk3399_ARM-atf/lib/el3_runtime/aarch64/ |
| H A D | context_mgmt.c | b3bcfd12c8469df79b212647b9eb2743d7dbb070 Thu Aug 14 15:53:20 UTC 2025 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): enable FEAT_PFAR support
Implement support for FEAT_PFAR, which introduces the PFAR_ELx system
register, recording the faulting physical address for some aborts.
Those system registers are trapped by the SCR_EL3.PFARen bit, so set the
bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_PFAR build flag, which follows the
usual semantics of 2 meaning the feature being runtime detected.
Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: I5c9ae750417e75792f693732df3869e02b6e4319
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
| /rk3399_ARM-atf/docs/getting_started/ |
| H A D | build-options.rst | b3bcfd12c8469df79b212647b9eb2743d7dbb070 Thu Aug 14 15:53:20 UTC 2025 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): enable FEAT_PFAR support
Implement support for FEAT_PFAR, which introduces the PFAR_ELx system
register, recording the faulting physical address for some aborts.
Those system registers are trapped by the SCR_EL3.PFARen bit, so set the
bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_PFAR build flag, which follows the
usual semantics of 2 meaning the feature being runtime detected.
Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: I5c9ae750417e75792f693732df3869e02b6e4319
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
| /rk3399_ARM-atf/plat/arm/board/fvp/ |
| H A D | platform.mk | b3bcfd12c8469df79b212647b9eb2743d7dbb070 Thu Aug 14 15:53:20 UTC 2025 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): enable FEAT_PFAR support
Implement support for FEAT_PFAR, which introduces the PFAR_ELx system
register, recording the faulting physical address for some aborts.
Those system registers are trapped by the SCR_EL3.PFARen bit, so set the
bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_PFAR build flag, which follows the
usual semantics of 2 meaning the feature being runtime detected.
Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: I5c9ae750417e75792f693732df3869e02b6e4319
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
| /rk3399_ARM-atf/ |
| H A D | Makefile | b3bcfd12c8469df79b212647b9eb2743d7dbb070 Thu Aug 14 15:53:20 UTC 2025 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): enable FEAT_PFAR support
Implement support for FEAT_PFAR, which introduces the PFAR_ELx system
register, recording the faulting physical address for some aborts.
Those system registers are trapped by the SCR_EL3.PFARen bit, so set the
bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_PFAR build flag, which follows the
usual semantics of 2 meaning the feature being runtime detected.
Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: I5c9ae750417e75792f693732df3869e02b6e4319
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|