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H A Dstm32_iwdg.cb2f17e87f6f1bba5a4d475179433f0496bdb7a40 Mon Dec 18 08:45:49 UTC 2023 Etienne Carriere <etienne.carriere@foss.st.com> drivers: stm32_iwdg: rename bus clock to clk_pclk

Rename STM32 IWDG watchdog bus clock clk_pclk, matching the reference
manual naming instead of clock.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>