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H A Dsip_svc_setup.cacbae3998bd829ae4b31ea9da59055e3624991a5 Mon Feb 20 11:53:31 UTC 2023 Michal Simek <michal.simek@amd.com> fix(zynqmp): move EM SMC range to SIP range

EM SMC where out of SIP range which is 15:0 bits only. EM was used 19:17
bits which is wrong but no code was checking it. That's why vove EM SMC
to SIP range.

Change-Id: I83f998a17a8b82b2c25ea8c9b247e42642c82178
Signed-off-by: Michal Simek <michal.simek@amd.com>